[all-commits] [llvm/llvm-project] 89d125: Bit width of input/result types in OpSConvert/OpUC...

[Vyacheslav Levytskyy via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 89d125564a619068cead98c970215e69653503e8
      https://github.com/llvm/llvm-project/commit/89d125564a619068cead98c970215e69653503e8
  Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
  Date:   2024-04-24 (Wed, 24 Apr 2024)

  Changed paths:
    M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
    M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
    M llvm/test/CodeGen/SPIRV/transcoding/memcpy-zext.ll

  Log Message:
  -----------
  Bit width of input/result types in OpSConvert/OpUConvert must not be the same (#89737)

This PR fixes the issue
https://github.com/llvm/llvm-project/issues/88908
Attached test case is updated to check that OpSConvert/OpUConvert is not
generated when input and result types are identical.



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