[all-commits] [llvm/llvm-project] 6493da: [RISCV] Use the store value's VT as the MemoryVT a...

[Pengcheng Wang via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6493da7356541becdf2bf6c141fd619c15dec5d6
      https://github.com/llvm/llvm-project/commit/6493da7356541becdf2bf6c141fd619c15dec5d6
  Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
  Date:   2024-04-24 (Wed, 24 Apr 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    A llvm/test/CodeGen/RISCV/pr89833.ll

  Log Message:
  -----------
  [RISCV] Use the store value's VT as the MemoryVT after combining riscv.masked.strided.store (#89874)

According to `RISCVTargetLowering::getTgtMemIntrinsic`, the MemoryVT
is the scalar element VT for strided store and the MemoryVT is the
same as the store value's VT for unit-stride store.

After combining `riscv.masked.strided.store` to `masked.store`, we
just use the scalar element VT to construct `masked.store`, which is
wrong.

With wrong MemoryVT, the DAGCombiner will combine `trunc+masked.store`
to truncated `masked.store` because `TLI.canCombineTruncStore` returns
true.

So, we should use the store value's VT as the MemoryVT.

This fixes #89833.



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