[all-commits] [llvm/llvm-project] f9b419: [DAGCombiner] Fix miscompile bug in combineShiftOf...

[Björn Pettersson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f9b419b7a038dcd51a7943b160acc867714c595f
      https://github.com/llvm/llvm-project/commit/f9b419b7a038dcd51a7943b160acc867714c595f
  Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
  Date:   2024-04-23 (Tue, 23 Apr 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/X86/shift-combine.ll

  Log Message:
  -----------
  [DAGCombiner] Fix miscompile bug in combineShiftOfShiftedLogic (#89616)

Ensure that the sum of the shift amounts does not overflow the
shift amount type when combining shifts in combineShiftOfShiftedLogic.

Solves a miscompile bug found when testing the C23 BitInt feature.

Targets like X86 that only use an i8 for shift amounts after
legalization seems to be extra susceptible for bugs like this as it
isn't legal to shift more than 255 steps.



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