[all-commits] [llvm/llvm-project] dc3f94: Revert "[RISCV] Implement RISCVISD::SHL_ADD and mo...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: dc3f94384d79941a712b15ac5c53bf86daa860c8
      https://github.com/llvm/llvm-project/commit/dc3f94384d79941a712b15ac5c53bf86daa860c8
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-04-22 (Mon, 22 Apr 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
    M llvm/test/CodeGen/RISCV/addimm-mulimm.ll
    M llvm/test/CodeGen/RISCV/rv32zba.ll
    M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zba.ll
    M llvm/test/CodeGen/RISCV/rv64-legal-i32/xaluo.ll
    M llvm/test/CodeGen/RISCV/rv64zba.ll
    M llvm/test/CodeGen/RISCV/xaluo.ll

  Log Message:
  -----------
  Revert "[RISCV] Implement RISCVISD::SHL_ADD and move patterns into combine (#89263)"

This reverts commit 5a7c80ca58c628fab80aa4f95bb6d18598c70c80.  Noticed failures
with the following command:
$ llc -mtriple=riscv64 -mattr=+m,+xtheadba -verify-machineinstrs < test/CodeGen/RISCV/rv64zba.ll

I think I know the cause and will likely reland with a fix tomorrow.



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