[all-commits] [llvm/llvm-project] f433c3: AMDGPU: Add tests for atomicrmw handling of new me...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Fri Apr 19 16:36:27 PDT 2024
Branch: refs/heads/users/vitalybuka/spr/sancov-apply-branch-weights-when-checking-counters
Home: https://github.com/llvm/llvm-project
Commit: f433c3b38005701fdc219ae8c01e6af1b8bedba9
https://github.com/llvm/llvm-project/commit/f433c3b38005701fdc219ae8c01e6af1b8bedba9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-04-20 (Sat, 20 Apr 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomics-fp.ll
A llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-system.ll
A llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-system.ll
A llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i32-system.ll
A llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i64-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll
A llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2bf16-system.ll
A llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-integer-ops-0-to-add-0.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/basic.ll
A llvm/test/Transforms/Inline/AMDGPU/inline-atomicrmw-md-preserve.ll
Log Message:
-----------
AMDGPU: Add tests for atomicrmw handling of new metadata (#89248)
Add baseline tests which should comprehensively test the new atomic
metadata. Test codegen / expansion, and preservation in a few
transforms.
New metadata defined in #85052
Commit: c69efcd54879835085cf03a09e1eec28dc80e1d3
https://github.com/llvm/llvm-project/commit/c69efcd54879835085cf03a09e1eec28dc80e1d3
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-04-19 (Fri, 19 Apr 2024)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/cuf03.cuf
Log Message:
-----------
[flang][cuda] Relax assumed size check on object with device attribute (#89466)
Assumed size arrays are apparently allowed with attribute device.
Commit: f09f99ed329f58c79fba43abf5fc73a28a0e2055
https://github.com/llvm/llvm-project/commit/f09f99ed329f58c79fba43abf5fc73a28a0e2055
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-04-19 (Fri, 19 Apr 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
Log Message:
-----------
[RISCV] Add RISCVTuneProcessorModel to 'generic' CPU. NFC
Remove hardcode GENERIC cpu from RISCVTargetDefEmitter.cpp.
Commit: 11019be4cf75ff40d2da84094477ab5dac818c99
https://github.com/llvm/llvm-project/commit/11019be4cf75ff40d2da84094477ab5dac818c99
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-04-19 (Fri, 19 Apr 2024)
Changed paths:
M llvm/test/Instrumentation/SanitizerCoverage/inline-bool-flag.ll
M llvm/test/Instrumentation/SanitizerCoverage/stack-depth.ll
Log Message:
-----------
[test][sancov] Regenerate with update_test_checks (#89457)
Prepare for #89458
Commit: 1c2b46af5d6a2ad387dbc07094b340b71f2221c2
https://github.com/llvm/llvm-project/commit/1c2b46af5d6a2ad387dbc07094b340b71f2221c2
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-04-19 (Fri, 19 Apr 2024)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/cuf03.cuf
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomics-fp.ll
A llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-system.ll
A llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-system.ll
A llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i32-system.ll
A llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i64-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll
A llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2bf16-system.ll
A llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-integer-ops-0-to-add-0.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/basic.ll
A llvm/test/Transforms/Inline/AMDGPU/inline-atomicrmw-md-preserve.ll
M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
Log Message:
-----------
rebase
Created using spr 1.3.4
Compare: https://github.com/llvm/llvm-project/compare/1b4be37b43e9...1c2b46af5d6a
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