[all-commits] [llvm/llvm-project] f430e3: [llvm] Drop unaligned from calls to readNext (NFC)...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Wed Apr 17 04:17:06 PDT 2024
Branch: refs/heads/users/alexey-bataev/spr/lvevlsupport-reversed-loadsstores-1
Home: https://github.com/llvm/llvm-project
Commit: f430e374462efd94d891fcf9fa09d606343c780f
https://github.com/llvm/llvm-project/commit/f430e374462efd94d891fcf9fa09d606343c780f
Author: Kazu Hirata <kazu at google.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/MC/MCPseudoProbe.cpp
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/MemProf.cpp
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/lib/ProfileData/SampleProfReader.cpp
Log Message:
-----------
[llvm] Drop unaligned from calls to readNext (NFC) (#88841)
Now readNext defaults to unaligned accesses. This patch drops
unaligned to improve readability.
Commit: 281d71604f418eb952e967d9dc4b26241b7f96aa
https://github.com/llvm/llvm-project/commit/281d71604f418eb952e967d9dc4b26241b7f96aa
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Target/TargetMachine.cpp
M llvm/test/CodeGen/X86/code-model-elf-text-sections.ll
Log Message:
-----------
[X86] Change how we treat functions with explicit sections as small/large (#88172)
Following #78348, we should treat functions with an explicit section as
small, unless the section name is (or has the prefix) ".ltext".
Clang emits global initializers into a ".text.startup" section on Linux.
If we mix small/medium code model object files with large code model
object files, we'll end up mixing sections with and without the large
section flag.
Reland of #87838 with a check for non-ELF platforms in
TargetMachine::isLargeGlobalValue(), otherwise MCJIT on Windows tests
fail.
Commit: 191be2a8a8531129c779bf23c4eec86f32c69bf9
https://github.com/llvm/llvm-project/commit/191be2a8a8531129c779bf23c4eec86f32c69bf9
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/stable_ir_values_funcs.ll
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/stable_ir_values_funcs.ll.expected
A llvm/test/tools/UpdateTestChecks/update_test_checks/stable_ir_values_funcs.test
Log Message:
-----------
update_test_checks: pre-commit a new test
The test shows that name preservation doesn't work properly when
--include-generated-funcs is used.
Commit: e770249d955e06f205e91017cd394d8670996168
https://github.com/llvm/llvm-project/commit/e770249d955e06f205e91017cd394d8670996168
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/phi-labels.ll
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/phi-labels.ll.expected
A llvm/test/tools/UpdateTestChecks/update_test_checks/phi-labels.test
Log Message:
-----------
update_test_checks: add new test
This test is meant to demonstrate an upcoming change that replaces basic
block labels by FileCheck patterns.
Commit: 377a2767a9951659b5ec7309abb78da719a4f93b
https://github.com/llvm/llvm-project/commit/377a2767a9951659b5ec7309abb78da719a4f93b
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/utils/UpdateTestChecks/common.py
Log Message:
-----------
update_test_checks: remove an unused function
Commit: 9ec6c5d26321f5d32d97218f850ae7cafda32b2e
https://github.com/llvm/llvm-project/commit/9ec6c5d26321f5d32d97218f850ae7cafda32b2e
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/test/Fir/cuf-invalid.fir
M flang/test/Fir/cuf.mlir
Log Message:
-----------
[flang][cuda] Add fir.deallocate operation (#88839)
Add the fir.cuda_deallocate operation that perform device deallocation
of data hold by a descriptor. This will replace the call to
AllocatableDeallocate from the runtime.
This is a companion operation to the one added in #88586
Commit: 34777c238b117b52dd41a9d12e8b54fb83677a12
https://github.com/llvm/llvm-project/commit/34777c238b117b52dd41a9d12e8b54fb83677a12
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanValue.h
A llvm/test/Transforms/LoopVectorize/blend-in-header.ll
Log Message:
-----------
[VPlan] Don't mark VPBlendRecipe as phi-like.
VPBlendRecipes don't get lowered to phis and usually do not appear at
the beginning of blocks, due to their masks appearing before them.
This effectively relaxes an over-eager verifier message.
Fixes https://github.com/llvm/llvm-project/issues/88297.
Fixes https://github.com/llvm/llvm-project/issues/88804.
Commit: b6bd41db31c798f3fc82368381fad6d42795f512
https://github.com/llvm/llvm-project/commit/b6bd41db31c798f3fc82368381fad6d42795f512
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/test/Headers/__clang_hip_math.hip
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/add-sitofp.ll
M llvm/test/Transforms/InstCombine/binop-itofp.ll
M llvm/test/Transforms/InstCombine/clamp-to-minmax.ll
M llvm/test/Transforms/InstCombine/fpcast.ll
M llvm/test/Transforms/InstCombine/minmax-fold.ll
M llvm/test/Transforms/InstCombine/minmax-fp.ll
M llvm/test/Transforms/InstCombine/pr27236.ll
M llvm/test/Transforms/InstCombine/sitofp.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
Log Message:
-----------
[InstCombine] Add canonicalization of `sitofp` -> `uitofp nneg`
This is essentially the same as #82404 but has the `nneg` flag which
allows the backend to reliably undo the transform.
Closes #88299
Commit: 885b8d9bb5192267cb2449a9ddec28e20ac9300e
https://github.com/llvm/llvm-project/commit/885b8d9bb5192267cb2449a9ddec28e20ac9300e
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rv64xtheadba.ll
Log Message:
-----------
[RISCV] Enable mul strength reduction for XTheadBa
This vendor extension has the same shift_add as zba, and most of the same
patterns are duplicated. Enable it here too so the configurations don't
diverge.
Commit: c6e01627acf8591830ee1d211cff4d5388095f3d
https://github.com/llvm/llvm-project/commit/c6e01627acf8591830ee1d211cff4d5388095f3d
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/select-reduction-start-value-may-be-undef-or-poison.ll
Log Message:
-----------
Revert "Reapply "[LV] Improve AnyOf reduction codegen. (#78304)""
This reverts commit c6e38b928c56f562aea68a8e90f02dbdf0eada85.
Causes miscompiles, see comments on #78304.
Commit: 266b2a26408c42ed1ac84ef38dfc41695423d9da
https://github.com/llvm/llvm-project/commit/266b2a26408c42ed1ac84ef38dfc41695423d9da
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
A llvm/test/Transforms/InstCombine/known-fpclass-reduce-signbit.ll
M llvm/test/Transforms/InstSimplify/known-never-infinity.ll
Log Message:
-----------
[ValueTracking] Add tests for `computeKnownFPClass` of `llvm.vector.reduce.{fmin,fmax,fmaximum,fminimum}`; NFC
Commit: 9eeae4421198b99eab3ae9a4ff678fda26bbda2a
https://github.com/llvm/llvm-project/commit/9eeae4421198b99eab3ae9a4ff678fda26bbda2a
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/known-fpclass-reduce-signbit.ll
M llvm/test/Transforms/InstSimplify/known-never-infinity.ll
Log Message:
-----------
[ValueTracking] Implement `computeKnownFPClass` for `llvm.vector.reduce.{fmin,fmax,fmaximum,fminimum}`
Closes #88408
Commit: d19bd05c79ad3b1a2c3cb439c3fc60825f66bed7
https://github.com/llvm/llvm-project/commit/d19bd05c79ad3b1a2c3cb439c3fc60825f66bed7
Author: Hubert Tong <hubert-reinterpretcast at users.noreply.github.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
Clang Release Notes: Fix reST formatting
Fix a use of inline code markup to have a non-word character after the ending delimiter as required by reST.
Commit: 3074060d6a1d7d2e74cb767876bd9e5192d12007
https://github.com/llvm/llvm-project/commit/3074060d6a1d7d2e74cb767876bd9e5192d12007
Author: Kazu Hirata <kazu at google.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Use SizeIs (NFC) (#88984)
Commit: b1385dbd98e877a374ce303fd9d1774faf98e31b
https://github.com/llvm/llvm-project/commit/b1385dbd98e877a374ce303fd9d1774faf98e31b
Author: Michael Jones <michaelrj at google.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M libc/hdr/types/CMakeLists.txt
Log Message:
-----------
[libc][NFC] fix typo in fenv type proxy headers (#88982)
libc.incude.fenv ->
libc.include.fenv
Commit: 8aa061ffc75adfab4b3084c918e7d4a3ccd5ba43
https://github.com/llvm/llvm-project/commit/8aa061ffc75adfab4b3084c918e7d4a3ccd5ba43
Author: Peiming Liu <peiming at google.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
Log Message:
-----------
[mlir][sparse][NFC] switching to using `let argments/results` in td files (#88994)
followed the same style used in "TensorOps.td".
Commit: 9067070d91e9d8cdd8509ffa56a076f08a3d7281
https://github.com/llvm/llvm-project/commit/9067070d91e9d8cdd8509ffa56a076f08a3d7281
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M clang/test/Driver/riscv-features.c
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/memcpy-inline.ll
M llvm/test/CodeGen/RISCV/memcpy.ll
M llvm/test/CodeGen/RISCV/memset-inline.ll
M llvm/test/CodeGen/RISCV/pr56110.ll
M llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll
M llvm/test/CodeGen/RISCV/rvv/concat-vectors-constant-stride.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-combine.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
M llvm/test/CodeGen/RISCV/rvv/memcpy-inline.ll
M llvm/test/CodeGen/RISCV/rvv/memset-inline.ll
M llvm/test/CodeGen/RISCV/rvv/unaligned-loads-stores.ll
M llvm/test/CodeGen/RISCV/unaligned-load-store.ll
M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
Log Message:
-----------
[RISCV] Re-separate unaligned scalar and vector memory features in the backend. (#88954)
This is largely a revert of commit
e81796671890b59c110f8e41adc7ca26f8484d20.
As #88029 shows, there exists hardware that only supports unaligned
scalar.
I'm leaving how this gets exposed to the clang interface to a future
patch.
Commit: 988ffd06722e7e056b239efe497345ac97be33db
https://github.com/llvm/llvm-project/commit/988ffd06722e7e056b239efe497345ac97be33db
Author: Usama Hameed <u_hameed at apple.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M lldb/test/API/functionalities/asan/Makefile
M lldb/test/API/functionalities/asan/TestMemoryHistory.py
M lldb/test/API/functionalities/asan/TestReportData.py
Log Message:
-----------
Add asan tests for libsanitizers. (#88349) (#88962)
The previous patch was reverted because the test fails to build when
libsanitizers is not present. This patch catches the BuildError
exception and skips the test appropriately.
This patch tests LLDB integration with libsanitizers for ASan.
rdar://111856681
Commit: 50a371795bcfe0731f8882e42712dff33cbbef9b
https://github.com/llvm/llvm-project/commit/50a371795bcfe0731f8882e42712dff33cbbef9b
Author: darkbuck <michael.hliao at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrCMovSetCC.td
Log Message:
-----------
[X86] Fix instr desc of CFCMOV's 'mr' variants
- With the memory operand as the destination, 'mr' variants of CFCMOV
works like STORE and their memory operands should be input operands
instead of output ones.
Reviewers: XinWang10, arsenm
Pull Request: https://github.com/llvm/llvm-project/pull/88970
Commit: 1bc092181bf50d6be95b165e91bd906710710ca7
https://github.com/llvm/llvm-project/commit/1bc092181bf50d6be95b165e91bd906710710ca7
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[bazel] Add support for lldb-server (#88989)
Commit: be50a259f1fe77240b000f6b695b9b6394f4936b
https://github.com/llvm/llvm-project/commit/be50a259f1fe77240b000f6b695b9b6394f4936b
Author: Andy Kaylor <andrew.kaylor at intel.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/include/llvm/IR/InstrTypes.h
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/test/Transforms/InstCombine/fast-math.ll
M llvm/test/Transforms/InstCombine/fmul-pow.ll
M llvm/test/Transforms/InstCombine/fmul.ll
Log Message:
-----------
Update foldFMulReassoc to respect absent fast-math flags (#88589)
This change updates a few of the transformations in foldFMulReassoc to
respect absent fast-math flags in cases where fmul and fdiv, fadd, or fsub
instructions were being folded but the code was only checking for
fast-math flags on the fmul instruction and was transferring flags to
the folded instruction that were not present on the other original
instructions.
This fixes https://github.com/llvm/llvm-project/issues/82857
Commit: ce5381e22a50f354cf3d1763589f1daf155c481b
https://github.com/llvm/llvm-project/commit/ce5381e22a50f354cf3d1763589f1daf155c481b
Author: Prashant Kumar <pk5561 at gmail.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorization-unsupported.mlir
M mlir/test/Dialect/Linalg/vectorization.mlir
Log Message:
-----------
[mlir][vector] Determine vector sizes from the result shape in the ca… (#88249)
…se of tensor pack
When the vector sizes are not passed as inputs to the vector transform
operation, the vector sizes are queried from the static result shape in
the case of tensor.pack op.
Commit: 8c9f45e2decbb68dbf83794f98291b53f59390f8
https://github.com/llvm/llvm-project/commit/8c9f45e2decbb68dbf83794f98291b53f59390f8
Author: Eli Friedman <efriedma at quicinc.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/include/clang/Basic/arm_fp16.td
M clang/include/clang/Basic/arm_neon.td
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[ARM64EC] Fix arm_neon.h on ARM64EC. (#88572)
Since 97fe519d, in ARM64EC mode, we don't define `__aarch64__`. Fix
various preprocessor guards to account for this.
Commit: 8c9d814b66f7df274de41225575817188fbeed4f
https://github.com/llvm/llvm-project/commit/8c9d814b66f7df274de41225575817188fbeed4f
Author: Kai Sasaki <lewuathe at gmail.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
Log Message:
-----------
[mlir][complex] Fastmath flag for complex angle (#88658)
See
https://discourse.llvm.org/t/rfc-fastmath-flags-support-in-complex-dialect/71981
Commit: efd60556f759fbfa0fc0a5984463daeaef20799c
https://github.com/llvm/llvm-project/commit/efd60556f759fbfa0fc0a5984463daeaef20799c
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll
Log Message:
-----------
Revert "[SLP]Attempt to vectorize long stores, if short one failed."
This reverts commit 7d4e8c1f3bbfe976f4871c9cf953f76d771b0eda.
Contrary to the commit description, this does cause large
compile-time regressions (up to 10% on individual files).
Commit: 7c2688977567ea5ac1203daa3c452b541ef55f67
https://github.com/llvm/llvm-project/commit/7c2688977567ea5ac1203daa3c452b541ef55f67
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Target/Sparc/SparcInstrInfo.td
Log Message:
-----------
[Sparc] Fix instr desc of special register stores
- Those special register stores are STORE and their memory operands are
input operands instead of output ones.
Reviewers:
JDevlieghere, arsenm, yinying-lisa-li, koachan, PeimingLiu, jyknight, aartbik, matthias-springer
Reviewed By: arsenm
Pull Request: https://github.com/llvm/llvm-project/pull/88971
Commit: 62853a246ef131c4de73b63a141c85a0b14c75a5
https://github.com/llvm/llvm-project/commit/62853a246ef131c4de73b63a141c85a0b14c75a5
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
A llvm/test/TableGen/def-multiple-operands.td
M llvm/utils/TableGen/InstrInfoEmitter.cpp
Log Message:
-----------
[TableGen][InstrInfoEmitter] Count sub-operands on def operands
- If a def operand includes multiple sub-operands, count them when
generating instr info.
- Found issues in x86 and sparc backends, where memory operands of
store or store-like instructions are wrongly placed in the output
list.
Reviewers: jayfoad, arsenm, Pierre-vh
Reviewed By: arsenm
Pull Request: https://github.com/llvm/llvm-project/pull/88972
Commit: d0f718e06848774a4e9d0b253cf75c1408b5f41a
https://github.com/llvm/llvm-project/commit/d0f718e06848774a4e9d0b253cf75c1408b5f41a
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Initialization.h
M clang/include/clang/Sema/Overload.h
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
Revert "Improve stack usage to increase recursive initialization depth" (#89006)
Reverts llvm/llvm-project#88546
Leak and performance regression.
Details in #88546
Commit: 1f35e7227178843679d1d364bc5fc0bcfee2eb95
https://github.com/llvm/llvm-project/commit/1f35e7227178843679d1d364bc5fc0bcfee2eb95
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGen/builtin-allow-runtime-check.cpp
A clang/test/Sema/builtin-allow-runtime-check.c
Log Message:
-----------
[clang][builtin] Implement __builtin_allow_runtime_check (#87568)
RFC:
https://discourse.llvm.org/t/rfc-introduce-new-clang-builtin-builtin-allow-runtime-check/78281
---------
Co-authored-by: Noah Goldstein <goldstein.w.n at gmail.com>
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: 52a4d8123c2a9157f2e543945f7b6148da3ecfdb
https://github.com/llvm/llvm-project/commit/52a4d8123c2a9157f2e543945f7b6148da3ecfdb
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M bolt/include/bolt/Rewrite/RewriteInstance.h
Log Message:
-----------
[BOLT][NFC] Remove unused function (#89009)
getFileOffsetFor() was replaced with getFileOffsetForAddress().
Commit: 0af8caeb2fa4d68fcabe6297383d1cdf1cae8b87
https://github.com/llvm/llvm-project/commit/0af8caeb2fa4d68fcabe6297383d1cdf1cae8b87
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Rewrite/RewriteInstance.cpp
Log Message:
-----------
[BOLT][NFC] Remove another unused function (#89011)
RewriteInstance::isKSymtabSection() is deprecated.
Commit: f40f4fcee506deacda0594362509ee7dddcf5e37
https://github.com/llvm/llvm-project/commit/f40f4fcee506deacda0594362509ee7dddcf5e37
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-templates.cpp
M clang/include/clang/Analysis/Analyses/ExprMutationAnalyzer.h
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/unittests/Analysis/ExprMutationAnalyzerTest.cpp
Log Message:
-----------
[clang analysis] ExprMutationAnalyzer support recursive forwarding reference (#88843)
Reapply for #88765.
Partially fixes: #60895.
Commit: 3204f3e30b8e15ce6e5d10d5d7bfbaa7cf5cd1f4
https://github.com/llvm/llvm-project/commit/3204f3e30b8e15ce6e5d10d5d7bfbaa7cf5cd1f4
Author: Luke Lau <luke at igalia.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Log Message:
-----------
[RISCV] Convert VTYPE operand check to assert in RISCVInsertVSETVLI. NFC
The VTYPE operands of a vsetvli pseudo are always immediates
Commit: c81e5faa6f55d3e390b5e550f78ab08fc6a65ee9
https://github.com/llvm/llvm-project/commit/c81e5faa6f55d3e390b5e550f78ab08fc6a65ee9
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
A llvm/test/CodeGen/RISCV/rvv-cfi-info.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
Log Message:
-----------
[RISCV] Add CFI information for vector callee-saved registers (#86811)
Currently the CFI offset for RVV registers are not handled entirely,
this patch add those information for either stack unwinding or
debugger to work correctly on RVV callee-saved stack object.
Depends On D154576
Differential Revision: https://reviews.llvm.org/D156846
Commit: e6ecff8d95b9175e70e0d43e14c2975c8f69d718
https://github.com/llvm/llvm-project/commit/e6ecff8d95b9175e70e0d43e14c2975c8f69d718
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/docs/StandardCPlusPlusModules.rst
Log Message:
-----------
[C++20] [Modules] Add Release Notes and Documents for Reduced BMI
See
https://discourse.llvm.org/t/rfc-c-20-modules-introduce-thin-bmi-and-decls-hash/74755,
https://github.com/llvm/llvm-project/pull/75894 and
https://github.com/llvm/llvm-project/pull/85050 for the background.
Commit: eafd515ecaaa100623eebc7fa4d7c36a361bf708
https://github.com/llvm/llvm-project/commit/eafd515ecaaa100623eebc7fa4d7c36a361bf708
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/test/ClangScanDeps/error.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
Log Message:
-----------
[clang][deps] Support single-file mode for all formats (#88764)
The `clang-scan-deps` tool can be used for fast scanning of batches of
compilation commands passed in via the `-compilation-database` option.
This gets awkward in our tests where we have to resort to using
`.in`/`.template` JSON files and running them through `sed` in order to
embed LIT's `%t` variable into them. However, most of our tests only
need to pass single compilation command, so this dance is entirely
unnecessary.
This patch makes sure the existing "per-file" mode (where the
compilation command is passed in-line after the `--` argument) works for
all output formats, not only `P1689`.
Commit: 6a4eaf9b33d8091b7d09b2a30a3fc8993a01db31
https://github.com/llvm/llvm-project/commit/6a4eaf9b33d8091b7d09b2a30a3fc8993a01db31
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/test/ClangScanDeps/module-format.c
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/clang-scan-deps/Opts.td
Log Message:
-----------
[clang][deps] Add `-o` flag to specify output path (#88767)
This makes it possible to pass "-o /dev/null" to `clang-scan-deps` and
skip some potentially expensive work, making timings less noisy. Also
removes the need for stream redirection.
Commit: f71e25bb669d662f98823d6d81b3f918538c9239
https://github.com/llvm/llvm-project/commit/f71e25bb669d662f98823d6d81b3f918538c9239
Author: Kazu Hirata <kazu at google.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
Log Message:
-----------
[memprof] Simplify IndexedMemProfRecord::operator== (NFC) (#88986)
llvm::SmallVector::operator== exactly meets our needs.
Commit: fca2a493251597967d5d758ea0748c66dd29371a
https://github.com/llvm/llvm-project/commit/fca2a493251597967d5d758ea0748c66dd29371a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Log Message:
-----------
[RISCV] Simplify FindRegWithEncoding in copyPhysRegVector. NFC (#89001)
Instead of searching all encodings, we can convert the encoding back to
a register and use getMatchingSuperReg.
Commit: a6fcbcce8f79adfb2e4338859f3a41fc2538bad1
https://github.com/llvm/llvm-project/commit/a6fcbcce8f79adfb2e4338859f3a41fc2538bad1
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M libcxx/include/__chrono/formatter.h
M libcxx/test/std/time/time.syn/formatter.file_time.pass.cpp
M libcxx/test/std/time/time.syn/formatter.sys_time.pass.cpp
Log Message:
-----------
[libc++][TZDB] Improves time zone format specifiers. (#85797)
Per [tab:time.format.spec]
%z The offset from UTC as specified in ISO 8601-1:2019, subclause
5.3.4.1. For example -0430 refers to 4 hours 30 minutes behind UTC.
If the offset is zero, +0000 is used. The modified commands %Ez and
%Oz insert a : between the hours and minutes: -04:30. If the offset
information is not available, an exception of type format_error is
thrown.
Typically the modified versions Oz or Ez would have wording like
The modified command %OS produces the locale's alternative
representation.
In this case the modified version does not depend on the locale.
This change is a preparation for formatting sys_info which has time zone
information. The function time_put<_CharT>::put() does not have proper
time zone support, therefore it's a manual implementation.
Fixes https://github.com/llvm/llvm-project/issues/78184
Commit: e096c144921daba59963f15e89d2ca6fb32d3a78
https://github.com/llvm/llvm-project/commit/e096c144921daba59963f15e89d2ca6fb32d3a78
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/StaticAnalyzer/Checkers/cert/InvalidPtrChecker.cpp
A clang/test/Analysis/invalid-ptr-checker.cpp
Log Message:
-----------
[analyzer] Fix a security.cert.env.InvalidPtr crash
Fixes #88181
Commit: 024281d4d26344f9613b9115ea1fcbdbdba23235
https://github.com/llvm/llvm-project/commit/024281d4d26344f9613b9115ea1fcbdbdba23235
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/cert/InvalidPtrChecker.cpp
Log Message:
-----------
[analyzer] Harden security.cert.env.InvalidPtr checker fn matching
Relates to #88181
Commit: b851c7f1fc4fd83ea84d565bbdc30fd0d356788c
https://github.com/llvm/llvm-project/commit/b851c7f1fc4fd83ea84d565bbdc30fd0d356788c
Author: martinboehme <mboehme at google.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
[clang][dataflow] Support `StmtExpr` in `PropagateResultObject()`. (#88872)
This patch adds a test that assert-fails without the fix.
Commit: 47148832d4e3bf4901430732f1af6673147accb2
https://github.com/llvm/llvm-project/commit/47148832d4e3bf4901430732f1af6673147accb2
Author: Hideto Ueno <uenoku.tokotoko at gmail.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/include/mlir/Bindings/Python/PybindAdaptors.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/CAPI/IR/IR.cpp
M mlir/test/CAPI/ir.c
M mlir/test/python/ir/operation.py
Log Message:
-----------
[mlir][python] Add `walk` method to PyOperationBase (#87962)
This commit adds `walk` method to PyOperationBase that uses a python
object as a callback, e.g. `op.walk(callback)`. Currently callback must
return a walk result explicitly.
We(SiFive) have implemented walk method with python in our internal
python tool for a while. However the overhead of python is expensive and
it didn't scale well for large MLIR files. Just replacing walk with this
version reduced the entire execution time of the tool by 30~40% and
there are a few configs that the tool takes several hours to finish so
this commit significantly improves tool performance.
Commit: 1bccbe1f49abc39b9f980cf3f1b171da5541d1a4
https://github.com/llvm/llvm-project/commit/1bccbe1f49abc39b9f980cf3f1b171da5541d1a4
Author: martinboehme <mboehme at google.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
[clang][dataflow] Treat `BuiltinBitCastExpr` correctly in `PropagateResultObject()`. (#88875)
This patch includes a test that assert-fails without the fix.
Commit: 64c649585ca23a0c996d8814d2796cd348441d69
https://github.com/llvm/llvm-project/commit/64c649585ca23a0c996d8814d2796cd348441d69
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/SemaDecl.cpp
Log Message:
-----------
[clang][NFC] Move `Sema::SkipBodyInfo` into namespace scope
This makes it forward-declarable, and needed from splitting `Sema` up.
Commit: 16f188761da1df6ba5e6627b8742aacfec8e9ec5
https://github.com/llvm/llvm-project/commit/16f188761da1df6ba5e6627b8742aacfec8e9ec5
Author: YunQiang Su <syq at debian.org>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
Log Message:
-----------
CompilerRT: Normalize COMPILER_RT_DEFAULT_TARGET_TRIPLE (#88835)
If LLVM is configured with -DLLVM_DEFAULT_TARGET_TRIPLE, or compiler_rt
is configured with -DCOMPILER_RT_DEFAULT_TARGET_TRIPLE, while the
argument is not normalized, such as Debian-style vendor-less triple,
clang will try to find libclang_rt in lib/<normalized_triple>, while
libclang_rt is placed into lib/<triple_arg>.
Let's also place libclang_rt into lib/<normalized_triple>.
Commit: b090569685699abe4a8031ad442a0f81e373146b
https://github.com/llvm/llvm-project/commit/b090569685699abe4a8031ad442a0f81e373146b
Author: Jesse Huang <jesse.huang at sifive.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/unittests/Support/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Support Zama16b1p0 (#88474)
This patch adds the support for Zama16b version 1.0, which has been
added to RVA23U64 optional extensions recently
Commit: d35a64363bb851045387717d2ef7d6449b7b547f
https://github.com/llvm/llvm-project/commit/d35a64363bb851045387717d2ef7d6449b7b547f
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M clang/test/SemaCXX/PR41441.cpp
Log Message:
-----------
Revert "Fix test from #83124 and #88902"
This reverts commit 0a789ea8a829da345e46d8224d73b2ddaba6969f.
Breaks builds, see discussion in https://github.com/llvm/llvm-project/pull/83124
Commit: dbda478693104f78b142375862d66f3369ad8c78
https://github.com/llvm/llvm-project/commit/dbda478693104f78b142375862d66f3369ad8c78
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
R clang/test/SemaCXX/PR41441.cpp
A clang/test/SemaCXX/instantiate-new-placement-size.cpp
Log Message:
-----------
Revert "[Clang][Sema] placement new initializes typedef array with correct size (#88902)"
This reverts commit 5c6af605b307213453a9a043532b9293db21b5c6.
Breaks builds, see discussion in https://github.com/llvm/llvm-project/pull/83124
Commit: dd84d23adc84cc0c3d2b8fb8f0c353279d99d27a
https://github.com/llvm/llvm-project/commit/dd84d23adc84cc0c3d2b8fb8f0c353279d99d27a
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/TreeTransform.h
R clang/test/SemaCXX/instantiate-new-placement-size.cpp
Log Message:
-----------
Revert "[Clang][Sema] placement new initializes typedef array with correct size (#83124)"
This reverts commit c309dc6d0759b23b570c563f611530ff1a49e1bd.
Breaks builds, see discussion in https://github.com/llvm/llvm-project/pull/83124
Commit: bc3620d3a8b1be9534a5635431b0aa09cc50ff3c
https://github.com/llvm/llvm-project/commit/bc3620d3a8b1be9534a5635431b0aa09cc50ff3c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
A llvm/test/CodeGen/AMDGPU/amdgpu-libcall-sincos-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
Log Message:
-----------
AMDGPU: Move libcall simplify into PeepholeEP (#88853)
We were running this immediately on the incoming IR, which
is still littered with temporary allocas obscuring trivial values.
This needs to run after initial SROA to handle sincos insertion.
Commit: e11b17a4ed90e74147594012207fc35a60515944
https://github.com/llvm/llvm-project/commit/e11b17a4ed90e74147594012207fc35a60515944
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaExprObjC.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaPseudoObject.cpp
Log Message:
-----------
[clang][NFC] Refactor `Sema::CheckedConversionKind`
Convert it to scoped enum, and move it to namespace scope to enable forward declarations.
Commit: 49b209d0d1833a339e66735e1288c1805224603e
https://github.com/llvm/llvm-project/commit/49b209d0d1833a339e66735e1288c1805224603e
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M openmp/libomptarget/plugins-nextgen/common/include/PluginInterface.h
M openmp/libomptarget/plugins-nextgen/common/src/PluginInterface.cpp
Log Message:
-----------
Revert "[Libomptarget] Rework Record & Replay to be a plugin member" (#89028)
Reverts llvm/llvm-project#88928
This broke the AMDGPU buildbots:
https://lab.llvm.org/buildbot/#/builders/193/builds/50201
https://lab.llvm.org/staging/#/builders/185/builds/5565
https://lab.llvm.org/buildbot/#/builders/259/builds/2955
Commit: 9f3334e9932fc9b55cd3590b140913222454c031
https://github.com/llvm/llvm-project/commit/9f3334e9932fc9b55cd3590b140913222454c031
Author: Matthias Springer <me at m-sp.org>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
M mlir/lib/Dialect/SparseTensor/Transforms/SparsificationAndBufferizationPass.cpp
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_block3d.mlir
Log Message:
-----------
[mlir][SparseTensor] Add missing dependent dialect to pass (#88870)
This commit fixes the following error when stopping the sparse compiler
pipeline after bufferization (e.g., with `test-analysis-only`):
```
LLVM ERROR: Building op `vector.print` but it isn't known in this MLIRContext: the dialect may not be loaded or this operation hasn't been added by the dialect. See also https://mlir.llvm.org/getting_started/Faq/#registered-loaded-dependent-whats-up-with-dialects-management
```
Commit: 889dfd4ab35892840f2bd2d6d7fed6fac025e18e
https://github.com/llvm/llvm-project/commit/889dfd4ab35892840f2bd2d6d7fed6fac025e18e
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M libc/src/__support/macros/sanitizer.h
Log Message:
-----------
[libc][msan] Fix "non-constexpr function '__msan_unpoison' cannot be used in a constant expression" (#88719)
Prior to this patch, calling `cpp::bit_cast<T>` in `constexpr`
expressions under `-fsanitize=memory` would fail with the following
message "non-constexpr function '__msan_unpoison' cannot be used in a
constant expression".
This patch makes sure that the `__msan_unpoison` expression is guarded
by `!__builtin_is_constant_evaluated()`.
Commit: 17b86d5978af8d171fa28763a9e5eba3ce93713a
https://github.com/llvm/llvm-project/commit/17b86d5978af8d171fa28763a9e5eba3ce93713a
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M llvm/test/CodeGen/X86/combine-ptest.ll
Log Message:
-----------
[X86][NFC] Add test cases for pr88958
Commit: d1a69e4a6ee0b04778da7728123c47eef2290564
https://github.com/llvm/llvm-project/commit/d1a69e4a6ee0b04778da7728123c47eef2290564
Author: shamithoke <152091883+shamithoke at users.noreply.github.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
Move gfni for bitreverse check out of SSSE3. (#88938)
For lowering bitreverse using GFNI, the check is put under SSSE3. This can be pulled out of SSSE3.
Co-authored-by: shami <shami_thoke at yahoo.com>
Commit: a16bb0701409376dee3a587ae351a6019d6de4e0
https://github.com/llvm/llvm-project/commit/a16bb0701409376dee3a587ae351a6019d6de4e0
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/dotest.py
Log Message:
-----------
[lldb][test] Improve invalid compiler error message
I was debugging space separation issues when passing user arguments
and noticed this error is really hard to read in that scenario.
Put "" around the invalid compiler name so you can tell whether
you have spaces around it that's causing the problem.
Commit: d9a5aa8e2d755643cf4e7fa86aa831ed226fe54d
https://github.com/llvm/llvm-project/commit/d9a5aa8e2d755643cf4e7fa86aa831ed226fe54d
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/X86/x86-vector-shifts.ll
M llvm/test/Transforms/InstCombine/abs-1.ll
M llvm/test/Transforms/InstCombine/add-mask-neg.ll
M llvm/test/Transforms/InstCombine/add.ll
M llvm/test/Transforms/InstCombine/and-or-icmps.ll
M llvm/test/Transforms/InstCombine/and-xor-or.ll
M llvm/test/Transforms/InstCombine/and.ll
M llvm/test/Transforms/InstCombine/and2.ll
M llvm/test/Transforms/InstCombine/ashr-lshr.ll
M llvm/test/Transforms/InstCombine/ashr-or-mul-abs.ll
M llvm/test/Transforms/InstCombine/binop-and-shifts.ll
M llvm/test/Transforms/InstCombine/binop-of-displaced-shifts.ll
M llvm/test/Transforms/InstCombine/canonicalize-clamp-like-pattern-between-zero-and-positive-threshold.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sge-to-icmp-sle.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sgt-to-icmp-sgt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sle-to-icmp-sle.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-slt-to-icmp-sgt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-uge-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ugt-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ule-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ult-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v2-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v2-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v4-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v4-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/cast-int-icmp-eq-0.ll
M llvm/test/Transforms/InstCombine/cast-unsigned-icmp-eqcmp-0.ll
M llvm/test/Transforms/InstCombine/cast.ll
M llvm/test/Transforms/InstCombine/ctpop-cttz.ll
M llvm/test/Transforms/InstCombine/ctpop.ll
M llvm/test/Transforms/InstCombine/fabs-as-int.ll
M llvm/test/Transforms/InstCombine/fabs.ll
M llvm/test/Transforms/InstCombine/fast-math.ll
M llvm/test/Transforms/InstCombine/fcmp-special.ll
M llvm/test/Transforms/InstCombine/fcmp.ll
M llvm/test/Transforms/InstCombine/fdiv.ll
M llvm/test/Transforms/InstCombine/fma.ll
M llvm/test/Transforms/InstCombine/fmul.ll
M llvm/test/Transforms/InstCombine/fneg-as-int.ll
M llvm/test/Transforms/InstCombine/fneg-fabs-as-int.ll
M llvm/test/Transforms/InstCombine/fneg.ll
M llvm/test/Transforms/InstCombine/fold-inc-of-add-of-not-x-and-y-to-sub-x-from-y.ll
M llvm/test/Transforms/InstCombine/fold-sub-of-not-to-inc-of-add.ll
M llvm/test/Transforms/InstCombine/fpcast.ll
M llvm/test/Transforms/InstCombine/fsub.ll
M llvm/test/Transforms/InstCombine/funnel.ll
M llvm/test/Transforms/InstCombine/get-lowbitmask-upto-and-including-bit.ll
M llvm/test/Transforms/InstCombine/hoist-negation-out-of-bias-calculation.ll
M llvm/test/Transforms/InstCombine/hoist-not-from-ashr-operand.ll
M llvm/test/Transforms/InstCombine/icmp-uge-of-add-of-shl-one-by-bits-to-allones-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-uge-of-not-of-shl-allones-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-ugt-of-shl-1-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-ule-of-shl-1-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-ult-of-add-of-shl-one-by-bits-to-allones-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-ult-of-not-of-shl-allones-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp.ll
M llvm/test/Transforms/InstCombine/integer-round-up-pow2-alignment.ll
M llvm/test/Transforms/InstCombine/invert-variable-mask-in-masked-merge-vector.ll
M llvm/test/Transforms/InstCombine/lshr-and-negC-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/lshr-and-signbit-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/masked-merge-add.ll
M llvm/test/Transforms/InstCombine/masked-merge-or.ll
M llvm/test/Transforms/InstCombine/masked-merge-xor.ll
M llvm/test/Transforms/InstCombine/min-positive.ll
M llvm/test/Transforms/InstCombine/minmax-fold.ll
M llvm/test/Transforms/InstCombine/minmax-intrinsics.ll
M llvm/test/Transforms/InstCombine/mul-inseltpoison.ll
M llvm/test/Transforms/InstCombine/mul.ll
M llvm/test/Transforms/InstCombine/not-add.ll
M llvm/test/Transforms/InstCombine/not.ll
M llvm/test/Transforms/InstCombine/omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll
M llvm/test/Transforms/InstCombine/operand-complexity.ll
M llvm/test/Transforms/InstCombine/or.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-b.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-c.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-d.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-b.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-c.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-d.ll
M llvm/test/Transforms/InstCombine/pr53357.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-b.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-c.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-d.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-b.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-c.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-d.ll
M llvm/test/Transforms/InstCombine/reuse-constant-from-select-in-icmp.ll
M llvm/test/Transforms/InstCombine/rotate.ll
M llvm/test/Transforms/InstCombine/saturating-add-sub.ll
M llvm/test/Transforms/InstCombine/select-of-bittest.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/InstCombine/select_meta.ll
M llvm/test/Transforms/InstCombine/set-lowbits-mask-canonicalize.ll
M llvm/test/Transforms/InstCombine/sext.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-ashr.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-lshr.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation.ll
M llvm/test/Transforms/InstCombine/shift-logic.ll
M llvm/test/Transforms/InstCombine/shl-and-negC-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/shl-and-signbit-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/signmask-of-sext-vs-of-shl-of-zext.ll
M llvm/test/Transforms/InstCombine/sub-not.ll
M llvm/test/Transforms/InstCombine/sub.ll
M llvm/test/Transforms/InstCombine/trunc-inseltpoison.ll
M llvm/test/Transforms/InstCombine/trunc-shift-trunc.ll
M llvm/test/Transforms/InstCombine/trunc.ll
M llvm/test/Transforms/InstCombine/unsigned-mul-lack-of-overflow-check-via-udiv-of-allones.ll
M llvm/test/Transforms/InstCombine/unsigned-mul-overflow-check-via-udiv-of-allones.ll
M llvm/test/Transforms/InstCombine/variable-signext-of-variable-high-bit-extraction.ll
M llvm/test/Transforms/InstCombine/vec_sext.ll
M llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vector-casts.ll
M llvm/test/Transforms/InstCombine/vector-urem.ll
M llvm/test/Transforms/InstCombine/vector-xor.ll
M llvm/test/Transforms/InstCombine/zext-bool-add-sub.ll
M llvm/test/Transforms/InstSimplify/AndOrXor.ll
M llvm/test/Transforms/InstSimplify/call.ll
M llvm/test/Transforms/InstSimplify/compare.ll
M llvm/test/Transforms/InstSimplify/constantfold-add-nuw-allones-to-allones.ll
M llvm/test/Transforms/InstSimplify/constantfold-shl-nuw-C-to-C.ll
M llvm/test/Transforms/InstSimplify/div.ll
M llvm/test/Transforms/InstSimplify/fast-math-strictfp.ll
M llvm/test/Transforms/InstSimplify/fast-math.ll
M llvm/test/Transforms/InstSimplify/fdiv.ll
M llvm/test/Transforms/InstSimplify/floating-point-arithmetic-strictfp.ll
M llvm/test/Transforms/InstSimplify/floating-point-arithmetic.ll
M llvm/test/Transforms/InstSimplify/floating-point-compare.ll
M llvm/test/Transforms/InstSimplify/fminmax-folds.ll
M llvm/test/Transforms/InstSimplify/fp-nan.ll
M llvm/test/Transforms/InstSimplify/icmp-bool-constant.ll
M llvm/test/Transforms/InstSimplify/icmp-not-bool-constant.ll
M llvm/test/Transforms/InstSimplify/ldexp.ll
M llvm/test/Transforms/InstSimplify/mul.ll
M llvm/test/Transforms/InstSimplify/negate.ll
M llvm/test/Transforms/InstSimplify/or.ll
M llvm/test/Transforms/InstSimplify/ptrmask.ll
M llvm/test/Transforms/InstSimplify/rem.ll
M llvm/test/Transforms/InstSimplify/saturating-add-sub.ll
M llvm/test/Transforms/InstSimplify/sdiv.ll
M llvm/test/Transforms/InstSimplify/select-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/select.ll
M llvm/test/Transforms/InstSimplify/shift.ll
M llvm/test/Transforms/InstSimplify/srem.ll
M llvm/test/Transforms/InstSimplify/sub.ll
M llvm/test/Transforms/InstSimplify/xor.ll
M llvm/test/Transforms/Reassociate/inverses.ll
M llvm/test/Transforms/Reassociate/negation.ll
M llvm/unittests/IR/ConstantsTest.cpp
M llvm/unittests/IR/PatternMatch.cpp
Log Message:
-----------
[PatternMatch] Do not accept undef elements in m_AllOnes() and friends (#88217)
Change all the cstval_pred_ty based PatternMatch helpers (things like
m_AllOnes and m_Zero) to only allow poison elements inside vector
splats, not undef elements.
Historically, we used to represent non-demanded elements in vectors
using undef. Nowadays, we use poison instead. As such, I believe that
support for undef in vector splats is no longer useful.
At the same time, while poison splat elements are pretty much always
safe to ignore, this is not generally the case for undef elements. We
have existing miscompiles in our tests due to this (see the
masked-merge-*.ll tests changed here) and it's easy to miss such cases
in the future, now that we write tests using poison instead of undef
elements.
I think overall, keeping support for undef elements no longer makes
sense, and we should drop it. Once this is done consistently, I think we
may also consider allowing poison in m_APInt by default, as doing that
change is much less risky than doing the same with undef.
This change involves a substantial amount of test changes. For most
tests, I've just replaced undef with poison, as I don't think there is
value in retaining both. For some tests (where the distinction between
undef and poison is important), I've duplicated tests.
Commit: 971237dab259bdaa619403fc6472bd1758d4dc18
https://github.com/llvm/llvm-project/commit/971237dab259bdaa619403fc6472bd1758d4dc18
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M flang/include/flang/Lower/CallInterface.h
M flang/include/flang/Optimizer/Dialect/FIROpsSupport.h
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Optimizer/Transforms/ArrayValueCopy.cpp
A flang/test/Lower/HLFIR/internal-procedures-bindc-host.f90
M flang/test/Lower/HLFIR/internal-procedures.f90
M flang/test/Lower/OpenACC/acc-routine04.f90
M flang/test/Lower/OpenMP/threadprivate-host-association-2.f90
M flang/test/Lower/OpenMP/threadprivate-host-association.f90
M flang/test/Lower/character-elemental.f90
M flang/test/Lower/equivalence-with-host-assoc.f90
M flang/test/Lower/explicit-interface-results-2.f90
M flang/test/Lower/host-associated-functions.f90
M flang/test/Lower/host-associated-globals.f90
M flang/test/Lower/host-associated.f90
M flang/test/Lower/polymorphic.f90
Log Message:
-----------
[flang] Retain internal and BIND(C) host procedure link in FIR (#87796)
Currently, it is not possible to find back which fun.func is the host
procedure of some internal procedure because the mangling of the
internal procedure does not contain info about the BIND(C) name of the
host.
This info may be useful to ensure dwarf DW_TAG_subprogram of internal
procedures are nested under DW_TAG_subprogram of host procedures for
instance.
Commit: b512df660ef136f8bbd0895bf862a827923a6714
https://github.com/llvm/llvm-project/commit/b512df660ef136f8bbd0895bf862a827923a6714
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVRegisterBankInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVRegisterBanks.td
M llvm/lib/Target/SPIRV/SPIRVRegisterInfo.td
M llvm/test/CodeGen/SPIRV/instructions/select-phi.ll
A llvm/test/CodeGen/SPIRV/instructions/select-ptr-load.ll
M llvm/test/CodeGen/SPIRV/instructions/select.ll
A llvm/test/CodeGen/SPIRV/select-builtin.ll
R llvm/test/CodeGen/SPIRV/select.ll
Log Message:
-----------
[SPIR-V] Improve Tablegen instruction selection and account for a pointer size of the target (#88725)
This PR resolves the issue that SPIR-V Backend uses the notion of a
pointer size of the target, most notably, in legalizer code, but
Tablegen instruction selection in SPIR-V Backend doesn't account for a
pointer size of the target. See
https://github.com/llvm/llvm-project/issues/88723 for a detailed
description. There are 3 test cases attached to the PR that reproduced
the issue, when dealing with spirv32-spirv64 differences, and are
working correctly now with this PR.
Commit: 42d801d4e42ff8c47c3a24d562774851e3a424f5
https://github.com/llvm/llvm-project/commit/42d801d4e42ff8c47c3a24d562774851e3a424f5
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
A llvm/test/CodeGen/SPIRV/transcoding/memcpy-zext.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-private-array-initialization.ll
Log Message:
-----------
[SPIR-V] Account for zext in a llvm intrinsic call (#88903)
This PR addresses an issue that may arise when an integer argument size
differs from a machine word size for the target in a call to llvm
intrinsic. The following example demonstrates the issue:
```
@__const.test.arr = private unnamed_addr addrspace(2) constant [3 x i32] [i32 1, i32 2, i32 3]
define spir_func void @test() {
entry:
%arr = alloca [3 x i32], align 4
%dest = bitcast ptr %arr to ptr
call void @llvm.memcpy.p0.p2.i32(ptr align 4 %dest, ptr addrspace(2) align 4 @__const.test.arr, i32 1024, i1 false)
ret void
}
declare void @llvm.memcpy.p0.p2.i32(ptr nocapture writeonly, ptr addrspace(2) nocapture readonly, i32, i1)
```
Depending on the target this code may work or may fail without this PR
due to the fact that IR Translation step introduces additional `zext`
when type of the 3rd argument of `@llvm.memcpy.p0.p2.i32` differs from
machine word.
This PR addresses the issue by adding type deduction for a newly
inserted G_ZEXT generic opcode.
Commit: fa61f062a515be92a98cac64a9193498918c1225
https://github.com/llvm/llvm-project/commit/fa61f062a515be92a98cac64a9193498918c1225
Author: harishch4 <harishcse44 at gmail.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Lower/OpenMP/threadprivate-hlfir.f90
A flang/test/Semantics/OpenMP/threadprivate07.f90
Log Message:
-----------
Fix threadprivate variable scope inside BLOCK construct. (#88921)
When a local variable inside a BLOCK construct is used as threadprivate
variable, llvm-flang throws below error:
> error: The THREADPRIVATE directive and the common block or variable in
it must appear in the same declaration section of a scoping unit
Commit: cbe148b730a04fc95eda9a43903f0af487884a96
https://github.com/llvm/llvm-project/commit/cbe148b730a04fc95eda9a43903f0af487884a96
Author: Mel Chen <mel.chen at sifive.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV][NFC] Remove the declaration of function `fixReduction`. (#88491)
Commit: a9bafe91dd088c5fa6f074c14dd3a1af25f00457
https://github.com/llvm/llvm-project/commit/a9bafe91dd088c5fa6f074c14dd3a1af25f00457
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Split VPWidenMemoryInstructionRecipe (NFCI). (#87411)
This patch introduces a new VPWidenMemoryRecipe base class and distinct
sub-classes to model loads and stores.
This is a first step in an effort to simplify and modularize code
generation for widened loads and stores and enable adding further more
specialized memory recipes.
PR: https://github.com/llvm/llvm-project/pull/87411
Commit: f4737a2edd900df661750116821806bb45e4086a
https://github.com/llvm/llvm-project/commit/f4737a2edd900df661750116821806bb45e4086a
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/stable_ir_values_funcs.ll.expected
M llvm/utils/UpdateTestChecks/common.py
Log Message:
-----------
update_test_checks: keep names stable with generated functions (#87988)
Collect the original check lines in a manner that is independent of
where the check lines appear in the file. This is so that we keep
FileCheck variable names stable even when --include-generated-funcs is
used.
Reported-by: Ruiling Song <ruiling.song at amd.com>
Commit: 3eb0ba34b0a2a29c2f34ead2b84fdf9b62cb29c1
https://github.com/llvm/llvm-project/commit/3eb0ba34b0a2a29c2f34ead2b84fdf9b62cb29c1
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Lower/OpenMP/FIR/if-clause.f90
M flang/test/Lower/OpenMP/FIR/loop-combined.f90
M flang/test/Lower/OpenMP/FIR/parallel-private-clause.f90
M flang/test/Lower/OpenMP/FIR/simd.f90
M flang/test/Lower/OpenMP/if-clause.f90
M flang/test/Lower/OpenMP/loop-combined.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/simd.f90
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauseOperands.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
Log Message:
-----------
[MLIR][Flang][OpenMP] Make omp.simdloop into a loop wrapper (#87365)
This patch updates the definition of `omp.simdloop` to enforce the
restrictions of a wrapper operation. It has been renamed to `omp.simd`,
to better reflect the naming used in the spec. All uses of "simdloop" in
function names have been updated accordingly.
Some changes to Flang lowering and OpenMP to LLVM IR translation are
introduced to prevent the introduction of compilation/test failures. The
eventual long term solution might be different.
Commit: 16b0be613205a37519e2bfec1a904ceaa89636e7
https://github.com/llvm/llvm-project/commit/16b0be613205a37519e2bfec1a904ceaa89636e7
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Log Message:
-----------
[MLIR][OpenMP] NFC: Remove LoopControl parsing/printing code (#88909)
This patch removes the LoopControl parsing/printing functions that are
no longer used after transitioning `omp.simdloop` and `omp.taskloop`
into loop wrapper operations.
Commit: a02019960b1a693320cd43b0ed6653d95877b94f
https://github.com/llvm/llvm-project/commit/a02019960b1a693320cd43b0ed6653d95877b94f
Author: Luke Lau <luke at igalia.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/test/CodeGen/RISCV/rvv/vxrm.mir
Log Message:
-----------
[RISCV] Assert only valid AVLs in doLocalPostpass are X0 or virtual regs. NFC
In vxrm.mir we were running RISCVInsertVSETVLI on pseudos that already had
vsetvlis inserted and their AVLs set to $noreg. (This happened to work
since doLocalPostpass got rid of the extra vsetvli)
This removes the vsetvlis from the test and enforces that the only valid
AVLs we work with are either X0 or virtual registers (or $noreg before
emitVSETVLIs), since we don't handle physical registers properly in
doLocalPostpass.
Commit: b4aa3b63bc3d2d24e827f5d229f53e786a659d20
https://github.com/llvm/llvm-project/commit/b4aa3b63bc3d2d24e827f5d229f53e786a659d20
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-04-17 (Wed, 17 Apr 2024)
Changed paths:
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Rewrite/RewriteInstance.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-templates.cpp
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/StandardCPlusPlusModules.rst
M clang/include/clang/Analysis/Analyses/ExprMutationAnalyzer.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/arm_fp16.td
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/Sema/Initialization.h
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/Sema.h
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaExprObjC.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaPseudoObject.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/StaticAnalyzer/Checkers/cert/InvalidPtrChecker.cpp
A clang/test/Analysis/invalid-ptr-checker.cpp
M clang/test/ClangScanDeps/error.cpp
M clang/test/ClangScanDeps/module-format.c
A clang/test/CodeGen/builtin-allow-runtime-check.cpp
M clang/test/Driver/riscv-features.c
M clang/test/Headers/__clang_hip_math.hip
M clang/test/Preprocessor/riscv-target-features.c
A clang/test/Sema/builtin-allow-runtime-check.c
R clang/test/SemaCXX/PR41441.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/clang-scan-deps/Opts.td
M clang/unittests/Analysis/ExprMutationAnalyzerTest.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M flang/include/flang/Lower/CallInterface.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIROpsSupport.h
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Transforms/ArrayValueCopy.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Fir/cuf-invalid.fir
M flang/test/Fir/cuf.mlir
A flang/test/Lower/HLFIR/internal-procedures-bindc-host.f90
M flang/test/Lower/HLFIR/internal-procedures.f90
M flang/test/Lower/OpenACC/acc-routine04.f90
M flang/test/Lower/OpenMP/FIR/if-clause.f90
M flang/test/Lower/OpenMP/FIR/loop-combined.f90
M flang/test/Lower/OpenMP/FIR/parallel-private-clause.f90
M flang/test/Lower/OpenMP/FIR/simd.f90
M flang/test/Lower/OpenMP/if-clause.f90
M flang/test/Lower/OpenMP/loop-combined.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/simd.f90
M flang/test/Lower/OpenMP/threadprivate-hlfir.f90
M flang/test/Lower/OpenMP/threadprivate-host-association-2.f90
M flang/test/Lower/OpenMP/threadprivate-host-association.f90
M flang/test/Lower/character-elemental.f90
M flang/test/Lower/equivalence-with-host-assoc.f90
M flang/test/Lower/explicit-interface-results-2.f90
M flang/test/Lower/host-associated-functions.f90
M flang/test/Lower/host-associated-globals.f90
M flang/test/Lower/host-associated.f90
M flang/test/Lower/polymorphic.f90
A flang/test/Semantics/OpenMP/threadprivate07.f90
M libc/hdr/types/CMakeLists.txt
M libc/src/__support/macros/sanitizer.h
M libcxx/include/__chrono/formatter.h
M libcxx/test/std/time/time.syn/formatter.file_time.pass.cpp
M libcxx/test/std/time/time.syn/formatter.sys_time.pass.cpp
M lldb/packages/Python/lldbsuite/test/dotest.py
M lldb/test/API/functionalities/asan/Makefile
M lldb/test/API/functionalities/asan/TestMemoryHistory.py
M lldb/test/API/functionalities/asan/TestReportData.py
M llvm/docs/RISCVUsage.rst
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/MC/MCPseudoProbe.cpp
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/MemProf.cpp
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVRegisterBankInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVRegisterBanks.td
M llvm/lib/Target/SPIRV/SPIRVRegisterInfo.td
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/lib/Target/TargetMachine.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrCMovSetCC.td
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
A llvm/test/CodeGen/AMDGPU/amdgpu-libcall-sincos-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/memcpy-inline.ll
M llvm/test/CodeGen/RISCV/memcpy.ll
M llvm/test/CodeGen/RISCV/memset-inline.ll
M llvm/test/CodeGen/RISCV/pr56110.ll
M llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll
M llvm/test/CodeGen/RISCV/rv64xtheadba.ll
A llvm/test/CodeGen/RISCV/rvv-cfi-info.ll
M llvm/test/CodeGen/RISCV/rvv/concat-vectors-constant-stride.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-combine.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
M llvm/test/CodeGen/RISCV/rvv/memcpy-inline.ll
M llvm/test/CodeGen/RISCV/rvv/memset-inline.ll
M llvm/test/CodeGen/RISCV/rvv/unaligned-loads-stores.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm.mir
M llvm/test/CodeGen/RISCV/unaligned-load-store.ll
M llvm/test/CodeGen/SPIRV/instructions/select-phi.ll
A llvm/test/CodeGen/SPIRV/instructions/select-ptr-load.ll
M llvm/test/CodeGen/SPIRV/instructions/select.ll
A llvm/test/CodeGen/SPIRV/select-builtin.ll
R llvm/test/CodeGen/SPIRV/select.ll
A llvm/test/CodeGen/SPIRV/transcoding/memcpy-zext.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-private-array-initialization.ll
M llvm/test/CodeGen/X86/code-model-elf-text-sections.ll
M llvm/test/CodeGen/X86/combine-ptest.ll
M llvm/test/MC/RISCV/attribute-arch.s
A llvm/test/TableGen/def-multiple-operands.td
M llvm/test/Transforms/InstCombine/X86/x86-vector-shifts.ll
M llvm/test/Transforms/InstCombine/abs-1.ll
M llvm/test/Transforms/InstCombine/add-mask-neg.ll
M llvm/test/Transforms/InstCombine/add-sitofp.ll
M llvm/test/Transforms/InstCombine/add.ll
M llvm/test/Transforms/InstCombine/and-or-icmps.ll
M llvm/test/Transforms/InstCombine/and-xor-or.ll
M llvm/test/Transforms/InstCombine/and.ll
M llvm/test/Transforms/InstCombine/and2.ll
M llvm/test/Transforms/InstCombine/ashr-lshr.ll
M llvm/test/Transforms/InstCombine/ashr-or-mul-abs.ll
M llvm/test/Transforms/InstCombine/binop-and-shifts.ll
M llvm/test/Transforms/InstCombine/binop-itofp.ll
M llvm/test/Transforms/InstCombine/binop-of-displaced-shifts.ll
M llvm/test/Transforms/InstCombine/canonicalize-clamp-like-pattern-between-zero-and-positive-threshold.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sge-to-icmp-sle.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sgt-to-icmp-sgt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-sle-to-icmp-sle.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-slt-to-icmp-sgt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-uge-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ugt-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ule-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-constant-low-bit-mask-and-icmp-ult-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v2-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v2-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v4-and-icmp-eq-to-icmp-ule.ll
M llvm/test/Transforms/InstCombine/canonicalize-low-bit-mask-v4-and-icmp-ne-to-icmp-ugt.ll
M llvm/test/Transforms/InstCombine/cast-int-icmp-eq-0.ll
M llvm/test/Transforms/InstCombine/cast-unsigned-icmp-eqcmp-0.ll
M llvm/test/Transforms/InstCombine/cast.ll
M llvm/test/Transforms/InstCombine/clamp-to-minmax.ll
M llvm/test/Transforms/InstCombine/ctpop-cttz.ll
M llvm/test/Transforms/InstCombine/ctpop.ll
M llvm/test/Transforms/InstCombine/fabs-as-int.ll
M llvm/test/Transforms/InstCombine/fabs.ll
M llvm/test/Transforms/InstCombine/fast-math.ll
M llvm/test/Transforms/InstCombine/fcmp-special.ll
M llvm/test/Transforms/InstCombine/fcmp.ll
M llvm/test/Transforms/InstCombine/fdiv.ll
M llvm/test/Transforms/InstCombine/fma.ll
M llvm/test/Transforms/InstCombine/fmul-pow.ll
M llvm/test/Transforms/InstCombine/fmul.ll
M llvm/test/Transforms/InstCombine/fneg-as-int.ll
M llvm/test/Transforms/InstCombine/fneg-fabs-as-int.ll
M llvm/test/Transforms/InstCombine/fneg.ll
M llvm/test/Transforms/InstCombine/fold-inc-of-add-of-not-x-and-y-to-sub-x-from-y.ll
M llvm/test/Transforms/InstCombine/fold-sub-of-not-to-inc-of-add.ll
M llvm/test/Transforms/InstCombine/fpcast.ll
M llvm/test/Transforms/InstCombine/fsub.ll
M llvm/test/Transforms/InstCombine/funnel.ll
M llvm/test/Transforms/InstCombine/get-lowbitmask-upto-and-including-bit.ll
M llvm/test/Transforms/InstCombine/hoist-negation-out-of-bias-calculation.ll
M llvm/test/Transforms/InstCombine/hoist-not-from-ashr-operand.ll
M llvm/test/Transforms/InstCombine/icmp-uge-of-add-of-shl-one-by-bits-to-allones-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-uge-of-not-of-shl-allones-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-ugt-of-shl-1-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-ule-of-shl-1-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-ult-of-add-of-shl-one-by-bits-to-allones-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-ult-of-not-of-shl-allones-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp.ll
M llvm/test/Transforms/InstCombine/integer-round-up-pow2-alignment.ll
M llvm/test/Transforms/InstCombine/invert-variable-mask-in-masked-merge-vector.ll
A llvm/test/Transforms/InstCombine/known-fpclass-reduce-signbit.ll
M llvm/test/Transforms/InstCombine/lshr-and-negC-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/lshr-and-signbit-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/masked-merge-add.ll
M llvm/test/Transforms/InstCombine/masked-merge-or.ll
M llvm/test/Transforms/InstCombine/masked-merge-xor.ll
M llvm/test/Transforms/InstCombine/min-positive.ll
M llvm/test/Transforms/InstCombine/minmax-fold.ll
M llvm/test/Transforms/InstCombine/minmax-fp.ll
M llvm/test/Transforms/InstCombine/minmax-intrinsics.ll
M llvm/test/Transforms/InstCombine/mul-inseltpoison.ll
M llvm/test/Transforms/InstCombine/mul.ll
M llvm/test/Transforms/InstCombine/not-add.ll
M llvm/test/Transforms/InstCombine/not.ll
M llvm/test/Transforms/InstCombine/omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll
M llvm/test/Transforms/InstCombine/operand-complexity.ll
M llvm/test/Transforms/InstCombine/or.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-b.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-c.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-d.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-b.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-c.ll
M llvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-d.ll
M llvm/test/Transforms/InstCombine/pr27236.ll
M llvm/test/Transforms/InstCombine/pr53357.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-b.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-c.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-d.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-b.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-c.ll
M llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-d.ll
M llvm/test/Transforms/InstCombine/reuse-constant-from-select-in-icmp.ll
M llvm/test/Transforms/InstCombine/rotate.ll
M llvm/test/Transforms/InstCombine/saturating-add-sub.ll
M llvm/test/Transforms/InstCombine/select-of-bittest.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/InstCombine/select_meta.ll
M llvm/test/Transforms/InstCombine/set-lowbits-mask-canonicalize.ll
M llvm/test/Transforms/InstCombine/sext.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-ashr.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-lshr.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation.ll
M llvm/test/Transforms/InstCombine/shift-logic.ll
M llvm/test/Transforms/InstCombine/shl-and-negC-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/shl-and-signbit-icmpeq-zero.ll
M llvm/test/Transforms/InstCombine/signmask-of-sext-vs-of-shl-of-zext.ll
M llvm/test/Transforms/InstCombine/sitofp.ll
M llvm/test/Transforms/InstCombine/sub-not.ll
M llvm/test/Transforms/InstCombine/sub.ll
M llvm/test/Transforms/InstCombine/trunc-inseltpoison.ll
M llvm/test/Transforms/InstCombine/trunc-shift-trunc.ll
M llvm/test/Transforms/InstCombine/trunc.ll
M llvm/test/Transforms/InstCombine/unsigned-mul-lack-of-overflow-check-via-udiv-of-allones.ll
M llvm/test/Transforms/InstCombine/unsigned-mul-overflow-check-via-udiv-of-allones.ll
M llvm/test/Transforms/InstCombine/variable-signext-of-variable-high-bit-extraction.ll
M llvm/test/Transforms/InstCombine/vec_sext.ll
M llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vector-casts.ll
M llvm/test/Transforms/InstCombine/vector-urem.ll
M llvm/test/Transforms/InstCombine/vector-xor.ll
M llvm/test/Transforms/InstCombine/zext-bool-add-sub.ll
M llvm/test/Transforms/InstSimplify/AndOrXor.ll
M llvm/test/Transforms/InstSimplify/call.ll
M llvm/test/Transforms/InstSimplify/compare.ll
M llvm/test/Transforms/InstSimplify/constantfold-add-nuw-allones-to-allones.ll
M llvm/test/Transforms/InstSimplify/constantfold-shl-nuw-C-to-C.ll
M llvm/test/Transforms/InstSimplify/div.ll
M llvm/test/Transforms/InstSimplify/fast-math-strictfp.ll
M llvm/test/Transforms/InstSimplify/fast-math.ll
M llvm/test/Transforms/InstSimplify/fdiv.ll
M llvm/test/Transforms/InstSimplify/floating-point-arithmetic-strictfp.ll
M llvm/test/Transforms/InstSimplify/floating-point-arithmetic.ll
M llvm/test/Transforms/InstSimplify/floating-point-compare.ll
M llvm/test/Transforms/InstSimplify/fminmax-folds.ll
M llvm/test/Transforms/InstSimplify/fp-nan.ll
M llvm/test/Transforms/InstSimplify/icmp-bool-constant.ll
M llvm/test/Transforms/InstSimplify/icmp-not-bool-constant.ll
M llvm/test/Transforms/InstSimplify/known-never-infinity.ll
M llvm/test/Transforms/InstSimplify/ldexp.ll
M llvm/test/Transforms/InstSimplify/mul.ll
M llvm/test/Transforms/InstSimplify/negate.ll
M llvm/test/Transforms/InstSimplify/or.ll
M llvm/test/Transforms/InstSimplify/ptrmask.ll
M llvm/test/Transforms/InstSimplify/rem.ll
M llvm/test/Transforms/InstSimplify/saturating-add-sub.ll
M llvm/test/Transforms/InstSimplify/sdiv.ll
M llvm/test/Transforms/InstSimplify/select-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/select.ll
M llvm/test/Transforms/InstSimplify/shift.ll
M llvm/test/Transforms/InstSimplify/srem.ll
M llvm/test/Transforms/InstSimplify/sub.ll
M llvm/test/Transforms/InstSimplify/xor.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
A llvm/test/Transforms/LoopVectorize/blend-in-header.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-predicated.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/select-reduction-start-value-may-be-undef-or-poison.ll
M llvm/test/Transforms/Reassociate/inverses.ll
M llvm/test/Transforms/Reassociate/negation.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/phi-labels.ll
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/phi-labels.ll.expected
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/stable_ir_values_funcs.ll
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/stable_ir_values_funcs.ll.expected
A llvm/test/tools/UpdateTestChecks/update_test_checks/phi-labels.test
A llvm/test/tools/UpdateTestChecks/update_test_checks/stable_ir_values_funcs.test
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/ConstantsTest.cpp
M llvm/unittests/IR/PatternMatch.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
M llvm/unittests/Support/RISCVISAInfoTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/utils/TableGen/InstrInfoEmitter.cpp
M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
M llvm/utils/UpdateTestChecks/common.py
M mlir/include/mlir-c/IR.h
M mlir/include/mlir/Bindings/Python/PybindAdaptors.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauseOperands.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/CAPI/IR/IR.cpp
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparsificationAndBufferizationPass.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/CAPI/ir.c
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
M mlir/test/Dialect/Linalg/vectorization-unsupported.mlir
M mlir/test/Dialect/Linalg/vectorization.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_block3d.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/python/ir/operation.py
M openmp/libomptarget/plugins-nextgen/common/include/PluginInterface.h
M openmp/libomptarget/plugins-nextgen/common/src/PluginInterface.cpp
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
Rebase, address comment
Created using spr 1.3.5
Compare: https://github.com/llvm/llvm-project/compare/31384979c896...b4aa3b63bc3d
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