[all-commits] [llvm/llvm-project] b512df: [SPIR-V] Improve Tablegen instruction selection an...

[Vyacheslav Levytskyy via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b512df660ef136f8bbd0895bf862a827923a6714
      https://github.com/llvm/llvm-project/commit/b512df660ef136f8bbd0895bf862a827923a6714
  Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
  Date:   2024-04-17 (Wed, 17 Apr 2024)

  Changed paths:
    M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
    M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
    M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
    M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
    M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
    M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
    M llvm/lib/Target/SPIRV/SPIRVRegisterBankInfo.cpp
    M llvm/lib/Target/SPIRV/SPIRVRegisterBanks.td
    M llvm/lib/Target/SPIRV/SPIRVRegisterInfo.td
    M llvm/test/CodeGen/SPIRV/instructions/select-phi.ll
    A llvm/test/CodeGen/SPIRV/instructions/select-ptr-load.ll
    M llvm/test/CodeGen/SPIRV/instructions/select.ll
    A llvm/test/CodeGen/SPIRV/select-builtin.ll
    R llvm/test/CodeGen/SPIRV/select.ll

  Log Message:
  -----------
  [SPIR-V] Improve Tablegen instruction selection and account for a pointer size of the target (#88725)

This PR resolves the issue that SPIR-V Backend uses the notion of a
pointer size of the target, most notably, in legalizer code, but
Tablegen instruction selection in SPIR-V Backend doesn't account for a
pointer size of the target. See
https://github.com/llvm/llvm-project/issues/88723 for a detailed
description. There are 3 test cases attached to the PR that reproduced
the issue, when dealing with spirv32-spirv64 differences, and are
working correctly now with this PR.



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