[all-commits] [llvm/llvm-project] c81e5f: [RISCV] Add CFI information for vector callee-save...

[Brandon Wu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c81e5faa6f55d3e390b5e550f78ab08fc6a65ee9
      https://github.com/llvm/llvm-project/commit/c81e5faa6f55d3e390b5e550f78ab08fc6a65ee9
  Author: Brandon Wu <brandon.wu at sifive.com>
  Date:   2024-04-17 (Wed, 17 Apr 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
    M llvm/lib/Target/RISCV/RISCVFrameLowering.h
    A llvm/test/CodeGen/RISCV/rvv-cfi-info.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll

  Log Message:
  -----------
  [RISCV] Add CFI information for vector callee-saved registers (#86811)

Currently the CFI offset for RVV registers are not handled entirely,
this patch add those information for either stack unwinding or
debugger to work correctly on RVV callee-saved stack object.

Depends On D154576

Differential Revision: https://reviews.llvm.org/D156846



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