[all-commits] [llvm/llvm-project] dad065: [mlir][ods] Fix attribute setter gen when properti...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Thu Apr 4 14:20:23 PDT 2024
Branch: refs/heads/users/vitalybuka/spr/hwasanubsan-dont-use-default-profile-summary-cutoff-hot
Home: https://github.com/llvm/llvm-project
Commit: dad065dc6e03725aeb60d703cbaccd175a2f1d53
https://github.com/llvm/llvm-project/commit/dad065dc6e03725aeb60d703cbaccd175a2f1d53
Author: Jeff Niu <jeff at modular.com>
Date: 2024-04-04 (Thu, 04 Apr 2024)
Changed paths:
A mlir/test/mlir-tblgen/op-properties.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Log Message:
-----------
[mlir][ods] Fix attribute setter gen when properties are on (#87688)
ODS was still generating the old `Operation::setAttr` hooks for ODS
methods for setting attributes, when the backing implementation of the
attributes was changed to properties. No idea how this wasn't noticed
until now.
Commit: f2a0dd3305beb0e69eb165c31c40214c16278697
https://github.com/llvm/llvm-project/commit/f2a0dd3305beb0e69eb165c31c40214c16278697
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-04-04 (Thu, 04 Apr 2024)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/cuf03.cuf
Log Message:
-----------
[flang][cuda] Add restriction on assumed size device variable (#87664)
According to
https://docs.nvidia.com/hpc-sdk/compilers/cuda-fortran-prog-guide/#cfpg-var-qual-attr-device
> A device array may be an explicit-shape array, an allocatable array,
or an assumed-shape dummy array.
Assumed size array are not supported. This patch adds an error for that
case.
Commit: c91a0a28908ec48f3775cdacede66163eb6339ff
https://github.com/llvm/llvm-project/commit/c91a0a28908ec48f3775cdacede66163eb6339ff
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-04-04 (Thu, 04 Apr 2024)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.td
Log Message:
-----------
[builtin][NFC] Remove ClangBuiltin<"__builtin_allow_ubsan_check"> (#87581)
We don't need clang builtin for this one.
It was copy pasted from `__builtin_allow_runtime_check`
RFC:
https://discourse.llvm.org/t/rfc-add-llvm-experimental-hot-intrinsic-or-llvm-hot/77641
Commit: dfaa144d0ca15839d1d11af472a4b7e2d2c6b7ec
https://github.com/llvm/llvm-project/commit/dfaa144d0ca15839d1d11af472a4b7e2d2c6b7ec
Author: Florian Mayer <fmayer at google.com>
Date: 2024-04-04 (Thu, 04 Apr 2024)
Changed paths:
M compiler-rt/lib/hwasan/hwasan_thread_list.h
Log Message:
-----------
[NFC] [HWASan] clarify FIXME comment (#87689)
Commit: df69a305253f1d1b4a4066055a07101a4cc03e55
https://github.com/llvm/llvm-project/commit/df69a305253f1d1b4a4066055a07101a4cc03e55
Author: Ian Anderson <iana at apple.com>
Date: 2024-04-04 (Thu, 04 Apr 2024)
Changed paths:
M clang/lib/Headers/__stddef_unreachable.h
Log Message:
-----------
[Headers] Don't declare unreachable() from stddef.h in C++ (#86748)
Even if __need_unreachable is set, stddef.h should not declare
unreachable() in C++ because it conflicts with the declaration in
\<utility>.
Commit: 74373c1bef3d35b03c9dc6186229abf74556b256
https://github.com/llvm/llvm-project/commit/74373c1bef3d35b03c9dc6186229abf74556b256
Author: Victor Campos <victor.campos at arm.com>
Date: 2024-04-04 (Thu, 04 Apr 2024)
Changed paths:
M llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
M llvm/lib/Target/ARM/Thumb2InstrInfo.h
R llvm/test/CodeGen/ARM/misched-branch-targets.mir
Log Message:
-----------
Revert "[ARM][Thumb2] Mark BTI-clearing instructions as scheduling region boundaries" (#87699)
Reverts llvm/llvm-project#79173
The testcase fails in non-asserts builds.
Commit: fd2a5c46d8450f0f37a468d4e5f06a9662abae2d
https://github.com/llvm/llvm-project/commit/fd2a5c46d8450f0f37a468d4e5f06a9662abae2d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-04-04 (Thu, 04 Apr 2024)
Changed paths:
M llvm/lib/ProfileData/InstrProfWriter.cpp
Log Message:
-----------
[memprof] Introduce writeMemProf (NFC) (#87698)
This patch refactors the serialization of MemProf data to a switch
statement style:
switch (Version) {
case Version0:
return ...;
case Version1:
return ...;
}
just like IndexedMemProfRecord::serialize.
A reasonable amount of code is shared and factored out to helper
functions between writeMemProfV0 and writeMemProfV1 to the extent that
doens't hamper readability.
Commit: 5aeb604c7ce417eea110f9803a6c5cb1cdbc5372
https://github.com/llvm/llvm-project/commit/5aeb604c7ce417eea110f9803a6c5cb1cdbc5372
Author: MaheshRavishankar <1663364+MaheshRavishankar at users.noreply.github.com>
Date: 2024-04-04 (Thu, 04 Apr 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/LoopUtils.h
M mlir/include/mlir/Dialect/SCF/Utils/Utils.h
M mlir/include/mlir/IR/PatternMatch.h
M mlir/lib/Dialect/Affine/Transforms/LoopCoalescing.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/SCF/TransformOps/SCFTransformOps.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopCollapsing.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/IR/PatternMatch.cpp
M mlir/test/Dialect/Affine/loop-coalescing.mlir
M mlir/test/Dialect/SCF/transform-op-coalesce.mlir
M mlir/test/Transforms/parallel-loop-collapsing.mlir
M mlir/test/Transforms/single-parallel-loop-collapsing.mlir
Log Message:
-----------
[mlir][SCF] Modernize `coalesceLoops` method to handle `scf.for` loops with iter_args (#87019)
As part of this extension this change also does some general cleanup
1) Make all the methods take `RewriterBase` as arguments instead of
creating their own builders that tend to crash when used within
pattern rewrites
2) Split `coalesePerfectlyNestedLoops` into two separate methods, one
for `scf.for` and other for `affine.for`. The templatization didnt
seem to be buying much there.
Also general clean up of tests.
Commit: f5960c168dfe17c7599acea0a7d94a26545f4777
https://github.com/llvm/llvm-project/commit/f5960c168dfe17c7599acea0a7d94a26545f4777
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-04-04 (Thu, 04 Apr 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/comp.h
M libcxx/include/__algorithm/equal.h
M libcxx/include/__algorithm/mismatch.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/transform_reduce.h
M libcxx/include/__functional/operations.h
M libcxx/include/__functional/ranges_operations.h
M libcxx/include/__numeric/pstl_transform_reduce.h
A libcxx/include/__type_traits/desugars_to.h
R libcxx/include/__type_traits/operation_traits.h
M libcxx/include/libcxx.imp
M libcxx/include/module.modulemap
Log Message:
-----------
[libc++][NFC] Make __desugars_to a variable template and rename the header to desugars_to.h (#87337)
This improves compile times and memory usage slightly and removes some
boilerplate.
Commit: 5296454b1cfa458c80ed7876a30a351066735e74
https://github.com/llvm/llvm-project/commit/5296454b1cfa458c80ed7876a30a351066735e74
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-04-04 (Thu, 04 Apr 2024)
Changed paths:
M clang/lib/Headers/__stddef_unreachable.h
M compiler-rt/lib/hwasan/hwasan_thread_list.h
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/cuf03.cuf
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/comp.h
M libcxx/include/__algorithm/equal.h
M libcxx/include/__algorithm/mismatch.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/transform_reduce.h
M libcxx/include/__functional/operations.h
M libcxx/include/__functional/ranges_operations.h
M libcxx/include/__numeric/pstl_transform_reduce.h
A libcxx/include/__type_traits/desugars_to.h
R libcxx/include/__type_traits/operation_traits.h
M libcxx/include/libcxx.imp
M libcxx/include/module.modulemap
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
M llvm/lib/Target/ARM/Thumb2InstrInfo.h
R llvm/test/CodeGen/ARM/misched-branch-targets.mir
M mlir/include/mlir/Dialect/Affine/LoopUtils.h
M mlir/include/mlir/Dialect/SCF/Utils/Utils.h
M mlir/include/mlir/IR/PatternMatch.h
M mlir/lib/Dialect/Affine/Transforms/LoopCoalescing.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/SCF/TransformOps/SCFTransformOps.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopCollapsing.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/IR/PatternMatch.cpp
M mlir/test/Dialect/Affine/loop-coalescing.mlir
M mlir/test/Dialect/SCF/transform-op-coalesce.mlir
M mlir/test/Transforms/parallel-loop-collapsing.mlir
M mlir/test/Transforms/single-parallel-loop-collapsing.mlir
A mlir/test/mlir-tblgen/op-properties.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Log Message:
-----------
rebase
Created using spr 1.3.4
Compare: https://github.com/llvm/llvm-project/compare/c5e47509bf97...5296454b1cfa
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