[all-commits] [llvm/llvm-project] e0e615: Revert "[MLIR][LLVM][Mem2Reg] Relax type equality ...

Christian Ulmann via All-commits all-commits at lists.llvm.org
Thu Apr 4 06:07:40 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e0e615efac522365591119165a7691ce869de512
      https://github.com/llvm/llvm-project/commit/e0e615efac522365591119165a7691ce869de512
  Author: Christian Ulmann <christianulmann at gmail.com>
  Date:   2024-04-04 (Thu, 04 Apr 2024)

  Changed paths:
    M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
    M mlir/test/Dialect/LLVMIR/mem2reg.mlir

  Log Message:
  -----------
  Revert "[MLIR][LLVM][Mem2Reg] Relax type equality requirement for load and store (#87504)" (#87631)

This reverts commit d6e458219897fad0e460e663833b2190af48c06d as it
violates an assumption of Mem2Reg's block argument creation. Mem2Reg
strongly assumes that all involved values have the same type as the
alloca, which was relaxed by this PR. Therefore, branches got created
that jumped to basic blocks with differently typed block arguments.



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