[all-commits] [llvm/llvm-project] e29228: [AMDGPU][MC] Allow VOP3C dpp src1 to be imm or SGP...

Joe Nash via All-commits all-commits at lists.llvm.org
Wed Apr 3 11:51:48 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e29228efae67cadfd18c532f944d19b4e16ff229
      https://github.com/llvm/llvm-project/commit/e29228efae67cadfd18c532f944d19b4e16ff229
  Author: Joe Nash <joseph.nash at amd.com>
  Date:   2024-04-03 (Wed, 03 Apr 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/VOPCInstructions.td
    M llvm/lib/Target/AMDGPU/VOPInstructions.td
    M llvm/test/MC/AMDGPU/gfx1150_asm_features.s
    M llvm/test/MC/AMDGPU/gfx12_asm_features.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
    M llvm/test/MC/AMDGPU/gfx12_err.s
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp16.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp8.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp8.txt

  Log Message:
  -----------
  [AMDGPU][MC] Allow VOP3C dpp src1 to be imm or SGPR (#87418)

Allows src1 of VOP3 encoded VOPC to be an SGPR or inline immediate on
GFX1150Plus

The w32 and w64 _e64_dpp assembler only real instructions were unused,
and erroneously constructed in a way that bugged parsing of the new
instructions. They are removed.

This patch is a follow up to PR
https://github.com/llvm/llvm-project/pull/87382



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