[all-commits] [llvm/llvm-project] 6a13bb: [AMDGPU][MC] Enables sgpr or imm src1 for float VO...

[Joe Nash via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6a13bbf92f6f7f2f5d59dfda99ccca223c72eeef
      https://github.com/llvm/llvm-project/commit/6a13bbf92f6f7f2f5d59dfda99ccca223c72eeef
  Author: Joe Nash <Sisyph at users.noreply.github.com>
  Date:   2024-04-03 (Wed, 03 Apr 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/lib/Target/AMDGPU/VOP2Instructions.td
    M llvm/lib/Target/AMDGPU/VOPCInstructions.td
    M llvm/test/MC/AMDGPU/gfx1150_asm_features.s
    M llvm/test/MC/AMDGPU/gfx11_asm_err.s
    M llvm/test/MC/AMDGPU/gfx12_asm_features.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp16.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp8.s
    M llvm/test/MC/AMDGPU/gfx12_err.s
    M llvm/test/MC/AMDGPU/vop_dpp.s
    M llvm/test/MC/Disassembler/AMDGPU/gfx1150_dasm_features.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_features.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop2_dpp16.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop2_dpp8.txt

  Log Message:
  -----------
  [AMDGPU][MC] Enables sgpr or imm src1 for float VOP3 DPP, but excludi… (#87382)

…ng VOPC.

Fixes support on GFX1150 and GFX12 where src1 of e64_dpp instructions
should allow sgpr and imm operands.
PR #67461 added support for this with int operands, but it was missing a
piece for float.
Changing VOPC e64_dpp will be in a different patch because there is a
bug preventing that change.



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