[all-commits] [llvm/llvm-project] 7c178f: [lldb] Correct byte order check for 128 bit intege...

David Spickett via All-commits all-commits at lists.llvm.org
Wed Apr 3 08:06:16 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7c178fdf0094afbf4757d71b792bc159ddcac72f
      https://github.com/llvm/llvm-project/commit/7c178fdf0094afbf4757d71b792bc159ddcac72f
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-04-03 (Wed, 03 Apr 2024)

  Changed paths:
    M lldb/source/Utility/RegisterValue.cpp

  Log Message:
  -----------
  [lldb] Correct byte order check for 128 bit integer registers

Size was clearly not correct here. This call has been here since
the initial reformat of all of lldb so it has likely always been
incorrect.

(although registers don't typically have an endian, they are
just values, in the remote protocol register data is in target
endian)

This might have been a problem for Neon registers on big endian
AArch64, but only if the debug server describes them as integers.

lldb-server does not, they've always been vectors which doesn't
take this code path.

Not adding a test because the way I've mocked up a big endian
target in the past is using s390x as the architecture. This
apparently has some form of vector extension that may be 128 bit
but lldb doesn't support it.



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