[all-commits] [llvm/llvm-project] c9ae9b: Add more opcodes and fix tests

[Pengcheng Wang via All-commits]

  Branch: refs/heads/users/wangpc-pp/spr/riscv-generate-more-w-instructons
  Home:   https://github.com/llvm/llvm-project
  Commit: c9ae9bf76824ae2ec302adc685afe7b725bf6a9e
      https://github.com/llvm/llvm-project/commit/c9ae9bf76824ae2ec302adc685afe7b725bf6a9e
  Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
  Date:   2024-04-02 (Tue, 02 Apr 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
    M llvm/test/CodeGen/RISCV/prefer-w-inst.mir

  Log Message:
  -----------
  Add more opcodes and fix tests

Created using spr 1.3.6-beta.1



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