[all-commits] [llvm/llvm-project] 5b06de: [X86] Add isLogicOp helper to match ISD::AND/OR/XO...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5b06de7f99ef86c484f5fea5542c1868e798ac08
      https://github.com/llvm/llvm-project/commit/5b06de7f99ef86c484f5fea5542c1868e798ac08
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-03-28 (Thu, 28 Mar 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp

  Log Message:
  -----------
  [X86] Add isLogicOp helper to match ISD::AND/OR/XOR and X86ISD::ANDNP

We could easily support the X86ISD 'float' variants of the logic ops as well, but we don't have good test coverage at the moment (they're mainly for SSE1 targets).



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