[all-commits] [llvm/llvm-project] d7975c: [SLP]Add better minbitwidth analysis for udiv/urem...

[Alexey Bataev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d7975c9d93fb4a69c0bd79d7d5b3f6be77a25c73
      https://github.com/llvm/llvm-project/commit/d7975c9d93fb4a69c0bd79d7d5b3f6be77a25c73
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-03-28 (Thu, 28 Mar 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/X86/reorder-possible-strided-node.ll

  Log Message:
  -----------
  [SLP]Add better minbitwidth analysis for udiv/urem instructions.

Adds improved bitwidth analysis for udiv/urem instructions. The
analysis is based on similar version in InstCombiner.

Reviewers: RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/85928



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