[all-commits] [llvm/llvm-project] ab7dba: [CodeGen][LLVM] Make the `va_list` related intrins...
Alex Voicu via All-commits
all-commits at lists.llvm.org
Wed Mar 27 04:41:56 PDT 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: ab7dba233a058cc8310ef829929238b5d8440b30
https://github.com/llvm/llvm-project/commit/ab7dba233a058cc8310ef829929238b5d8440b30
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2024-03-27 (Wed, 27 Mar 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/CSKY/csky-abi.c
M clang/test/CodeGen/LoongArch/abi-lp64d.c
M clang/test/CodeGen/PowerPC/aix-altivec-vaargs.c
M clang/test/CodeGen/PowerPC/aix-vaargs.c
M clang/test/CodeGen/PowerPC/ppc64le-varargs-f128.c
M clang/test/CodeGen/RISCV/riscv32-vararg.c
M clang/test/CodeGen/RISCV/riscv64-vararg.c
M clang/test/CodeGen/WebAssembly/wasm-varargs.c
M clang/test/CodeGen/X86/va-arg-sse.c
M clang/test/CodeGen/X86/x86_64-vaarg.c
M clang/test/CodeGen/aarch64-ABI-align-packed.c
M clang/test/CodeGen/aarch64-varargs.c
M clang/test/CodeGen/arm-varargs.c
M clang/test/CodeGen/hexagon-linux-vararg.c
M clang/test/CodeGen/mips-varargs.c
M clang/test/CodeGen/pr53127.cpp
A clang/test/CodeGen/varargs-with-nonzero-default-address-space.c
M clang/test/CodeGen/xcore-abi.c
M clang/test/CodeGenCXX/ext-int.cpp
M clang/test/CodeGenCXX/ibm128-declarations.cpp
M clang/test/CodeGenCXX/x86_64-vaarg.cpp
M clang/test/Modules/codegen.test
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/Intrinsics.td
M llvm/test/Bitcode/compatibility-3.6.ll
M llvm/test/Bitcode/compatibility-3.7.ll
M llvm/test/Bitcode/compatibility-3.8.ll
M llvm/test/Bitcode/compatibility-3.9.ll
M llvm/test/Bitcode/compatibility-4.0.ll
M llvm/test/Bitcode/compatibility-5.0.ll
M llvm/test/Bitcode/compatibility-6.0.ll
M llvm/test/Bitcode/compatibility.ll
M llvm/test/Bitcode/thinlto-function-summary.ll
M llvm/test/Bitcode/variableArgumentIntrinsic.3.2.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/vararg_shadow.ll
M llvm/test/Instrumentation/MemorySanitizer/SystemZ/vararg-kernel.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/vararg_shadow.ll
M llvm/test/Instrumentation/MemorySanitizer/msan_debug_info.ll
M llvm/test/Transforms/GlobalOpt/inalloca-varargs.ll
M llvm/test/Transforms/IROutliner/illegal-vaarg.ll
M llvm/test/Transforms/IROutliner/outline-vaarg-intrinsic.ll
M llvm/test/Transforms/NewGVN/pr31483.ll
M llvm/test/Transforms/Reassociate/vaarg_movable.ll
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Target/LLVMIR/Import/basic.ll
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[CodeGen][LLVM] Make the `va_list` related intrinsics generic. (#85460)
Currently, the builtins used for implementing `va_list` handling
unconditionally take their arguments as unqualified `ptr`s i.e. pointers
to AS 0. This does not work for targets where the default AS is not 0 or
AS 0 is not a viable AS (for example, a target might choose 0 to
represent the constant address space). This patch changes the builtins'
signature to take generic `anyptr` args, which corrects this issue. It
is noisy due to the number of tests affected. A test for an upstream
target which does not use 0 as its default AS (SPIRV for HIP device
compilations) is added as well.
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