[all-commits] [llvm/llvm-project] d06ba3: [SPIR-V] Support extension toggling and enabling a...

[Michal Paszkowski via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d06ba376833553f38b5cbc606e479ed7936e5f5b
      https://github.com/llvm/llvm-project/commit/d06ba376833553f38b5cbc606e479ed7936e5f5b
  Author: Michal Paszkowski <michal at paszkowski.org>
  Date:   2024-03-26 (Tue, 26 Mar 2024)

  Changed paths:
    M llvm/lib/Target/SPIRV/CMakeLists.txt
    A llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
    A llvm/lib/Target/SPIRV/SPIRVCommandLine.h
    M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
    M llvm/test/CodeGen/SPIRV/LinkOnceODR.ll
    M llvm/test/CodeGen/SPIRV/LinkOnceODRFun.ll
    M llvm/test/CodeGen/SPIRV/assume.ll
    M llvm/test/CodeGen/SPIRV/exec_mode_float_control_khr.ll
    M llvm/test/CodeGen/SPIRV/expect.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_double.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_float.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_add/atomicrmw_faddfsub_half.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_double.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_float.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_half.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_arbitrary_precision_integers.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv-negative1.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv-negative2.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv-negative3.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv-negative4.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_const.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_two_calls.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_optnone.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_sub_groups.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_usm_storage_classes/intel-usm-addrspaces.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_variable_length_array/vararr.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_variable_length_array/vararr_spec_const.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_no_integer_wrap_decoration.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_subgroup_rotate/subgroup-rotate.ll
    M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_uniform_group_instructions/uniform-group-instructions.ll
    A llvm/test/CodeGen/SPIRV/extensions/both-allowed-disallowed-extension-error.ll
    A llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions-but-one.ll
    A llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions.ll
    A llvm/test/CodeGen/SPIRV/extensions/invalid-extension-list-format.ll
    A llvm/test/CodeGen/SPIRV/extensions/unknown-extension-name.ll
    M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/add.ll
    M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/and.ll
    M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fadd.ll
    M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmax.ll
    M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmaximum.ll
    M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmin.ll
    M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fminimum.ll
    M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmul.ll
    M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/mul.ll
    M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/or.ll
    M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/smax.ll
    M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/smin.ll
    M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/umax.ll
    M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/umin.ll
    M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/xor.ll
    M llvm/test/CodeGen/SPIRV/transcoding/NoSignedUnsignedWrap.ll

  Log Message:
  -----------
  [SPIR-V] Support extension toggling and enabling all (#85503)



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