[all-commits] [llvm/llvm-project] 668687: Revert "[RISCV][GISEL] Add regbankselect tests for...
Michael Maitland via All-commits
all-commits at lists.llvm.org
Mon Mar 25 11:51:47 PDT 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 668687f8a8ccba847e4847597d13124bd9bfdf4a
https://github.com/llvm/llvm-project/commit/668687f8a8ccba847e4847597d13124bd9bfdf4a
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-03-25 (Mon, 25 Mar 2024)
Changed paths:
R llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/vscale-rv32.mir
R llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/vscale-rv64.mir
Log Message:
-----------
Revert "[RISCV][GISEL] Add regbankselect tests for G_VSCALE"
This reverts commit a2476c99b745381380eab245fc9499a4ecf0b39e. It is not
consistent with SelectionDAG
Commit: 8b9c3b57b158beeedf69810c2a546ab350a91e57
https://github.com/llvm/llvm-project/commit/8b9c3b57b158beeedf69810c2a546ab350a91e57
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-03-25 (Mon, 25 Mar 2024)
Changed paths:
R llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/vscale32.mir
R llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/vscale64.mir
Log Message:
-----------
Revert "[RISCV][GISEL] Add instruction select tests for G_VSCALE"
This reverts commit c00a5ab8c4be14f63735ec61c5c9245c233cbcfc. It is not
consistent with SelectionDAG.
Compare: https://github.com/llvm/llvm-project/compare/9056ce880426...8b9c3b57b158
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