[all-commits] [llvm/llvm-project] d365a4: [GlobalISel] Introduce G_TRAP, G_DEBUGTRAP, G_UBSA...

[Evgenii Kudriashov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d365a45cb3eaa640b09874fb7984a6a69683c773
      https://github.com/llvm/llvm-project/commit/d365a45cb3eaa640b09874fb7984a6a69683c773
  Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
  Date:   2024-03-23 (Sat, 23 Mar 2024)

  Changed paths:
    M llvm/docs/GlobalISel/GenericOpcode.rst
    M llvm/docs/LangRef.rst
    M llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
    M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
    M llvm/include/llvm/Support/TargetOpcodes.def
    M llvm/include/llvm/Target/GenericOpcodes.td
    M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/MachineVerifier.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
    M llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
    M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
    M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unreachable.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-exceptions.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-trap.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/uaddo-8-16-bits.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trap.mir
    A llvm/test/CodeGen/Mips/GlobalISel/instruction-select/trap.mir
    R llvm/test/CodeGen/Mips/GlobalISel/legalizer/trap.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/trap.mir
    M llvm/test/CodeGen/X86/GlobalISel/x86-select-trap.mir
    A llvm/test/CodeGen/X86/isel-traps.ll
    A llvm/test/MachineVerifier/test_g_ubsantrap.mir

  Log Message:
  -----------
  [GlobalISel] Introduce G_TRAP, G_DEBUGTRAP, G_UBSANTRAP (#84941)

Here we introduce three new GMIR instructions to cover a set of trap
intrinsics. The idea behind it is that generic intrinsics shouldn't be
used with G_INTRINSIC opcode.

These new instructions can match perfectly with existing trap ISD nodes.
It allows X86, AArch64, RISCV and Mips to reuse SelectionDAG patterns for
selection and avoid manual selection. However AMDGPU is an exception. It
selects traps during legalization regardless SelectionDAG or GlobalISel.

Since there are not many places where traps are used, this change
attempts to clean up all the usages of G_INTRINSIC with trap intrinsics. So,
there is no stage when both G_TRAP and
G_INTRINSIC_W_SIDE_EFFECTS(@llvm.trap) are allowed.



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