[all-commits] [llvm/llvm-project] 7678e6: [RISCV] Lower the alignment requirement for a GPR ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7678e6e562811688b472ad19900fa64cd00b7c06
      https://github.com/llvm/llvm-project/commit/7678e6e562811688b472ad19900fa64cd00b7c06
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-03-21 (Thu, 21 Mar 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
    A llvm/test/CodeGen/RISCV/zdinx-large-spill.mir

  Log Message:
  -----------
  [RISCV] Lower the alignment requirement for a GPR pair spill for Zdinx on RV32. (#85871)

I believe we can use XLen alignment as long as eliminateFrameIndex
limits the maximum folded offset to 2043. This way when we split
the load/store into two 2 instructions we'll be able to add 4
without overflowing simm12.



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