[all-commits] [llvm/llvm-project] 35a66f: Precommit test for #85737 (#86056)

Wed Mar 20 22:44:22 PDT 2024

  Branch: refs/heads/users/lanza/sprmain.cirnfc-add-scaffolding-for-the-cir-dialect-and-ciropstd
  Home:   https://github.com/llvm/llvm-project
  Commit: 35a66f965c0ea3b806b2b1736bfe4e6eb61d3613
      https://github.com/llvm/llvm-project/commit/35a66f965c0ea3b806b2b1736bfe4e6eb61d3613
  Author: Freddy Ye <freddy.ye at intel.com>
  Date:   2024-03-21 (Thu, 21 Mar 2024)

  Changed paths:
    A llvm/test/CodeGen/X86/domain-reassignment-ndd.mir

  Log Message:
  -----------
  Precommit test for #85737 (#86056)

Copied from llvm/test/CodeGen/X86/domain-reassignment.mir

  Commit: 44a81af510801edce842e9574ec4d52cc7bd0ae9
      https://github.com/llvm/llvm-project/commit/44a81af510801edce842e9574ec4d52cc7bd0ae9
  Author: paperchalice <liujunchang97 at outlook.com>
  Date:   2024-03-21 (Thu, 21 Mar 2024)

  Changed paths:
    M llvm/test/Transforms/LoopIdiom/AArch64/byte-compare-index.ll

  Log Message:
  -----------
  [AArch64] Run LoopSimplifyPass in byte-compare-index.ll (#86053)

Make this test case work on both new and legacy pass manager. See also
#85215

  Commit: 0d08282310e4007dfb748132e5c196765b1ffcd2
      https://github.com/llvm/llvm-project/commit/0d08282310e4007dfb748132e5c196765b1ffcd2
  Author: Michael Liao <michael.hliao at gmail.com>
  Date:   2024-03-20 (Wed, 20 Mar 2024)

  Changed paths:
    M mlir/lib/Dialect/XeGPU/IR/CMakeLists.txt

  Log Message:
  -----------
  [MLIR][XeGPU] Fix shared build. NFC

  Commit: 0e3fbfd1e106dd027aab9ea4a9a6f116d05a0987
      https://github.com/llvm/llvm-project/commit/0e3fbfd1e106dd027aab9ea4a9a6f116d05a0987
  Author: Thurston Dang <thurston at google.com>
  Date:   2024-03-21 (Thu, 21 Mar 2024)

  Changed paths:
    M compiler-rt/lib/sanitizer_common/sanitizer_posix_libcdep.cpp

  Log Message:
  -----------
  Revert "[sanitizer_common] Suppress warning of cast from SignalHandlerType to sa_sigaction_t"

This reverts commit 9d79589e7c8b728a592a4b6b3dee53ac471d7946
because it failed to suppress the warning.

  Commit: 5c95484061a58250de7e5abe150c6ebb25898523
      https://github.com/llvm/llvm-project/commit/5c95484061a58250de7e5abe150c6ebb25898523
  Author: Vitaly Buka <vitalybuka at google.com>
  Date:   2024-03-20 (Wed, 20 Mar 2024)

  Changed paths:
    M llvm/test/Analysis/AliasSet/intrinsics.ll

  Log Message:
  -----------
  [Analysis] Use implicit-check-not in test

  Commit: 07a5e31cb3836bf1f00d2f56f03db70145f536c1
      https://github.com/llvm/llvm-project/commit/07a5e31cb3836bf1f00d2f56f03db70145f536c1
  Author: Freddy Ye <freddy.ye at intel.com>
  Date:   2024-03-21 (Thu, 21 Mar 2024)

  Changed paths:
    A llvm/test/CodeGen/X86/apx/domain-reassignment.mir
    R llvm/test/CodeGen/X86/domain-reassignment-ndd.mir

  Log Message:
  -----------
  Move pre-commit test for #85737 (#86062)

  Commit: deefe3fbc93b3bdc77fbaf718403a45dae983d12
      https://github.com/llvm/llvm-project/commit/deefe3fbc93b3bdc77fbaf718403a45dae983d12
  Author: Thorsten Schütt <schuett at gmail.com>
  Date:   2024-03-21 (Thu, 21 Mar 2024)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/combine-overflow.mir
    M llvm/test/CodeGen/AArch64/arm64-xaluo.ll
    M llvm/test/CodeGen/AArch64/overflow.ll
    M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll

  Log Message:
  -----------
  [GlobalIsel] Post-review combine ADDO (#85961)

https://github.com/llvm/llvm-project/pull/82927

  Commit: 29bf32efbb646b2ab3dec25f100419fc75635878
      https://github.com/llvm/llvm-project/commit/29bf32efbb646b2ab3dec25f100419fc75635878
  Author: paperchalice <liujunchang97 at outlook.com>
  Date:   2024-03-21 (Thu, 21 Mar 2024)

  Changed paths:
    A llvm/include/llvm/Passes/TargetPassRegistry.inc
    A llvm/lib/Target/AArch64/AArch64PassRegistry.def
    M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
    M llvm/test/Transforms/LoopIdiom/AArch64/byte-compare-index.ll

  Log Message:
  -----------
  [NewPM][AArch64] Add AArch64PassRegistry.def (#85215)

PR #83567 ports `SelectionDAGISel` to the new pass manager, then each
backend should provide `<Target>DagToDagISel()` in new pass manager
style. Then each target should provide `<Target>PassRegistry.def` to
register backend passes in `registerPassBuilderCallbacks` to reduce
duplicate code.
This PR adds `AArch64PassRegistry.def` to AArch64 backend and
boilerplate code in `registerPassBuilderCallbacks`.

  Commit: a5d7fc1d1000ffb1d21796f5d587f277c2957d66
      https://github.com/llvm/llvm-project/commit/a5d7fc1d1000ffb1d21796f5d587f277c2957d66
  Author: Matthias Springer <me at m-sp.org>
  Date:   2024-03-21 (Thu, 21 Mar 2024)

  Changed paths:
    M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack.mlir
    M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack_d.mlir

  Log Message:
  -----------
  [mlir][sparse] Fix typos in comments (#86074)

  Commit: 7bb87d533891c2bcfa1c9132605f0d3e8227d444
      https://github.com/llvm/llvm-project/commit/7bb87d533891c2bcfa1c9132605f0d3e8227d444
  Author: Madhur Amilkanthwar <madhura at nvidia.com>
  Date:   2024-03-21 (Thu, 21 Mar 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-abs.mir
    M llvm/test/CodeGen/AArch64/abs.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Take abs scalar codegen closer to SDAG (#84886)

This patch improves codegen for scalar (<128bits) version
of llvm.abs intrinsic by using the existing non-XOR based lowering.
This takes the generated code closer to SDAG.

codegen with GISel for > 128 bit types is not very good
with these method so not doing so.

  Commit: 35d3b3430eff16403d004d9f0b0369f0814cf140
      https://github.com/llvm/llvm-project/commit/35d3b3430eff16403d004d9f0b0369f0814cf140
  Author: Matthias Springer <me at m-sp.org>
  Date:   2024-03-21 (Thu, 21 Mar 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
    M mlir/include/mlir/Dialect/Bufferization/Transforms/OneShotAnalysis.h
    M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
    M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
    M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
    M mlir/test/Dialect/Arith/one-shot-bufferize.mlir
    M mlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize-allow-return-allocs.mlir
    A mlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize-analysis-bottom-up-from-terminators.mlir
    M mlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize-partial.mlir
    M mlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize.mlir
    M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-allow-return-allocs.mlir
    M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-analysis.mlir
    M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
    M mlir/test/Dialect/Linalg/one-shot-bufferize.mlir
    M mlir/test/Dialect/SCF/one-shot-bufferize-analysis.mlir
    M mlir/test/Dialect/SCF/one-shot-bufferize.mlir
    M mlir/test/Dialect/Tensor/one-shot-bufferize.mlir

  Log Message:
  -----------
  [mlir][bufferization] Add "bottom-up from terminators" analysis heuristic (#83964)

One-Shot Bufferize currently does not support loops where a yielded
value bufferizes to a buffer that is different from the buffer of the
region iter_arg. In such a case, the bufferization fails with an error
such as:
```
Yield operand #0 is not equivalent to the corresponding iter bbArg
    scf.yield %0 : tensor<5xf32>
```

One common reason for non-equivalent buffers is that an op on the path
from the region iter_arg to the terminator bufferizes out-of-place. Ops
that are analyzed earlier are more likely to bufferize in-place.

This commit adds a new heuristic that gives preference to ops that are
reachable on the reverse SSA use-def chain from a region terminator and
are within the parent region of the terminator. This is expected to work
better than the existing heuristics for loops where an iter_arg is
written to multiple times within a loop, but only one write is fed into
the terminator.

Current users of One-Shot Bufferize are not affected by this change.
"Bottom-up" is still the default heuristic. Users can switch to the new
heuristic manually.

This commit also turns the "fuzzer" pass option into a heuristic,
cleaning up the code a bit.

  Commit: 733640d29ede70585e0e3e1dcc47b935981f791e
      https://github.com/llvm/llvm-project/commit/733640d29ede70585e0e3e1dcc47b935981f791e
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-03-21 (Thu, 21 Mar 2024)

  Changed paths:
    M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
    M llvm/test/Transforms/Attributor/align.ll
    M llvm/test/Transforms/Attributor/nocapture-1.ll
    M llvm/test/Transforms/Attributor/nofpclass.ll

  Log Message:
  -----------
  Attributor: Handle inferring align from use by atomics (#85762)

  Commit: df9ed9cf52f82aed023adc968ca2a0e7f7cccc69
      https://github.com/llvm/llvm-project/commit/df9ed9cf52f82aed023adc968ca2a0e7f7cccc69
  Author: srcarroll <50210727+srcarroll at users.noreply.github.com>
  Date:   2024-03-21 (Thu, 21 Mar 2024)

  Changed paths:
    M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
    M mlir/test/Dialect/Linalg/flatten-elementwise.mlir

  Log Message:
  -----------
  [mlir][transform] Fix failure in flattening already flattened linalg ops (#86037)

The previous implementation was doing an early successful return on
`rank <= 1` without adding the original op to transform results. This
resulted in errors about number of returns. This patch fixes this by
adding the original op to results. Additionally, we first check if op is
elementwise and return a slienceable failure early if not.

  Commit: 26c290b46ac6b4a81feb28ae1862fac961138a24
      https://github.com/llvm/llvm-project/commit/26c290b46ac6b4a81feb28ae1862fac961138a24
  Author: Nathan Lanza <nathanlanza at gmail.com>
  Date:   2024-03-21 (Thu, 21 Mar 2024)

  Changed paths:
    M llvm/tools/CMakeLists.txt

  Log Message:
  -----------
  [cmake] Place clang behind mlir in the list of external projects (#86050)

In preparation for the initial ClangIR upstreaming process, move clang
behind MLIR in the list of external projects. Otherwise, cmake will
attempt to build clang before MLIR.

  Commit: 14bf4966b34bf410b4f70659a79eeeb4fa62ee7b
      https://github.com/llvm/llvm-project/commit/14bf4966b34bf410b4f70659a79eeeb4fa62ee7b
  Author: Nathan Lanza <nathanlanza at gmail.com>
  Date:   2024-03-21 (Thu, 21 Mar 2024)

  Changed paths:
    M compiler-rt/lib/sanitizer_common/sanitizer_posix_libcdep.cpp
    M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
    A llvm/include/llvm/Passes/TargetPassRegistry.inc
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    A llvm/lib/Target/AArch64/AArch64PassRegistry.def
    M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
    M llvm/test/Analysis/AliasSet/intrinsics.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/combine-overflow.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-abs.mir
    M llvm/test/CodeGen/AArch64/abs.ll
    M llvm/test/CodeGen/AArch64/arm64-xaluo.ll
    M llvm/test/CodeGen/AArch64/overflow.ll
    M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
    A llvm/test/CodeGen/X86/apx/domain-reassignment.mir
    M llvm/test/Transforms/Attributor/align.ll
    M llvm/test/Transforms/Attributor/nocapture-1.ll
    M llvm/test/Transforms/Attributor/nofpclass.ll
    M llvm/test/Transforms/LoopIdiom/AArch64/byte-compare-index.ll
    M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
    M mlir/include/mlir/Dialect/Bufferization/Transforms/OneShotAnalysis.h
    M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
    M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
    M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
    M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
    M mlir/lib/Dialect/XeGPU/IR/CMakeLists.txt
    M mlir/test/Dialect/Arith/one-shot-bufferize.mlir
    M mlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize-allow-return-allocs.mlir
    A mlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize-analysis-bottom-up-from-terminators.mlir
    M mlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize-partial.mlir
    M mlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize.mlir
    M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-allow-return-allocs.mlir
    M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-analysis.mlir
    M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
    M mlir/test/Dialect/Linalg/flatten-elementwise.mlir
    M mlir/test/Dialect/Linalg/one-shot-bufferize.mlir
    M mlir/test/Dialect/SCF/one-shot-bufferize-analysis.mlir
    M mlir/test/Dialect/SCF/one-shot-bufferize.mlir
    M mlir/test/Dialect/Tensor/one-shot-bufferize.mlir
    M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack.mlir
    M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack_d.mlir

  Log Message:
  -----------
  [𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5

[skip ci]

Compare: https://github.com/llvm/llvm-project/compare/53655ac84c3b...14bf4966b34b

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