[all-commits] [llvm/llvm-project] 576d81: [RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move be...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 576d81baa5cf1801bae0fd05892be34acde33c6a
      https://github.com/llvm/llvm-project/commit/576d81baa5cf1801bae0fd05892be34acde33c6a
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-03-20 (Wed, 20 Mar 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
    M llvm/test/CodeGen/RISCV/double-arith-strict.ll
    M llvm/test/CodeGen/RISCV/double-arith.ll
    M llvm/test/CodeGen/RISCV/double-bitmanip-dagcombines.ll
    M llvm/test/CodeGen/RISCV/double-br-fcmp.ll
    M llvm/test/CodeGen/RISCV/double-calling-conv.ll
    M llvm/test/CodeGen/RISCV/double-convert-strict.ll
    M llvm/test/CodeGen/RISCV/double-convert.ll
    M llvm/test/CodeGen/RISCV/double-fcmp-strict.ll
    M llvm/test/CodeGen/RISCV/double-fcmp.ll
    M llvm/test/CodeGen/RISCV/double-imm.ll
    M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
    M llvm/test/CodeGen/RISCV/double-intrinsics.ll
    M llvm/test/CodeGen/RISCV/double-isnan.ll
    M llvm/test/CodeGen/RISCV/double-maximum-minimum.ll
    M llvm/test/CodeGen/RISCV/double-mem.ll
    M llvm/test/CodeGen/RISCV/double-previous-failure.ll
    M llvm/test/CodeGen/RISCV/double-round-conv-sat.ll
    M llvm/test/CodeGen/RISCV/double-round-conv.ll
    M llvm/test/CodeGen/RISCV/double-select-fcmp.ll
    M llvm/test/CodeGen/RISCV/double-select-icmp.ll
    M llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
    M llvm/test/CodeGen/RISCV/fastcc-without-f-reg.ll
    M llvm/test/CodeGen/RISCV/half-convert-strict.ll
    M llvm/test/CodeGen/RISCV/half-convert.ll
    M llvm/test/CodeGen/RISCV/pr64645.ll
    M llvm/test/CodeGen/RISCV/zdinx-asm-constraint.ll
    M llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll

  Log Message:
  -----------
  [RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

Previously we used memory like we do to move between GPRs and FPR64 with
the D extension on RV32.

We can instead use REG_SEQUENCE/EXTRACT_SUBREG to inform register
allocation how to do the copy without memory.



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