[all-commits] [llvm/llvm-project] d7e28c: MIPS: Support -m(no-)unaligned-access for r6 (#85174)

[YunQiang Su via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d7e28cd82bd3141093f96f7ce2e7b36f1b115fad
      https://github.com/llvm/llvm-project/commit/d7e28cd82bd3141093f96f7ce2e7b36f1b115fad
  Author: YunQiang Su <syq at debian.org>
  Date:   2024-03-20 (Wed, 20 Mar 2024)

  Changed paths:
    M clang/include/clang/Driver/Options.td
    M clang/lib/Driver/ToolChains/Arch/Mips.cpp
    M clang/test/Driver/mips-features.c
    M llvm/lib/Target/Mips/Mips.td
    M llvm/lib/Target/Mips/MipsISelLowering.cpp
    M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
    M llvm/lib/Target/Mips/MipsSubtarget.cpp
    M llvm/lib/Target/Mips/MipsSubtarget.h
    M llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll
    A llvm/test/CodeGen/Mips/no-unaligned-access-r6.ll

  Log Message:
  -----------
  MIPS: Support -m(no-)unaligned-access for r6 (#85174)

MIPSr6 ISA requires normal load/store instructions support
misunaligned memory access, while it is not always do so
by hardware. On some microarchitectures or some corner cases
it may need support by OS.

Don't confuse with pre-R6's lwl/lwr famlily: MIPSr6 doesn't
support them, instead, r6 requires lw instruction support
misunaligned memory access. So, if -mstrict-align is used for
pre-R6, lwl/lwr won't be disabled.

If -mstrict-align is used for r6 and the access is not well
aligned, some lb/lh instructions will be used to replace lw.
This is useful for OS kernels.

To be back-compatible with GCC, -m(no-)unaligned-access are also
added as Neg-Alias of -m(no-)strict-align.



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