[all-commits] [llvm/llvm-project] da118c: [SLP]Do extra analysis int minbitwidth if some che...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Tue Mar 19 12:28:00 PDT 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: da118c93b40f74f6770cf8550903721555d3c97b
https://github.com/llvm/llvm-project/commit/da118c93b40f74f6770cf8550903721555d3c97b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-03-19 (Tue, 19 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/horizontal.ll
Log Message:
-----------
[SLP]Do extra analysis int minbitwidth if some checks return false.
The instruction itself can be considered good for minbitwidth casting,
even if one of the operand checks returns false.
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/84363
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