[all-commits] [llvm/llvm-project] 8310fd: [MachineLICM] Give opportunity to analyze physregs...

[Sander de Smalen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8310fd3a093ce98e4df599f7cac2081f551e3fef
      https://github.com/llvm/llvm-project/commit/8310fd3a093ce98e4df599f7cac2081f551e3fef
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2024-03-15 (Fri, 15 Mar 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineLoopInfo.h
    M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
    M llvm/lib/CodeGen/MachineLoopInfo.cpp
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.h
    A llvm/test/CodeGen/AArch64/sme-machine-licm-vg.mir

  Log Message:
  -----------
  [MachineLICM] Give opportunity to analyze physregs for invariance. (#84779)

At the moment MachineLoopInfo has a very simple way to determine if a
use of a physical register will be invariant: if it is not a constant
value or if it's not an ignorable use, then it's not considered
invariant.

>From a compile-time performance perspective this makes a lot of sense,
but it limits code that uses implicit physical registers from being
hoisted until the later MachineLICM pass (after register allocation),
which has a lot fewer opportunities to hoist.

For AArch64 SME we use an implicit physical register ($vg) to avoid
rematerialization beyond certain instructions. Doing this led to
regressions because simple expressions were no longer hoisted by Early
MachineLICM.

This patch adds some extra checks to 'isLoopInvariant' to see if any of
the defs are found in the loop. If not, we can considered it loop
invariant.

We expect the impact on compile-time to be negligible because there is
an incentive for users to reduce the need for the smstart/smstop
instructions that define $vg. In either case, we've put the
functionality under a target interface to limit this only to specific
registers.



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