[all-commits] [llvm/llvm-project] 95c131: [libc++] Remove a few includes from <__functional/...

[Alexey Bataev via All-commits]

  Branch: refs/heads/users/alexey-bataev/spr/slpdo-extra-analysis-int-minbitwidth-if-some-checks-return-false
  Home:   https://github.com/llvm/llvm-project
  Commit: 95c1313f253cd343ee0b20cb7af7c71d904d96be
      https://github.com/llvm/llvm-project/commit/95c1313f253cd343ee0b20cb7af7c71d904d96be
  Author: Nikolas Klauser <nikolasklauser at berlin.de>
  Date:   2024-03-14 (Thu, 14 Mar 2024)

  Changed paths:
    M libcxx/include/__functional/hash.h
    M libcxx/include/__tuple/sfinae_helpers.h
    M libcxx/include/__type_traits/conjunction.h
    M libcxx/include/array
    M libcxx/include/coroutine
    M libcxx/include/experimental/memory
    M libcxx/include/optional
    M libcxx/include/variant
    M libcxx/test/libcxx/transitive_includes/cxx23.csv
    M libcxx/test/libcxx/transitive_includes/cxx26.csv

  Log Message:
  -----------
  [libc++] Remove a few includes from <__functional/hash.h> (#83254)

This also moves `__all` from `sfinae_helpers.h` to `conjunction.h`.


  Commit: 8c4546f350fbce938d8fbc85d9e353d011f3f673
      https://github.com/llvm/llvm-project/commit/8c4546f350fbce938d8fbc85d9e353d011f3f673
  Author: dyung <douglas.yung at sony.com>
  Date:   2024-03-14 (Thu, 14 Mar 2024)

  Changed paths:
    M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp

  Log Message:
  -----------
  Revert "[compiler-rt] Also consider SIGPROF as a synchronous signal (#85188)" (#85296)

This reverts commit 6f3f659ce9ab91002b4a490b0ce4b085981383cd.

This change is causing TSAN failures on a bot as reported in #85188:
https://lab.llvm.org/buildbot/#/builders/247/builds/15279


  Commit: ffa2810f7baffaa747b1782ca44207c12d0dd222
      https://github.com/llvm/llvm-project/commit/ffa2810f7baffaa747b1782ca44207c12d0dd222
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-03-14 (Thu, 14 Mar 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll

  Log Message:
  -----------
  [RISCV] Optimize lowering of VECREDUCE_FMINIMUM/VECREDUCE_FMAXIMUM. (#85165)

Use a normal min/max reduction that doesn't propagate nans and force
the result to nan at the end if any elements were nan.


  Commit: 25959310a50240c320283d1e4b23046fed152313
      https://github.com/llvm/llvm-project/commit/25959310a50240c320283d1e4b23046fed152313
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-03-14 (Thu, 14 Mar 2024)

  Changed paths:
    M llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
    M llvm/test/Transforms/IndVarSimplify/iv-widen-elim-ext.ll

  Log Message:
  -----------
  [IndVars] Support shl by constant and or disjoint in getExtendedOperandRecurrence. (#84282)

We can treat a shift by constant as a multiply by a power of 2
and we can treat an or disjoint as a 'add nsw nuw'.

I've added a helper struct similar to a struct used in
ScalarEvolution.cpp
to represent the opcode, operands, and NSW/NUW flags for normal
add/sub/mul
and shl/or that are being treated as mul/add.

I don't think we need to teach cloneIVUser about this. It will continue
to clone them using cloneBitwiseIVUser. After the cloning we will ask
for the SCEV expression for the cloned IV user and verify that it
matches
the AddRec returned by getExtendedOperandRecurrence. Since SCEV also
knows how to convert shl to mul and or disjoint to add nsw nuw, this
should
usually match. If it doesn't match, the cloned IV user will be deleted.


  Commit: 029af5da73d5fbea1a6d6cd74487429bd9086bbb
      https://github.com/llvm/llvm-project/commit/029af5da73d5fbea1a6d6cd74487429bd9086bbb
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-03-14 (Thu, 14 Mar 2024)

  Changed paths:
    M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
    M libcxx/include/__functional/hash.h
    M libcxx/include/__tuple/sfinae_helpers.h
    M libcxx/include/__type_traits/conjunction.h
    M libcxx/include/array
    M libcxx/include/coroutine
    M libcxx/include/experimental/memory
    M libcxx/include/optional
    M libcxx/include/variant
    M libcxx/test/libcxx/transitive_includes/cxx23.csv
    M libcxx/test/libcxx/transitive_includes/cxx26.csv
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
    M llvm/test/Transforms/IndVarSimplify/iv-widen-elim-ext.ll

  Log Message:
  -----------
  Rebase, fix a crash

Created using spr 1.3.5


Compare: https://github.com/llvm/llvm-project/compare/cabfac6a1d53...029af5da73d5

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