[all-commits] [llvm/llvm-project] b84ce9: [clang] Define SwiftInfo for RISCVTargetCodeGenInf...

Fangrui Song via All-commits all-commits at lists.llvm.org
Thu Mar 14 09:53:21 PDT 2024


  Branch: refs/heads/users/MaskRay/spr/elf-reject-certain-unknown-section-types
  Home:   https://github.com/llvm/llvm-project
  Commit: b84ce9979990283aa4398ad5a654b8b283baa532
      https://github.com/llvm/llvm-project/commit/b84ce9979990283aa4398ad5a654b8b283baa532
  Author: Kuba (Brecka) Mracek <mracek at apple.com>
  Date:   2024-03-13 (Wed, 13 Mar 2024)

  Changed paths:
    M clang/lib/CodeGen/Targets/RISCV.cpp
    M clang/test/CodeGenCXX/arm-swiftcall.cpp

  Log Message:
  -----------
  [clang] Define SwiftInfo for RISCVTargetCodeGenInfo (#82152)

For Embedded Swift, let's unblock building for RISC-V boards (e.g.
ESP32-C6). This isn't trying to add full RISC-V support to Swift /
Embedded Swift, it's just fixing the immediate blocker (not having
SwiftInfo defined blocks all compilations).


  Commit: 1e9bfcd9a423765a86b2fc807c3bc3a097823deb
      https://github.com/llvm/llvm-project/commit/1e9bfcd9a423765a86b2fc807c3bc3a097823deb
  Author: Uday Bondhugula <uday at polymagelabs.com>
  Date:   2024-03-14 (Thu, 14 Mar 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/Affine/Analysis/LoopAnalysis.h
    M mlir/include/mlir/Dialect/Affine/IR/AffineValueMap.h
    M mlir/lib/Dialect/Affine/Analysis/LoopAnalysis.cpp
    M mlir/lib/Dialect/Affine/IR/AffineValueMap.cpp
    M mlir/test/Dialect/Affine/access-analysis.mlir
    M mlir/test/lib/Dialect/Affine/TestAccessAnalysis.cpp

  Log Message:
  -----------
  [MLIR][Affine] Fix/complete access index invariance, add isInvariantAccess (#84602)

isAccessIndexInvariant had outdated code and didn't handle IR with
multiple
affine.apply ops, which is inconvenient when used as a utility.  This is
addressed by switching to use the proper API on AffineValueMap. Add
mlir::affine::isInvariantAccess exposed for outside use and tested via
the test pass. Add a method on AffineValueMap.  Add test cases to
exercise simplification and composition for invariant access analysis.

A TODO/FIXME has been added but this issue existed before.


  Commit: 437fcc6eed99694a9f9486d29ead6a3d3275ede9
      https://github.com/llvm/llvm-project/commit/437fcc6eed99694a9f9486d29ead6a3d3275ede9
  Author: Matthias Springer <me at m-sp.org>
  Date:   2024-03-14 (Thu, 14 Mar 2024)

  Changed paths:
    M mlir/include/mlir/IR/PatternMatch.h

  Log Message:
  -----------
  [mlir][IR] Add additional rewriter constructor (#85044)

For convenience, add an additional constructor to `RewriterBase` and
`IRRewriter` that also sets the insertion point. `OpBuilder` provides a
similar constructor.


  Commit: 84420a2ab34a1e0ddbd1ffe7f1e4faea34aeb2b3
      https://github.com/llvm/llvm-project/commit/84420a2ab34a1e0ddbd1ffe7f1e4faea34aeb2b3
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-03-13 (Wed, 13 Mar 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

  Log Message:
  -----------
  [RISCV] Move matchRegisterNameHelper into the RISCVAsmParser and remove IsRVE argument. NFC (#85172)

With it in the class we can use isRVE() inside the function instead of
making the callers do it.


  Commit: 8bf044ae170a035c5daddd22822e13ff35daac1c
      https://github.com/llvm/llvm-project/commit/8bf044ae170a035c5daddd22822e13ff35daac1c
  Author: Fangrui Song <i at maskray.me>
  Date:   2024-03-14 (Thu, 14 Mar 2024)

  Changed paths:
    M clang/lib/CodeGen/Targets/RISCV.cpp
    M clang/test/CodeGenCXX/arm-swiftcall.cpp
    M lld/ELF/InputFiles.cpp
    M lld/test/ELF/unknown-section.test
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M mlir/include/mlir/Dialect/Affine/Analysis/LoopAnalysis.h
    M mlir/include/mlir/Dialect/Affine/IR/AffineValueMap.h
    M mlir/include/mlir/IR/PatternMatch.h
    M mlir/lib/Dialect/Affine/Analysis/LoopAnalysis.cpp
    M mlir/lib/Dialect/Affine/IR/AffineValueMap.cpp
    M mlir/test/Dialect/Affine/access-analysis.mlir
    M mlir/test/lib/Dialect/Affine/TestAccessAnalysis.cpp

  Log Message:
  -----------
  allow all [SHT_LOPROC,SHT_LOPROC] types

Created using spr 1.3.5-bogner


Compare: https://github.com/llvm/llvm-project/compare/5301772bf36b...8bf044ae170a

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