[all-commits] [llvm/llvm-project] 97c7e2: [𝘀𝗽𝗿] initial version

[Dhruv Chawla (work) via All-commits]

  Branch: refs/heads/users/dc03-work/spr/aarch64globalisel-avoid-splitting-loads-of-large-vector-types-into-individual-element-loads-1
  Home:   https://github.com/llvm/llvm-project
  Commit: 97c7e27bdd014706e66aa5c559659cbfac9e2383
      https://github.com/llvm/llvm-project/commit/97c7e27bdd014706e66aa5c559659cbfac9e2383
  Author: Dhruv Chawla <dhruvc at nvidia.com>
  Date:   2024-03-13 (Wed, 13 Mar 2024)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
    M llvm/test/CodeGen/AArch64/fcmp.ll
    M llvm/test/CodeGen/AArch64/sext.ll
    M llvm/test/CodeGen/AArch64/vecreduce-add.ll
    M llvm/test/CodeGen/AArch64/zext.ll

  Log Message:
  -----------
  [𝘀𝗽𝗿] initial version

Created using spr 1.3.5



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