[all-commits] [llvm/llvm-project] c1af6a: [X86] getFauxShuffleMask - recognise CONCAT(SUB0, ...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c1af6ab505a83bfb4fc8752591ad333190bc9389
      https://github.com/llvm/llvm-project/commit/c1af6ab505a83bfb4fc8752591ad333190bc9389
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-03-12 (Tue, 12 Mar 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-8.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-4.ll

  Log Message:
  -----------
  [X86] getFauxShuffleMask - recognise CONCAT(SUB0, SUB1) style patterns

Handles the INSERT_SUBVECTOR(INSERT_SUBVECTOR(UNDEF,SUB0,0),SUB1,N) pattern

Currently limited to v8i64/v8f64 cases as only AVX512 has decent cross lane 2-input shuffles, the plan is to relax this as I deal with some regressions



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