[all-commits] [llvm/llvm-project] 034cc2: [GISEL] Add G_INSERT_SUBVECTOR and G_EXTRACT_SUBVE...

[Michael Maitland via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 034cc2f5d0abcf7a465665246f16a1b75fbde93a
      https://github.com/llvm/llvm-project/commit/034cc2f5d0abcf7a465665246f16a1b75fbde93a
  Author: Michael Maitland <michaeltmaitland at gmail.com>
  Date:   2024-03-11 (Mon, 11 Mar 2024)

  Changed paths:
    M llvm/docs/GlobalISel/GenericOpcode.rst
    M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
    M llvm/include/llvm/Support/TargetOpcodes.def
    M llvm/include/llvm/Target/GenericOpcodes.td
    M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
    M llvm/lib/CodeGen/MachineVerifier.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
    A llvm/test/MachineVerifier/test_g_extract_subvector.mir
    A llvm/test/MachineVerifier/test_g_insert_subvector.mir

  Log Message:
  -----------
  [GISEL] Add G_INSERT_SUBVECTOR and G_EXTRACT_SUBVECTOR (#84538)

G_INSERT and G_EXTRACT are not sufficient to use to represent both
INSERT/EXTRACT on a subregister and INSERT/EXTRACT on a vector.

We would like to be able to INSERT/EXTRACT on vectors in cases that
INSERT/EXTRACT on vector subregisters are not sufficient, so we add
these opcodes.

I tried to do a patch where we treated G_EXTRACT as both
G_EXTRACT_SUBVECTOR and G_EXTRACT_SUBREG, but ran into an infinite loop
at this
[point](https://github.com/llvm/llvm-project/blob/8b5b294ec2cf876bc5eb5bd5fcb56ef487e36d60/llvm/lib/Target/RISCV/RISCVISelLowering.cpp#L9932)
in the SDAG equivalent code.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications