[all-commits] [llvm/llvm-project] 538aeb: [AMDGPU] Use a consistent DwarfEH register flavour...

[Emma Pilkington via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 538aeb180bcdf82cd86a46b44d6622a1c13d2877
      https://github.com/llvm/llvm-project/commit/538aeb180bcdf82cd86a46b44d6622a1c13d2877
  Author: Emma Pilkington <emma.pilkington95 at gmail.com>
  Date:   2024-03-11 (Mon, 11 Mar 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/unittests/MC/AMDGPU/DwarfRegMappings.cpp
    M llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp

  Log Message:
  -----------
  [AMDGPU] Use a consistent DwarfEH register flavour (#84513)

Previously, we always used the wave64 encodings for EH registers
regardless of whether we were compiling for wave32, which seems wrong.
We don't seem to use the EH registers, so this commit is mostly just
about papering over code that converts from non-EH dwarf registers to
LLVM registers while claiming they are EH dwarf registers. That kind of
code should be okay on any non-darwin target (since darwin is the only
target that uses a different encoding for EH registers).



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