[all-commits] [llvm/llvm-project] fb1be9: [SPIR-V] Insert a bitcast before load/store instru...

[Vyacheslav Levytskyy via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fb1be9b33ca3ed1b7ea54b15bd77fd868726b57c
      https://github.com/llvm/llvm-project/commit/fb1be9b33ca3ed1b7ea54b15bd77fd868726b57c
  Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
  Date:   2024-03-08 (Fri, 08 Mar 2024)

  Changed paths:
    M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
    M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
    M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
    M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
    M llvm/lib/Target/SPIRV/SPIRVISelLowering.h
    M llvm/test/CodeGen/SPIRV/constant/global-constants.ll
    A llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-load.ll
    A llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-store.ll
    M llvm/test/CodeGen/SPIRV/spirv-load-store.ll

  Log Message:
  -----------
  [SPIR-V] Insert a bitcast before load/store instruction to keep SPIR-V code valid (#84069)

This PR introduces a step after instruction selection where instructions
can be traversed from the perspective of their validity from the
specification point of view. The PR adds also a way to correct
load/store when there is a type mismatch contradicting the specification
-- an additional bitcast is inserted to keep types consistent.
Correspondent test cases are added and existing test cases are
corrected.

This PR helps to successfully validate with the `spirv-val` tool
(https://github.com/KhronosGroup/SPIRV-Tools) some output that
previously led to validation errors and crashes of back translation from
SPIRV to LLVM IR from the side of SPIRV Translator project
(https://github.com/KhronosGroup/SPIRV-LLVM-Translator).

The added step of bringing instructions to required by the specification
type correspondence can be (should be and will be) extended beyond
load/store instructions to ensure validity rules of other SPIRV
instructions related to type inference.



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