[all-commits] [llvm/llvm-project] 44be5a: [Codegen] Make Width in getMemOperandsWithOffsetWi...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 44be5a7fdc20a7f90d63dc18699a470e900bd3ba
      https://github.com/llvm/llvm-project/commit/44be5a7fdc20a7f90d63dc18699a470e900bd3ba
  Author: David Green <david.green at arm.com>
  Date:   2024-03-06 (Wed, 06 Mar 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetInstrInfo.h
    M llvm/lib/CodeGen/MachineScheduler.cpp
    M llvm/lib/CodeGen/TargetInstrInfo.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.h
    M llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.h
    M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
    M llvm/lib/Target/Hexagon/HexagonInstrInfo.h
    M llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
    M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
    M llvm/lib/Target/Lanai/LanaiInstrInfo.h
    M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
    M llvm/lib/Target/PowerPC/PPCInstrInfo.h
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.h
    M llvm/lib/Target/X86/X86InstrInfo.cpp
    M llvm/lib/Target/X86/X86InstrInfo.h
    M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
    M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp

  Log Message:
  -----------
  [Codegen] Make Width in getMemOperandsWithOffsetWidth a LocationSize. (#83875)

This is another part of #70452 which makes getMemOperandsWithOffsetWidth
use a LocationSize for Width, as opposed to the unsigned it currently
uses. The advantages on it's own are not super high if
getMemOperandsWithOffsetWidth usually uses known sizes, but if the
values can come from an MMO it can help be more accurate in case they
are Unknown (and in the future, scalable).



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