[all-commits] [llvm/llvm-project] 95b52e: [RISCV] Take SEW/LMUL into account for value track...

[Wang Pengcheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 95b52ecb7881014089a5282d308fab4eb8237f20
      https://github.com/llvm/llvm-project/commit/95b52ecb7881014089a5282d308fab4eb8237f20
  Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
  Date:   2024-03-06 (Wed, 06 Mar 2024)

  Changed paths:
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/test/Transforms/InstCombine/RISCV/riscv-vsetvli-knownbits.ll
    M llvm/test/Transforms/InstCombine/RISCV/riscv-vsetvlimax-knownbits.ll

  Log Message:
  -----------
  [RISCV] Take SEW/LMUL into account for value tracking of vsetvli[max] (#82163)

So that we can benefit from some instcombine optimizations.

This PR contains two commits: the first is for adding tests and the
second is for the optimization.



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