[all-commits] [llvm/llvm-project] aab3d1: [FileCheck] Fix parsing empty global and pseudo va...
Alexander Richardson via All-commits
all-commits at lists.llvm.org
Mon Mar 4 10:44:32 PST 2024
Branch: refs/heads/users/arichardson/spr/utilsnot-disable-coredumps-when-crash-is-passed
Home: https://github.com/llvm/llvm-project
Commit: aab3d13179dc5a37465a0e6fbf1b9369a4e6e50f
https://github.com/llvm/llvm-project/commit/aab3d13179dc5a37465a0e6fbf1b9369a4e6e50f
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M llvm/lib/FileCheck/FileCheck.cpp
A llvm/test/FileCheck/empty-variable-name.txt
Log Message:
-----------
[FileCheck] Fix parsing empty global and pseudo variable names (#82595)
In `Pattern::parseVariable`, for global variables (those starting with
'$') and for pseudo variables (those starting with '@') the first
character is consumed before actual variable name parsing. If the name
is empty, it leads to out-of-bound access to the corresponding
`StringRef`.
This patch adds an if statement against the case described.
Commit: e4b15fc854b6eaebe63ba3acfcd39bf6dd7748b5
https://github.com/llvm/llvm-project/commit/e4b15fc854b6eaebe63ba3acfcd39bf6dd7748b5
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-03-01 (Fri, 01 Mar 2024)
Changed paths:
M libc/cmake/modules/LLVMLibCHeaderRules.cmake
Log Message:
-----------
[libc] Fix '/gpu' directory not being made for the declarations
Summary:
We use this extra directory for offloading languages like CUDA or
OpenMP. We made the '/gpu' directory for the regular headers but not the
others. Fix that for now.
Commit: fb67dce1cb87e279593c27bd4122fe63bad75f04
https://github.com/llvm/llvm-project/commit/fb67dce1cb87e279593c27bd4122fe63bad75f04
Author: Shih-Po Hung <shihpo.hung at sifive.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
A llvm/test/Analysis/CostModel/RISCV/vector-cost-without-v.ll
Log Message:
-----------
[RISCV] Fix crash when unrolling loop containing vector instructions (#83384)
When MVT is not a vector type, TCK_CodeSize should return an invalid
cost. This patch adds a check in the beginning to make sure all cost
kinds return invalid costs consistently.
Before this patch, TCK_CodeSize returns a valid cost on scalar MVT but
other cost kinds doesn't.
This fixes the issue #83294 where a loop contains vector instructions
and MVT is scalar after type legalization when the vector extension is
not enabled,
Commit: 28b354a96054196cc3c50c2517b0509d0d316d42
https://github.com/llvm/llvm-project/commit/28b354a96054196cc3c50c2517b0509d0d316d42
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M llvm/lib/FileCheck/FileCheck.cpp
R llvm/test/FileCheck/empty-variable-name.txt
Log Message:
-----------
Revert "[FileCheck] Fix parsing empty global and pseudo variable names" (#83657)
Reverts llvm/llvm-project#82595
See build failure
https://lab.llvm.org/buildbot/#/builders/139/builds/60549
Commit: 597f9761c3a5ba278fa930d2fac13f156287d505
https://github.com/llvm/llvm-project/commit/597f9761c3a5ba278fa930d2fac13f156287d505
Author: WÁNG Xuěruì <git at xen0n.name>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M compiler-rt/lib/scudo/standalone/checksum.cpp
M compiler-rt/lib/scudo/standalone/checksum.h
M compiler-rt/lib/scudo/standalone/crc32_hw.cpp
Log Message:
-----------
[scudo] Add support for LoongArch hardware CRC32 checksumming (#83113)
One has to probe for platform capability prior to use with HWCAP,
according to LoongArch documentation.
Commit: b14220e075fe47f4d61632e80a6d0a4a955a7c97
https://github.com/llvm/llvm-project/commit/b14220e075fe47f4d61632e80a6d0a4a955a7c97
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
Log Message:
-----------
[lldb][X86] Fix setting target features in ClangExpressionParser (#82364)
Currently, for x86 and x86_64 triples, "+sse" and "+sse2" are appended
to `Features` vector of `TargetOptions` unconditionally. This vector is
later reset in `TargetInfo::CreateTargetInfo` and filled using info from
`FeaturesAsWritten` vector, so previous modifications of the `Features`
vector have no effect. For x86_64 triple, we append "sse2"
unconditionally in `X86TargetInfo::initFeatureMap`, so despite the
`Features` vector reset, we still have the desired sse features enabled.
The corresponding code in `X86TargetInfo::initFeatureMap` is marked as
FIXME, so we should not probably rely on it and should set desired
features properly in `ClangExpressionParser`.
This patch changes the vector the features are appended to from
`Features` to `FeaturesAsWritten`. It's not reset later and is used to
compute resulting `Features` vector.
Commit: c4f59937cae95a576635848b36a23b0d672f71d6
https://github.com/llvm/llvm-project/commit/c4f59937cae95a576635848b36a23b0d672f71d6
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M llvm/lib/Support/LockFileManager.cpp
Log Message:
-----------
[llvm][Support] Call clear_error in LockFileManager to avoid report_fatal_error (#83655)
As per the comment in `raw_fd_ostream`'s destructor, you must call
`clear_error()` to prevent a call to `report_fatal_error()`. There's not
really a way to test this, but we did encounter it in the wild.
rdar://117347895
Commit: bf08d0286825eb3e482bcfdc1cc7c19a28441ae7
https://github.com/llvm/llvm-project/commit/bf08d0286825eb3e482bcfdc1cc7c19a28441ae7
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/Verifier.cpp
M llvm/test/Assembler/debug-info.ll
R llvm/test/DebugInfo/AArch64/ptrauth.ll
M llvm/unittests/IR/MetadataTest.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
Log Message:
-----------
Revert "[Dwarf] Support `__ptrauth` qualifier in metadata nodes" (#83672)
Reverts llvm/llvm-project#82363
See a build failure related to an issue discovered by memory sanitizer
(use of uninitialized value):
https://lab.llvm.org/buildbot/#/builders/37/builds/31965
Commit: 10f5e983a9e3162a569cbebeb32168716e391340
https://github.com/llvm/llvm-project/commit/10f5e983a9e3162a569cbebeb32168716e391340
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
A llvm/test/Transforms/DeadStoreElimination/batchaa-caching-new-pointers.ll
Log Message:
-----------
[DSE] Delay deleting non-memory-defs until end of DSE. (#83411)
DSE uses BatchAA, which caches queries using pairs of MemoryLocations.
At the moment, DSE may remove instructions that are used as pointers in
cached MemoryLocations. If a new instruction used by a new MemoryLoation
and this instruction gets allocated at the same address as a previosuly
cached and then removed instruction, we may access an incorrect entry in
the cache.
To avoid this delay removing all instructions except MemoryDefs until
the end of DSE. This should avoid removing any values used in BatchAA's
cache.
Test case by @vporpo from
https://github.com/llvm/llvm-project/pull/83181.
(Test not precommitted because the results are non-determinstic - memset
only sometimes gets removed)
PR: https://github.com/llvm/llvm-project/pull/83411
Commit: ca827d53c5524409dcca5ade3949b25f38a60fef
https://github.com/llvm/llvm-project/commit/ca827d53c5524409dcca5ade3949b25f38a60fef
Author: Simon Pilgrim <RKSimon at users.noreply.github.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool.ll
M llvm/test/CodeGen/X86/cmp-shiftX-maskX.ll
Log Message:
-----------
[X86] Convert logicalshift(x, C) -> and(x, M) iff x is allsignbits (#83596)
If we're logical shifting an all-signbits value, then we can just mask out the shifted bits.
This helps removes some unnecessary bitcasted vXi16 shifts used for vXi8 shifts (which SimplifyDemandedBits will struggle to remove through the bitcast), and allows some AVX1 shifts of 256-bit values to stay as a YMM instruction.
Noticed in codegen from #82290
Commit: 2a95fe481d18e273b9654322135a08d7c2937536
https://github.com/llvm/llvm-project/commit/2a95fe481d18e273b9654322135a08d7c2937536
Author: David Green <david.green at arm.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/test/Transforms/simplifyintrinsics.fir
Log Message:
-----------
[Flang] Allow Intrinsic simpification with min/maxloc dim and scalar result (#81619)
This makes an adjustment to the existing fir minloc/maxloc generation
code to handle functions with a dim=1 that produce a scalar result. This
should allow us to get the same benefits as the existing generated
minmax reductions.
This is a recommit of #76194 with an extra alteration to the end of
genRuntimeMinMaxlocBody to make sure we convert the output array to the
correct type (a `box<heap<i32>>`, not `box<heap<array<1xi32>>>`) to
prevent writing the wrong type of box into it. This still allocates the
data as a `array<1xi32>`, converting it into a i32 assuming that is
safe. An alternative would be to allocate the data as a i32 and change
more of the accesses to it throughout genRuntimeMinMaxlocBody.
Commit: 1f613bce19ea78789934b2a47be8c6a13925f0fa
https://github.com/llvm/llvm-project/commit/1f613bce19ea78789934b2a47be8c6a13925f0fa
Author: Hui <hui.xie1990 at gmail.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M libcxx/include/__atomic/atomic_base.h
M libcxx/include/__atomic/atomic_flag.h
M libcxx/include/__atomic/atomic_sync.h
M libcxx/include/latch
M libcxx/include/semaphore
Log Message:
-----------
[libc++] refactor `cxx_atomic_wait` to make it reusable for atomic_ref (#81427)
The goal of this patch is to make `atomic`'s wait functions to be
reusable by `atomic_ref`.
https://github.com/llvm/llvm-project/pull/76647
First, this patch is built on top of
https://github.com/llvm/llvm-project/pull/80596 , to reduce the future
merge conflicts.
This patch made the following functions as "API"s to be used by
`atomic`, `atomic_flag`, `semaphore`, `latch`, `atomic_ref`
```
__atomic_wait
__atomic_wait_unless
__atomic_notify_one
__atomic_notify_all
```
These functions are made generic to support `atomic` type and
`atomic_ref`. There are two customisation points.
```
// How to load the value from the given type (with a memory order)
__atomic_load
```
```
// what is the contention address that the platform `wait` function is going to monitor
__atomic_contention_address
```
For `atomic_ref` (not implemented in this patch), the `load` and
`address` function will be different, because
- it does not use the "atomic abstraction layer" so the `load` operation
will be some gcc builtin
- the contention address will be the user's actual type that the
`atomic_ref` is pointing to
Commit: 57f599d6443a910a213094646e7e26837a1d4417
https://github.com/llvm/llvm-project/commit/57f599d6443a910a213094646e7e26837a1d4417
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/literals.cpp
Log Message:
-----------
[clang][Interp] Improve handling of external variables
Further down in this function, we assert that the variable has
an initializer, which didn't work for external declarations.
Commit: a30ba2ca21b0da49631c6d0c52108e4a080a451e
https://github.com/llvm/llvm-project/commit/a30ba2ca21b0da49631c6d0c52108e4a080a451e
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M clang/lib/AST/Interp/InterpBuiltin.cpp
Log Message:
-----------
[clang][Interp][NFC] Emit diagnostic for unknown builtins
Instead of just returning false.
Commit: b901b0d3edeaa30e363af4cb9dc76d6a7072e6cf
https://github.com/llvm/llvm-project/commit/b901b0d3edeaa30e363af4cb9dc76d6a7072e6cf
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/test/AST/Interp/builtin-functions.cpp
Log Message:
-----------
[clang][Interp] Reject dummy pointers from __builtin_strcmp()
We can't load anything from them, so reject them here.
Commit: dfb8a1531c962238a63db199dff973deec47e4ff
https://github.com/llvm/llvm-project/commit/dfb8a1531c962238a63db199dff973deec47e4ff
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M clang/lib/AST/Interp/InterpBuiltin.cpp
Log Message:
-----------
[clang][Interp][NFC] Make a local variable const
Commit: f25debe58b61a6d66e662d60fd4c060adcd74630
https://github.com/llvm/llvm-project/commit/f25debe58b61a6d66e662d60fd4c060adcd74630
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M clang/lib/AST/Interp/InterpBuiltin.cpp
Log Message:
-----------
[clang][Interp][NFC] Remove some leftover debug output
Commit: d89b771ef5fe39403a2ad525fa36efbc4ce2a517
https://github.com/llvm/llvm-project/commit/d89b771ef5fe39403a2ad525fa36efbc4ce2a517
Author: Fangrui Song <i at maskray.me>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M llvm/test/CodeGen/ARM/arm-position-independence.ll
Log Message:
-----------
[ARM] Add alias tests for ROPI/RWPI
https://reviews.llvm.org/D23195 does not test aliases.
Commit: af83a2add5687d0c2f70e538612b7e86ccbf47a5
https://github.com/llvm/llvm-project/commit/af83a2add5687d0c2f70e538612b7e86ccbf47a5
Author: Michał Górny <mgorny at gentoo.org>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M lld/CMakeLists.txt
M lld/test/CMakeLists.txt
M llvm/cmake/modules/AddLLVM.cmake
Log Message:
-----------
[lld] Fixes for unitests in standalone builds (#83670)
1. Replace the obsolete `llvm_add_unittests()` CMake function with an
explicit check for `TARGET llvm_gtest`. This is more consistent with the
rest of the code, and it makes it possible to avoid checking out
`third-party` tree.
2. Add `LLDUnitTests` test dependency to standalone builds. It is
defined unconditionally, and actually necessary to ensure that unit
tests will be built.
Commit: da591d390e7f865c846d12dc5559875eca347c28
https://github.com/llvm/llvm-project/commit/da591d390e7f865c846d12dc5559875eca347c28
Author: Bjorn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
A llvm/test/TableGen/GlobalISelEmitter-multiple-output-reject.td
M llvm/test/TableGen/GlobalISelEmitter-multiple-output.td
M llvm/utils/TableGen/GlobalISelEmitter.cpp
Log Message:
-----------
[GlobalISel][TableGen] Take first result for multi-output instructions (#81130)
Previously, tblgen would reject patterns where one of its nested
instructions produced more than one result. These arise when the
instruction definition contains 'outs' as well as 'Defs'. This patch
fixes that by always taking the first result, which is how these
situations are handled in SelectionIDAG.
Original patch: https://reviews.llvm.org/D86617
Continued as: https://github.com/llvm/llvm-project/pull/81130
Commit: 8ec28af8eaff5acd0df3e53340159c034f08533d
https://github.com/llvm/llvm-project/commit/8ec28af8eaff5acd0df3e53340159c034f08533d
Author: Matthias Gehre <matthias.gehre at amd.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M mlir/include/mlir/Dialect/PDL/IR/PDLOps.td
M mlir/include/mlir/Dialect/PDLInterp/IR/PDLInterpOps.td
M mlir/include/mlir/IR/PDLPatternMatch.h.inc
M mlir/lib/Conversion/PDLToPDLInterp/PDLToPDLInterp.cpp
M mlir/lib/Conversion/PDLToPDLInterp/Predicate.h
M mlir/lib/Conversion/PDLToPDLInterp/PredicateTree.cpp
M mlir/lib/Dialect/PDL/IR/PDL.cpp
M mlir/lib/Rewrite/ByteCode.cpp
M mlir/lib/Tools/PDLL/Parser/Parser.cpp
M mlir/test/Conversion/PDLToPDLInterp/pdl-to-pdl-interp-matcher.mlir
A mlir/test/Conversion/PDLToPDLInterp/use-constraint-result.mlir
M mlir/test/Dialect/PDL/ops.mlir
M mlir/test/Rewrite/pdl-bytecode.mlir
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.cpp
M mlir/test/lib/Rewrite/TestPDLByteCode.cpp
M mlir/test/mlir-pdll/Parser/constraint-failure.pdll
M mlir/test/mlir-pdll/Parser/constraint.pdll
M mlir/test/python/dialects/pdl_ops.py
Log Message:
-----------
Reapply "[mlir][PDL] Add support for native constraints with results (#82760)"
with a small stack-use-after-scope fix in getConstraintPredicates()
This reverts commit c80e6edba4a9593f0587e27fa0ac825ebe174afd.
Commit: 051e910b8b6c59fc94d019fa01ae4507b1c81498
https://github.com/llvm/llvm-project/commit/051e910b8b6c59fc94d019fa01ae4507b1c81498
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M clang/lib/Format/FormatToken.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/TokenAnnotator.h
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
Log Message:
-----------
[clang-format][NFC] Replace Style.isCpp() with IsCpp (#83533)
Commit: 60fbd6050107875956960c3ce35cf94b202d8675
https://github.com/llvm/llvm-project/commit/60fbd6050107875956960c3ce35cf94b202d8675
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
Revert "[mlir][Transforms] Encapsulate dialect conversion options in `ConversionConfig` (#83662)
This reverts commit 5f1319bb385342c7ef4124b05b83b89ef8588ee8.
A FIR test is broken on Windows
Commit: f505a92fc2e965f1fe2e6a25d1ff4f0d9d1297c6
https://github.com/llvm/llvm-project/commit/f505a92fc2e965f1fe2e6a25d1ff4f0d9d1297c6
Author: MagentaTreehouse <99200384+MagentaTreehouse at users.noreply.github.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeEmitter.cpp
M llvm/lib/Target/AArch64/AArch64SLSHardening.cpp
M llvm/lib/Target/ARM/ARMSLSHardening.cpp
M llvm/lib/Target/X86/X86IndirectThunks.cpp
Log Message:
-----------
[NFC] Use fold expressions to replace discarded initializer_lists (#83693)
Commit: 205dce6029bed302f354c0bde5d8c5804f214051
https://github.com/llvm/llvm-project/commit/205dce6029bed302f354c0bde5d8c5804f214051
Author: Quinn Dawkins <quinn.dawkins at gmail.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/test/Dialect/Linalg/canonicalize.mlir
Log Message:
-----------
[mlir][linalg] Add a folder for transpose(fill) -> fill (#83623)
This is similar to the existing folder for a linalg.copy. Transposing a
filled tensor is the same as filling the destination of the transpose.
Commit: ea628e3d7e78728e8605080ae1ab0ad55e3df191
https://github.com/llvm/llvm-project/commit/ea628e3d7e78728e8605080ae1ab0ad55e3df191
Author: Mircea Trofin <mtrofin at google.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
A pyproject.toml
Log Message:
-----------
[Py Reformat] Exclude `third-party` from reformat (#83491)
Commit: 0ec318e57b0c7cbc0d9c899390daf3248cbe6a53
https://github.com/llvm/llvm-project/commit/0ec318e57b0c7cbc0d9c899390daf3248cbe6a53
Author: Matthias Gehre <matthias.gehre at amd.com>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M mlir/lib/Rewrite/ByteCode.cpp
Log Message:
-----------
Fix unused variable in "[mlir][PDL] Add support for native constraints with results (#82760)"
Commit: def16bca8133a2f49127a382061aa36406862a15
https://github.com/llvm/llvm-project/commit/def16bca8133a2f49127a382061aa36406862a15
Author: Artem Tyurin <artem.tyurin at gmail.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/test/Conversion/MemRefToSPIRV/memref-to-spirv.mlir
Log Message:
-----------
[mlir][spirv] Retain nontemporal attribute when converting memref load/store (#82119)
Fixes #77156.
Commit: 8b26e609e032b4535b90514e22875bfaa194216c
https://github.com/llvm/llvm-project/commit/8b26e609e032b4535b90514e22875bfaa194216c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV] Use the VR register allocation order for VM. (#83664)
Commit: 4dd9c2ed3258c38bad4be53f7b2f943c79acd87f
https://github.com/llvm/llvm-project/commit/4dd9c2ed3258c38bad4be53f7b2f943c79acd87f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
Log Message:
-----------
[RISCV] Use NewVL in splatPartsI64WithVL. (#83690)
In 7b5cf52f32c09, I added this NewVL and checked that it had been set,
but I didn't use it for the VL of the splat.
Commit: 8fccf6bf5ccb4404cfe184ceda7c32e349e122c0
https://github.com/llvm/llvm-project/commit/8fccf6bf5ccb4404cfe184ceda7c32e349e122c0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M llvm/tools/opt/optdriver.cpp
Log Message:
-----------
[opt] Use static arrays instead of std::vector to store legacy pass names. NFC (#83634)
A std::vector causes a heap allocation and a memcpy of static
initialization data from the rodata section.
Use a static array instead so we can use the static data directly.
Commit: d5f77e112e6352d933afa22920a4a0d3bf8d26e5
https://github.com/llvm/llvm-project/commit/d5f77e112e6352d933afa22920a4a0d3bf8d26e5
Author: Brad Smith <brad at comstyle.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/DragonFly.cpp
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/lib/Driver/ToolChains/Haiku.cpp
M clang/lib/Driver/ToolChains/NetBSD.cpp
M clang/lib/Driver/ToolChains/OpenBSD.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/ToolChains/Solaris.cpp
Log Message:
-----------
[Driver] Remove duplicate -r flag usage when linking (#82715)
Bug #82010
Commit: 6594f428de91e333c1cbea4f55e79b18d31024c4
https://github.com/llvm/llvm-project/commit/6594f428de91e333c1cbea4f55e79b18d31024c4
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M bolt/include/bolt/Core/ParallelUtilities.h
M lldb/include/lldb/Core/Debugger.h
M llvm/include/llvm/Debuginfod/Debuginfod.h
M llvm/include/llvm/Support/BalancedPartitioning.h
M llvm/include/llvm/Support/ThreadPool.h
M llvm/lib/Debuginfod/Debuginfod.cpp
M llvm/lib/Support/ThreadPool.cpp
M llvm/tools/llvm-cov/CoverageReport.h
M llvm/tools/llvm-cov/SourceCoverageViewHTML.h
M llvm/unittests/Support/ThreadPool.cpp
M mlir/include/mlir/CAPI/Support.h
M mlir/include/mlir/IR/MLIRContext.h
M mlir/include/mlir/IR/Threading.h
M mlir/lib/CAPI/IR/IR.cpp
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
Log Message:
-----------
Split the llvm::ThreadPool into an abstract base class and an implementation (#82094)
This decouples the public API used to enqueue tasks and wait for
completion from the actual implementation, and opens up the possibility
for clients to set their own thread pool implementation for the pool.
https://discourse.llvm.org/t/construct-threadpool-from-vector-of-existing-threads/76883
Commit: 6b70c5d79fe44cbe01b0443454c6952c5b541585
https://github.com/llvm/llvm-project/commit/6b70c5d79fe44cbe01b0443454c6952c5b541585
Author: George Koehler <kernigh at gmail.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/test/CodeGen/PowerPC/crsave.ll
Log Message:
-----------
[PowerPC] provide CFI for ELF32 to unwind cr2, cr3, cr4 (#83098)
Delete the code that skips the CFI for the condition register on ELF32.
The code checked !MustSaveCR, which happened only when
Subtarget.is32BitELFABI(), where spillCalleeSavedRegisters is spilling
cr in a different way. The spill was missing CFI. After deleting this
code, a spill of cr2 to cr4 gets CFI in the same way as a spill of r14
to r31.
Fixes #83094
Commit: 6c6ea9d2b06c57b4c35b3d4bd6cc854a7b9a4590
https://github.com/llvm/llvm-project/commit/6c6ea9d2b06c57b4c35b3d4bd6cc854a7b9a4590
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M llvm/lib/DebugInfo/GSYM/CMakeLists.txt
Log Message:
-----------
Fix BUILD_SHARED_LIBS=ON build for platforms which require explicit link of -lpthread (NFC)
Commit: e52650cfc3aa5d134186c5a8fd6701a6fd0a1051
https://github.com/llvm/llvm-project/commit/e52650cfc3aa5d134186c5a8fd6701a6fd0a1051
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M lldb/source/Core/Debugger.cpp
Log Message:
-----------
Fix LLDB build after renaming the base class for ThreadPool to ThreadPoolInterface
The header was updated but not the implementation.
Commit: 1a4f52c84257a2a0083abe37368c526a2f8cd928
https://github.com/llvm/llvm-project/commit/1a4f52c84257a2a0083abe37368c526a2f8cd928
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M llvm/lib/DWARFLinker/Classic/CMakeLists.txt
Log Message:
-----------
More fix BUILD_SHARED_LIBS=ON build for platforms which require explicit link of -lpthread (NFC)
Some systems requires explictly providing -lpthread when linking, I don't
have such system so it is hard to find all the missing cases.
Commit: e29cad6b3bb1f573ad5340771faa8a01cc05cb65
https://github.com/llvm/llvm-project/commit/e29cad6b3bb1f573ad5340771faa8a01cc05cb65
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/CMakeLists.txt
Log Message:
-----------
More fix BUILD_SHARED_LIBS=ON build for platforms which require explicit link of -lpthread (NFC)
Some systems requires explictly providing -lpthread when linking, I don't
have such system so it is hard to find all the missing cases.
Commit: 5f70f253c2b8978b50d20d37b25591b40dfe38d5
https://github.com/llvm/llvm-project/commit/5f70f253c2b8978b50d20d37b25591b40dfe38d5
Author: Alex Richardson <alexrichardson at google.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_posix_libcdep.cpp
Log Message:
-----------
[sanitizer_common] Remove unnecessary const_cast
This used to be required because rlim was declared volatile, but commit
d657f109d7080bd51ad70e88859acf64931152fe removed that workaround.
Commit: 67221ed886b59b2f9b96a154e56e16e27dc3b1a4
https://github.com/llvm/llvm-project/commit/67221ed886b59b2f9b96a154e56e16e27dc3b1a4
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M llvm/lib/LTO/CMakeLists.txt
Log Message:
-----------
More fix BUILD_SHARED_LIBS=ON build for platforms which require explicit link of -lpthread (NFC)
Some systems requires explictly providing -lpthread when linking, I don't
have such system so it is hard to find all the missing cases.
Commit: c4621607245a5feed42cf9f748ff796728ef579a
https://github.com/llvm/llvm-project/commit/c4621607245a5feed42cf9f748ff796728ef579a
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-03-02 (Sat, 02 Mar 2024)
Changed paths:
M clang/lib/Tooling/CMakeLists.txt
Log Message:
-----------
More fix BUILD_SHARED_LIBS=ON build for platforms which require explicit link of -lpthread (NFC)
Some systems requires explictly providing -lpthread when linking, I don't
have such system so it is hard to find all the missing cases.
Commit: 37293e69e6362e3559c1a4e1ac62b53f2b0edb0a
https://github.com/llvm/llvm-project/commit/37293e69e6362e3559c1a4e1ac62b53f2b0edb0a
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
A llvm/test/CodeGen/X86/apx/long-instruction-fixup-x32.ll
A llvm/test/CodeGen/X86/apx/long-instruction-fixup.ll
Log Message:
-----------
[X86][CodeGen] Support long instruction fixup for APX NDD instructions (#83578)
RFC:
https://discourse.llvm.org/t/rfc-support-long-instruction-fixup-for-x86/76539
Commit: 3f18f6a2cfecb080f006477c46d3626102841a17
https://github.com/llvm/llvm-project/commit/3f18f6a2cfecb080f006477c46d3626102841a17
Author: Quinn Dawkins <quinn.dawkins at gmail.com>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/test/Dialect/Linalg/reshape_fusion.mlir
Log Message:
-----------
[mlir][linalg] Enable fusion by expansion of reduction and named ops (#83473)
This adds support for expansion of named linalg ops and linalg ops with
reduction iterators. This improves the ability to make fusion decisions
WRT reduction operations. To recover the previous behavior, users of the
patterns can add a control function to restrict propagation of reshape
by expansion through linalg ops with reduction iterators.
For named linalg ops, this always converts the named op into a generic.
Commit: 800de14fab136f8e17c04cc783e0f8f2b305333b
https://github.com/llvm/llvm-project/commit/800de14fab136f8e17c04cc783e0f8f2b305333b
Author: David Green <david.green at arm.com>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/include/llvm/TargetParser/ARMTargetParser.def
M llvm/include/llvm/TargetParser/ARMTargetParser.h
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[ARM][AArch64] Reformat target parser. NFC (#82601)
This is something we generally tend to avoid due to it confusing the git
history, but with the new github formatting bots being more noisy we
keep running into issues with the existing formatting when adding or
adjusting CPUs. This patch formats the code to make sure we are in a
good state going forward.
Commit: eb3b063995d6b4f8f3bc22eeecbf239ffaecc29f
https://github.com/llvm/llvm-project/commit/eb3b063995d6b4f8f3bc22eeecbf239ffaecc29f
Author: AMS21 <AMS21.github at gmail.com>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M clang-tools-extra/clang-tidy/google/ExplicitConstructorCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/google/explicit-constructor-cxx20.cpp
Log Message:
-----------
[clang-tidy] Improve `google-explicit-constructor` checks handling of `explicit(bool)` (#82689)
We now treat `explicit(false)` the same way we treat `noexcept(false)`
in the noexcept checks, which is ignoring it.
Also introduced a new warning message if a constructor has an `explicit`
declaration which evaluates to false and no longer emit a faulty FixIt.
Fixes #81121
Commit: 22f34ea3b05537235956c99fe942aa95b88762c0
https://github.com/llvm/llvm-project/commit/22f34ea3b05537235956c99fe942aa95b88762c0
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M mlir/include/mlir/Query/Matcher/ErrorBuilder.h
M mlir/include/mlir/Query/Matcher/MatchersInternal.h
M mlir/lib/Query/CMakeLists.txt
M mlir/lib/Query/Matcher/Diagnostics.cpp
M mlir/lib/Query/Matcher/Parser.cpp
M mlir/lib/Query/Matcher/Parser.h
M mlir/lib/Query/Matcher/RegistryManager.cpp
M mlir/lib/Query/Matcher/RegistryManager.h
M mlir/lib/Query/Query.cpp
A mlir/test/mlir-query/function-extraction.mlir
Log Message:
-----------
Reapply "[mlir-query] Add function extraction feature to mlir-query"
Fix build deps.
This reverts commit de55c2f869925a3ed7f26e168424021c6bc46799.
Commit: a5d3a1dbc8c9bd1ea76550a4bac44d25b1e43a5e
https://github.com/llvm/llvm-project/commit/a5d3a1dbc8c9bd1ea76550a4bac44d25b1e43a5e
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M libcxx/include/fstream
Log Message:
-----------
[libc++] Refactors fstream open. (#76617)
This moves the duplicated code to one new function.
This is a preparation to fix
https://github.com/llvm/llvm-project/issues/60509
Commit: 732a5cba8c739ed40a7280b5d74ca717910c2c4c
https://github.com/llvm/llvm-project/commit/732a5cba8c739ed40a7280b5d74ca717910c2c4c
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M mlir/include/mlir/Query/Matcher/ErrorBuilder.h
M mlir/include/mlir/Query/Matcher/MatchersInternal.h
M mlir/lib/Query/CMakeLists.txt
M mlir/lib/Query/Matcher/Diagnostics.cpp
M mlir/lib/Query/Matcher/Parser.cpp
M mlir/lib/Query/Matcher/Parser.h
M mlir/lib/Query/Matcher/RegistryManager.cpp
M mlir/lib/Query/Matcher/RegistryManager.h
M mlir/lib/Query/Query.cpp
R mlir/test/mlir-query/function-extraction.mlir
Log Message:
-----------
Revert "Reapply "[mlir-query] Add function extraction feature to mlir-query""
Commit fails on sanitizers.
This reverts commit 22f34ea3b05537235956c99fe942aa95b88762c0.
Commit: 5b4759f9fd1419abc69e656c40f04a0fd9483d2a
https://github.com/llvm/llvm-project/commit/5b4759f9fd1419abc69e656c40f04a0fd9483d2a
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll
M llvm/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll
M llvm/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll
M llvm/test/CodeGen/X86/2008-02-18-TailMergingBug.ll
M llvm/test/CodeGen/X86/avx-cmp.ll
M llvm/test/CodeGen/X86/cmp.ll
M llvm/test/CodeGen/X86/dagcombine-and-setcc.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
M llvm/test/CodeGen/X86/inline-spiller-impdef-on-implicit-def-regression.ll
M llvm/test/CodeGen/X86/lsr-addrecloops.ll
M llvm/test/CodeGen/X86/movmsk-cmp.ll
M llvm/test/CodeGen/X86/or-branch.ll
M llvm/test/CodeGen/X86/peephole-na-phys-copy-folding.ll
M llvm/test/CodeGen/X86/pr33747.ll
M llvm/test/CodeGen/X86/pr37025.ll
M llvm/test/CodeGen/X86/pr38795.ll
M llvm/test/CodeGen/X86/setcc-logic.ll
M llvm/test/CodeGen/X86/swifterror.ll
M llvm/test/CodeGen/X86/tail-dup-merge-loop-headers.ll
M llvm/test/CodeGen/X86/tail-opts.ll
M llvm/test/CodeGen/X86/tailcall-extract.ll
M llvm/test/CodeGen/X86/test-shrink-bug.ll
M llvm/test/CodeGen/X86/x86-shrink-wrap-unwind.ll
Log Message:
-----------
Revert "[X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches"
This has been buggy for a while.
Reverts #81689
This reverts commit ae76dfb74701e05e5ab4be194e20e49f10768e46.
Commit: 58b44c8102afb0e76d1cb70d4a5d089f70d2f657
https://github.com/llvm/llvm-project/commit/58b44c8102afb0e76d1cb70d4a5d089f70d2f657
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M mlir/include/mlir/Query/Matcher/ErrorBuilder.h
M mlir/include/mlir/Query/Matcher/MatchersInternal.h
M mlir/lib/Query/CMakeLists.txt
M mlir/lib/Query/Matcher/Diagnostics.cpp
M mlir/lib/Query/Matcher/Parser.cpp
M mlir/lib/Query/Matcher/Parser.h
M mlir/lib/Query/Matcher/RegistryManager.cpp
M mlir/lib/Query/Matcher/RegistryManager.h
M mlir/lib/Query/Query.cpp
A mlir/test/mlir-query/function-extraction.mlir
Log Message:
-----------
Reapply "Reapply "[mlir-query] Add function extraction feature to mlir-query""
Fix ASAN by erasing the op extracted post printing.
This reverts commit 732a5cba8c739ed40a7280b5d74ca717910c2c4c.
Commit: 3ca73e03aaf516ed10df2ec79f92f73d9216c884
https://github.com/llvm/llvm-project/commit/3ca73e03aaf516ed10df2ec79f92f73d9216c884
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M mlir/lib/Query/Query.cpp
Log Message:
-----------
[mlir-query] Attempt to fix gcc7 build
I haven't tested via gcc7, but this should address the error reported.
Commit: 03f150bb5688be72ae4dfb43fbe6795aae493e6d
https://github.com/llvm/llvm-project/commit/03f150bb5688be72ae4dfb43fbe6795aae493e6d
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
R .arcconfig
R .arclint
M llvm/docs/Contributing.rst
M llvm/docs/DeveloperPolicy.rst
R llvm/docs/Phabricator.rst
R llvm/docs/Phabricator_premerge_results.png
R llvm/docs/Phabricator_premerge_unit_tests.png
M llvm/docs/UserGuides.rst
R utils/arcanist/clang-format.sh
Log Message:
-----------
Removes arcanist and Phabricator information. (#82115)
Removes old arcanist configuration files and documentation of
Phabricator. This only removes the data that seems save to remove.
Commit: 5f058398ab7a6c2cf3555daf190d3d13d68f78f5
https://github.com/llvm/llvm-project/commit/5f058398ab7a6c2cf3555daf190d3d13d68f78f5
Author: David Green <david.green at arm.com>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/test/CodeGen/ARM/aes-erratum-fix.ll
A llvm/test/CodeGen/ARM/aes.ll
Log Message:
-----------
[ARM] Mark AESD and AESE instructions as commutative.
Similar to #83390, this marks AESD and AESE as commutative, as the logic of the
instructions starts as a XOR between the two operands.
Commit: 0c89427b99f6f6d7c217c70ff880ca097340f9a4
https://github.com/llvm/llvm-project/commit/0c89427b99f6f6d7c217c70ff880ca097340f9a4
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/Driver.cpp
A clang/test/Driver/modules-print-library-module-manifest-path.cpp
Log Message:
-----------
Reland "[clang][modules] Print library module manifest path." (#82160)
This implements a way for the compiler to find the modules.json
associated with the C++23 Standard library modules.
This is based on a discussion in SG15. At the moment no Standard library
installs this manifest. #75741 adds this feature in libc++.
This reverts commit 82f424f766be00b037a706a835d0a0663a2680f1.
Disables the tests on non-X86 platforms as suggested.
Commit: 55357160d0e151c32f86e1d6683b4bddbb706aa1
https://github.com/llvm/llvm-project/commit/55357160d0e151c32f86e1d6683b4bddbb706aa1
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M libcxx/include/__type_traits/remove_cv.h
M libcxx/include/__type_traits/remove_cvref.h
Log Message:
-----------
[libc++] Use GCC type traits builtins for remove_cv and remove_cvref (#81386)
They have been added recently to GCC without support for mangling. This
patch uses them in structs and adds aliases to these structs instead of
the builtins directly.
Commit: 0c90e8837a9e5f27985ccaf85120083db9e1b43e
https://github.com/llvm/llvm-project/commit/0c90e8837a9e5f27985ccaf85120083db9e1b43e
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M libcxx/src/iostream.cpp
Log Message:
-----------
[libc++][NFC] Replace _ALIGNAS_TYPE with alignas in iostream.cpp
Commit: 33de5a316caa3c9b07ee1ccc7fbc3434247ff787
https://github.com/llvm/llvm-project/commit/33de5a316caa3c9b07ee1ccc7fbc3434247ff787
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__filesystem/path.h
M libcxx/include/__functional/bind.h
M libcxx/include/__functional/hash.h
M libcxx/include/__functional/identity.h
A libcxx/include/__fwd/functional.h
R libcxx/include/__fwd/hash.h
M libcxx/include/__thread/id.h
M libcxx/include/__thread/support/pthread.h
M libcxx/include/__type_traits/is_reference_wrapper.h
M libcxx/include/__type_traits/unwrap_ref.h
M libcxx/include/experimental/propagate_const
M libcxx/include/filesystem
M libcxx/include/libcxx.imp
M libcxx/include/module.modulemap.in
M libcxx/include/optional
M libcxx/include/type_traits
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/utils/generate_iwyu_mapping.py
Log Message:
-----------
[libc++] Rename __fwd/hash.h to __fwd/functional.h and add reference_wrapper (#81445)
We forward declare `reference_wrapper` in multiple places already. This
moves the declaration to the canonical place and removes unnecessary
includes of `__functional/reference_wrapper.h`.
Commit: 09b34b998d9d84fa4740c1f2821699250fc318cb
https://github.com/llvm/llvm-project/commit/09b34b998d9d84fa4740c1f2821699250fc318cb
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M .github/workflows/build-ci-container.yml
Log Message:
-----------
[Github] Make CI container build more reliable (#83707)
Commit: 5105f1551b4bc800f564e7c105fc95e2c51f1239
https://github.com/llvm/llvm-project/commit/5105f1551b4bc800f564e7c105fc95e2c51f1239
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 33de5a316caa
Commit: 2435dcd83a32c63aef91c82cb19b08604ba96b64
https://github.com/llvm/llvm-project/commit/2435dcd83a32c63aef91c82cb19b08604ba96b64
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
A llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Add initial pattern match implementation for VPInstruction. (#80563)
Add an initial version of a pattern match for VPValues and recipes,
starting with VPInstruction.
PR: https://github.com/llvm/llvm-project/pull/80563
Commit: 3dd6750027cd168fce5fd9894b0bac0739652cf5
https://github.com/llvm/llvm-project/commit/3dd6750027cd168fce5fd9894b0bac0739652cf5
Author: David Majnemer <david.majnemer at gmail.com>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/ValueTypes.h
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/test/Analysis/CostModel/AArch64/reduce-fadd.ll
M llvm/test/CodeGen/AArch64/GlobalISel/lower-neon-vector-fcmp.mir
M llvm/test/CodeGen/AArch64/implicitly-set-zero-high-64-bits.ll
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
M llvm/test/CodeGen/AArch64/round-fptosi-sat-scalar.ll
M llvm/test/CodeGen/AArch64/vector-fcopysign.ll
Log Message:
-----------
[AArch64] Add more complete support for BF16
We can use a small amount of integer arithmetic to round FP32 to BF16
and extend BF16 to FP32.
While a number of operations still require promotion, this can be
reduced for some rather simple operations like abs, copysign, fneg but
these can be done in a follow-up.
A few neat optimizations are implemented:
- round-inexact-to-odd is used for F64 to BF16 rounding.
- quieting signaling NaNs for f32 -> bf16 tries to detect if a prior
operation makes it unnecessary.
Commit: b29301cd40441b5eb8cef9356429fb081e6b6a72
https://github.com/llvm/llvm-project/commit/b29301cd40441b5eb8cef9356429fb081e6b6a72
Author: Po-yao Chang <poyaoc97 at gmail.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M libcxx/include/__format/parser_std_format_spec.h
M libcxx/test/std/containers/container.adaptors/container.adaptors.format/format.functions.tests.h
M libcxx/test/std/containers/sequences/vector.bool/vector.bool.fmt/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.fmtmap/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.fmtset/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.fmtstr/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.formatter/format.functions.tests.h
M libcxx/test/std/utilities/format/format.tuple/format.functions.tests.h
Log Message:
-----------
[libc++][format] Handle range-underlying-spec (#81914)
An immediate colon signifeis that the range-format-spec contains only
range-underlying-spec.
This patch allows this code to compile and run:
```c++
std::println("{::<<9?}", std::span<const char>{"Hello", sizeof "Hello"});
```
Commit: 5f058aa211995d2f0df2a0e063532832569cb7a8
https://github.com/llvm/llvm-project/commit/5f058aa211995d2f0df2a0e063532832569cb7a8
Author: Lu Weining <luweining at loongson.cn>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-fp.ll
Log Message:
-----------
[LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (#83656)
This patch aims to solve Firefox issue:
https://bugzilla.mozilla.org/show_bug.cgi?id=1882301
Similar to 616289ed2922. Currently LoongArch uses an ll.[wd]/sc.[wd]
loop for ATOMIC_CMP_XCHG. Because the comparison in the loop is
full-width (i.e. the `bne` instruction), we must sign extend the input
comparsion argument.
Note that LoongArch ISA manual V1.1 has introduced compare-and-swap
instructions. We would change the implementation (return `ANY_EXTEND`)
when we support them.
Commit: 8d1046ae49fdf7585f70cfbb35bcfc46725d9b29
https://github.com/llvm/llvm-project/commit/8d1046ae49fdf7585f70cfbb35bcfc46725d9b29
Author: Chen Zheng <czhengsz at cn.ibm.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/PowerPC/insert_extract-inseltpoison.ll
M llvm/test/Analysis/CostModel/PowerPC/insert_extract.ll
Log Message:
-----------
[PowerPC] adjust cost for extract i64 from vector on P9 and above (#82963)
https://godbolt.org/z/Ma347Tx1W
Commit: 61c283db4be0c8ff1832afa754a9a6b45dcf2b06
https://github.com/llvm/llvm-project/commit/61c283db4be0c8ff1832afa754a9a6b45dcf2b06
Author: Yeting Kuo <46629943+yetingk at users.noreply.github.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-compressstore-fp.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-compressstore-int.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-expandload-fp.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-expandload-int.ll
Log Message:
-----------
[ScalarizeMaskedMemIntrin] Use pointer alignment from pointer of masked.compressstore/expandload. (#83519)
Previously we used Align(1) for all scalarized load/stores from
masked.compressstore/expandload.
For targets not supporting unaligned accesses, it make backend need to
split
aligned large width loads/stores to byte loads/stores.
To solve this performance issue, this patch preserves the alignment of
base
pointer after scalarizing.
Commit: 9606655fbb03b1cf1c69d624c7320630e85f33e6
https://github.com/llvm/llvm-project/commit/9606655fbb03b1cf1c69d624c7320630e85f33e6
Author: Matthias Springer <me at m-sp.org>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Transforms/test-legalizer.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[mlir][Transforms] Fix use-after-free when accessing replaced block args (#83646)
This commit fixes a bug in a dialect conversion. Currently, when a block
is replaced via a signature conversion, the block is erased during the
"commit" phase. This is problematic because the block arguments may
still be referenced internal data structures of the dialect conversion
(`mapping`). Blocks should be treated same as ops: they should be erased
during the "cleanup" phase.
Note: The test case fails without this fix when running with ASAN, but
may pass when running without ASAN.
Commit: 2b5cd8be3af43e5aa5b76b6aeb1edd3141b803ca
https://github.com/llvm/llvm-project/commit/2b5cd8be3af43e5aa5b76b6aeb1edd3141b803ca
Author: Fangrui Song <i at maskray.me>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M clang/include/clang/Driver/Driver.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/DragonFly.cpp
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/MipsLinux.cpp
M clang/lib/Driver/ToolChains/OHOS.cpp
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/lib/Driver/ToolChains/ZOS.cpp
Log Message:
-----------
[Driver] Remove InstallDir and getInstalledDir. NFC
Follow-up to #80527.
Commit: ff72c83b017ba636be13750c7f96cd87fc22c465
https://github.com/llvm/llvm-project/commit/ff72c83b017ba636be13750c7f96cd87fc22c465
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrVecCompiler.td
M llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
M llvm/test/CodeGen/X86/bfloat.ll
Log Message:
-----------
[X86] Add missing subvector_subreg_lowering for BF16 (#83720)
Fixes: #83358
Commit: 938ddbf349276c6ded6ef2d65432f41c512a86c6
https://github.com/llvm/llvm-project/commit/938ddbf349276c6ded6ef2d65432f41c512a86c6
Author: Fangrui Song <i at maskray.me>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Darwin.cpp
Log Message:
-----------
[Driver,Darwin] Simplify libc++ include path after #80527. NFC
My #80527 mentioned that `InstalledDir` was weird in the
-canonical-prefixes mode. #70817 was a workaround to find the libc++
include path for a symlinked clang. After #80527, `InstalledDir` was
identical to `Dir` and was subsequently removed, the code change #70817
can be reverted.
Commit: ccc48d45b832def14c8bc1849cf64c805892368d
https://github.com/llvm/llvm-project/commit/ccc48d45b832def14c8bc1849cf64c805892368d
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/test/CodeGen/X86/half-constrained.ll
Log Message:
-----------
[X86][NFC] Replace X32 check prefixes with X86
We try to only use X32 for gnux32 triple tests.
Commit: b0c158bd947c360a4652eb0de3a4794f46deb88b
https://github.com/llvm/llvm-project/commit/b0c158bd947c360a4652eb0de3a4794f46deb88b
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/extendbfsf2.c
M compiler-rt/lib/builtins/fp_extend.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/bfloat-constrained.ll
Log Message:
-----------
[SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (#80056)
This patch adds the support for `STRICT_BF16_TO_FP` and
`STRICT_FP_TO_BF16`.
Commit: e6e53ca8470d719882539359ebe3ad8b442a8cb0
https://github.com/llvm/llvm-project/commit/e6e53ca8470d719882539359ebe3ad8b442a8cb0
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang-tools-extra/clangd/HeuristicResolver.cpp
M clang-tools-extra/clangd/HeuristicResolver.h
M clang-tools-extra/clangd/unittests/FindTargetTests.cpp
Log Message:
-----------
[clangd] [HeuristicResolver] Protect against infinite recursion on DependentNameTypes (#83542)
When resolving names inside templates that implement recursive
compile-time functions (e.g. waldo<N>::type is defined in terms
of waldo<N-1>::type), HeuristicResolver could get into an infinite
recursion, specifically one where resolveDependentNameType() can
be called recursively with the same DependentNameType*.
To guard against this, HeuristicResolver tracks, for each external
call into a HeuristicResolver function, the set of DependentNameTypes
that it has seen, and bails if it sees the same DependentNameType again.
To implement this, a helper class HeuristicResolverImpl is introduced
to store state that persists for the duration of an external call into
HeuristicResolver (but does not persist between such calls).
Fixes https://github.com/clangd/clangd/issues/1951
Commit: 2c5d01c2cfa80fd734b94833bdf7b5b3f6f2ebb0
https://github.com/llvm/llvm-project/commit/2c5d01c2cfa80fd734b94833bdf7b5b3f6f2ebb0
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
R compiler-rt/lib/builtins/extendbfsf2.c
M compiler-rt/lib/builtins/fp_extend.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
R llvm/test/CodeGen/X86/bfloat-constrained.ll
Log Message:
-----------
Revert "[SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (#80056)"
This reverts commit b0c158bd947c360a4652eb0de3a4794f46deb88b.
The changes in `compiler-rt` broke tests.
Commit: 8300f30a9234ee46b2b941e8b07cb7d104c846cb
https://github.com/llvm/llvm-project/commit/8300f30a9234ee46b2b941e8b07cb7d104c846cb
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/extendbfsf2.c
M compiler-rt/lib/builtins/fp_extend.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/bfloat-constrained.ll
Log Message:
-----------
[SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (#80056)
This patch adds the support for `STRICT_BF16_TO_FP` and
`STRICT_FP_TO_BF16`.
Commit: aa6ebf9be124664945f32f2be1167e6453788f40
https://github.com/llvm/llvm-project/commit/aa6ebf9be124664945f32f2be1167e6453788f40
Author: Daniel Martinez <danielpedromartinez at duck.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M openmp/libomptarget/include/Shared/SourceInfo.h
M openmp/libomptarget/include/omptarget.h
M openmp/libomptarget/plugins-nextgen/common/include/RPC.h
Log Message:
-----------
Replace some C headers with C++ ones (#82697)
#81434
Replaced some C headers with C++ ones
Co-authored-by: Daniel Martinez <danielmartinez at cock.li>
Commit: 23bc5b6392c61980d24cc23a61a020f7aaf858bf
https://github.com/llvm/llvm-project/commit/23bc5b6392c61980d24cc23a61a020f7aaf858bf
Author: David Majnemer <david.majnemer at gmail.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Mark bf16 as custom for truncating stores & add a comment
While we don't use SVE2 as a fallback for missing NEON instructions for
BF16, it is confusing to break symmetry with fp16.
While we are here, add a comment explaining how BF16 immediates work.
Commit: 43222bd3091db5403e3320d23a241a534c1eefec
https://github.com/llvm/llvm-project/commit/43222bd3091db5403e3320d23a241a534c1eefec
Author: Michal Paszkowski <michal at paszkowski.org>
Date: 2024-03-03 (Sun, 03 Mar 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.h
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVMetadata.cpp
M llvm/lib/Target/SPIRV/SPIRVMetadata.h
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/test/CodeGen/SPIRV/function/alloca-load-store.ll
M llvm/test/CodeGen/SPIRV/half_no_extension.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-nested-composite-store.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-simple-composite-store.ll
M llvm/test/CodeGen/SPIRV/opaque_pointers.ll
M llvm/test/CodeGen/SPIRV/opencl/basic/get_global_offset.ll
R llvm/test/CodeGen/SPIRV/opencl/metadata/kernel_arg_type_function_metadata.ll
R llvm/test/CodeGen/SPIRV/opencl/metadata/kernel_arg_type_module_metadata.ll
M llvm/test/CodeGen/SPIRV/opencl/vload2.ll
A llvm/test/CodeGen/SPIRV/opencl/vstore2.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVEmitIntrinsics-TargetExtType-arg-no-spv_assign_type.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVEmitIntrinsics-no-divergent-spv_assign_ptr_type.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVEmitIntrinsics-no-duplicate-spv_assign_type.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-kernel-arg-char.ll
A llvm/test/CodeGen/SPIRV/pointers/kernel-argument-builtin-vload-type-discrapency.ll
A llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-type-deduction-mismatch.ll
A llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-type-deduction-no-metadata.ll
A llvm/test/CodeGen/SPIRV/pointers/ptr-argument-byref.ll
A llvm/test/CodeGen/SPIRV/pointers/ptr-argument-byval.ll
A llvm/test/CodeGen/SPIRV/pointers/store-operand-ptr-to-struct.ll
A llvm/test/CodeGen/SPIRV/pointers/two-bitcast-or-param-users.ll
R llvm/test/CodeGen/SPIRV/pointers/two-bitcast-users.ll
M llvm/test/CodeGen/SPIRV/pointers/two-subsequent-bitcasts.ll
M llvm/test/CodeGen/SPIRV/sitofp-with-bool.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpenCL/atomic_cmpxchg.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpenCL/atomic_legacy.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-private-array-initialization.ll
M llvm/test/CodeGen/SPIRV/uitofp-with-bool.ll
Log Message:
-----------
[SPIR-V] Do not use OpenCL metadata for ptr element type resolution (#82678)
This pull request aims to remove any dependency on OpenCL/SPIR-V type
information in LLVM IR metadata. While, using metadata might simplify
and prettify the resulting SPIR-V output (and restore some of the
information missed in the transformation to opaque pointers), the
overall methodology for resolving kernel parameter types is highly
inefficient.
The high-level strategy is to assign kernel parameter types in this order:
1. Resolving the types using builtin function calls as mangled names
must contain type information or by looking up builtin definition in
SPIRVBuiltins.td. Then:
- Assigning the type temporarily using an intrinsic and later setting
the right SPIR-V type in SPIRVGlobalRegistry after IRTranslation
- Inserting a bitcast
2. Defaulting to LLVM IR types (in case of pointers the generic i8*
type or types from byval/byref attributes)
In case of type incompatibility (e.g. parameter defined initially as
sampler_t and later used as image_t) the error will be found early on
before IRTranslation (in the SPIRVEmitIntrinsics pass).
Commit: 354deba10a99136a3204dfa8128e53cd6e9558a7
https://github.com/llvm/llvm-project/commit/354deba10a99136a3204dfa8128e53cd6e9558a7
Author: Matthias Springer <me at m-sp.org>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/MemoryAllocation.cpp
Log Message:
-----------
[flang] Fix use-after-free in `MemoryAllocation.cpp` (#83768)
`AllocaOpConversion` takes an `ArrayRef<Operation *>`, but the
underlying `SmallVector<Operation *>` was dead by the time the pattern
ran.
Commit: a282109411596ef814aefeec735a2965d6aa4573
https://github.com/llvm/llvm-project/commit/a282109411596ef814aefeec735a2965d6aa4573
Author: Matthias Springer <me at m-sp.org>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir][Transforms] Encapsulate dialect conversion options in `ConversionConfig` (#83754)
This commit adds a new `ConversionConfig` struct that allows users to
customize the dialect conversion. This configuration is similar to
`GreedyRewriteConfig` for the greedy pattern rewrite driver.
A few existing options are moved to this objects, simplifying the
dialect conversion API.
This is a re-upload of #82250. The Windows build breakage was fixed in #83768.
This reverts commit 60fbd6050107875956960c3ce35cf94b202d8675.
Commit: 3a146d5720fb9857cebc17fbc2d42fb589647680
https://github.com/llvm/llvm-project/commit/3a146d5720fb9857cebc17fbc2d42fb589647680
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
A llvm/test/tools/llvm-mca/AMDGPU/gfx940-mfma.s
Log Message:
-----------
AMDGPU: Partially re-add scheduling test for gfx940
31295bbe83c3ea9d8a3372efe34342a299d1018a reverted the original patch.
Submit part of the test that happens to not hit the sanitizer error,
which covers the instructions I more need test coverage for.
Commit: 8715f256911786520bb727ce067098d7082ac45c
https://github.com/llvm/llvm-project/commit/8715f256911786520bb727ce067098d7082ac45c
Author: Exile <2094247798 at qq.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/CheckerDocumentation.cpp
Log Message:
-----------
[clang][StaticAnalyzer] fix function evalCall() typo in CheckerDocumentation (#83677)
```bool evalCall(const CallEvent &Call, CheckerContext &C)``` is corret form.
Co-authored-by: miaozhiyuan <miaozhiyuan at feysh.com>
Commit: 63725ab1196ac50509ad382fc12c56f6d8b5d874
https://github.com/llvm/llvm-project/commit/63725ab1196ac50509ad382fc12c56f6d8b5d874
Author: Luke Lau <luke at igalia.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/rvv/pr83017.ll
Log Message:
-----------
[RISCV] Add test for aliasing miscompile fixed by #83017. NFC
Previously we incorrectly removed the scalar load store pair here assuming it
was dead, when it actually aliased with the memset. This showed up as a
miscompile on SPEC CPU 2017 when compiling with -mrvv-vector-bits, and was only
triggered by the changes in #75531. This was fixed in #83017, but this patch
adds a test case for this specific miscompile.
For reference, the incorrect codegen was:
vsetvli a1, zero, e8, m4, ta, ma
vmv.v.i v8, 0
vs4r.v v8, (a0)
addi a1, a0, 80
vsetivli zero, 16, e8, m1, ta, ma
vmv.v.i v8, 0
vs1r.v v8, (a1)
addi a0, a0, 64
vs1r.v v8, (a0)
Commit: c7fdd8c11e54585dc9d15d63de9742067e0506b9
https://github.com/llvm/llvm-project/commit/c7fdd8c11e54585dc9d15d63de9742067e0506b9
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/include/llvm/ADT/GenericConvergenceVerifier.h
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
A llvm/include/llvm/CodeGen/MachineConvergenceVerifier.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/GenericConvergenceVerifierImpl.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/Target.td
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/CMakeLists.txt
A llvm/lib/CodeGen/MachineConvergenceVerifier.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/IR/ConvergenceVerifier.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
A llvm/test/CodeGen/AMDGPU/convergence-tokens.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr_constant_to_sgpr.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/PowerPC/fmf-propagation.ll
A llvm/test/MachineVerifier/convergencectrl/AMDGPU/basic.mir
A llvm/test/MachineVerifier/convergencectrl/AMDGPU/cycles.mir
A llvm/test/MachineVerifier/convergencectrl/AMDGPU/lit.local.cfg
A llvm/test/MachineVerifier/convergencectrl/AMDGPU/mixed2.mir
A llvm/test/MachineVerifier/convergencectrl/AMDGPU/region-nesting.mir
M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-imms.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-intrinsics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-patfrag-root.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-variadics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
Log Message:
-----------
Restore "Implement convergence control in MIR using SelectionDAG (#71785)"
Original commit 79889734b940356ab3381423c93ae06f22e772c9.
Perviously reverted in commit a2afcd5721869d1d03c8146bae3885b3385ba15e.
LLVM function calls carry convergence control tokens as operand bundles, where
the tokens themselves are produced by convergence control intrinsics. This patch
implements convergence control tokens in MIR as follows:
1. Introduce target-independent ISD opcodes and MIR opcodes for convergence
control intrinsics.
2. Model token values as untyped virtual registers in MIR.
The change also introduces an additional ISD opcode CONVERGENCECTRL_GLUE and a
corresponding machine opcode with the same spelling. This glues the convergence
control token to SDNodes that represent calls to intrinsics. The glued token is
later translated to an implicit argument in the MIR.
The lowering of calls to user-defined functions is target-specific. On AMDGPU,
the convergence control operand bundle at a non-intrinsic call is translated to
an explicit argument to the SI_CALL_ISEL instruction. Post-selection adjustment
converts this explicit argument to an implicit argument on the SI_CALL
instruction.
Commit: 3d14e85578ab4f91bfe74497c69ad5dec3007621
https://github.com/llvm/llvm-project/commit/3d14e85578ab4f91bfe74497c69ad5dec3007621
Author: Ben Shi <2283975856 at qq.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Target/AVR/AVRInstrInfo.td
M llvm/lib/Target/AVR/AVRRegisterInfo.td
Log Message:
-----------
[AVR][NFC] Reformat target description files (#83755)
Commit: a015f591766e4e3a3a23bbab7ca5dfec8f8deb18
https://github.com/llvm/llvm-project/commit/a015f591766e4e3a3a23bbab7ca5dfec8f8deb18
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M flang/test/Fir/memory-allocation-opt.fir
Log Message:
-----------
[flang] disable memory-allocation-opt.fir test on windows (#83535)
It is randomly failing in windows pre-merge checks and causing noise in
Github PRs.
Not clear why it is crashing on windows, issue opened:
https://github.com/llvm/llvm-project/issues/83534
Commit: 408d4e131ef7b30c3bc419f5219f7ca20ca9ac1d
https://github.com/llvm/llvm-project/commit/408d4e131ef7b30c3bc419f5219f7ca20ca9ac1d
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M flang/include/flang/Optimizer/CodeGen/CodeGen.h
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
Log Message:
-----------
[flang][NFC] Expose FIR to LLVM patterns (#83492)
The FIR dialect has been initiated before many interfaces have been
introduced to MLIR. This patch expose the FIR to LLVM patterns in a
`populateFIRToLLVMConversionPatterns` function. The idea is to be able
to add the `ConvertToLLVMPatternInterface`. This is not directly
possible since the FIR dialect does not currently use the table
infrastructure for its definition.
Follow up patches will move the FIR dialect definition to table gen and
then implement the interface.
Commit: 96b2c3bde72ec6b681b03370f9650cfd03e66753
https://github.com/llvm/llvm-project/commit/96b2c3bde72ec6b681b03370f9650cfd03e66753
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
A llvm/test/MC/X86/apx/long-instruction-err.s
Log Message:
-----------
[X86][MC] Report error when the instruction length exceeds 15 bytes (#83708)
The instruction-size limit of 15 bytes still applies to APX
instructions.
Note that it is possible for an EVEX-encoded legacy instruction to reach
the 15-byte instruction length limit: 4
bytes of EVEX prefix + 1 byte of opcode + 1 byte of ModRM + 1 byte of
SIB + 4 bytes of displacement + 4 bytes of immediate = 15 bytes in
total, e.g.
```
addq $184, -96, %rax # encoding:
[0x62,0xf4,0xfc,0x18,0x81,0x04,0x25,0xa0,0xff,0xff,0xff,0xb8,0x00,0x00,0x00]
```
If we added a segment prefix like fs, the length would be 16.
In such a case, no additional (ASIZE or segment override) prefix can be
used.
To help users find this issue earlier, especially for assembler users,
we change
the internal compiler error to error in this patch.
Diagnostic is aligned with GAS
https://sourceware.org/bugzilla/show_bug.cgi?id=31323
Commit: 7af4e8bcc354d2bd7e46ecf547172b1f19ddde3e
https://github.com/llvm/llvm-project/commit/7af4e8bcc354d2bd7e46ecf547172b1f19ddde3e
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/test/Analysis/analyzer-config.c
Log Message:
-----------
[clang][analyzer] Change default value of checker option in unix.StdCLibraryFunctions. (#80457)
Default value of checker option `ModelPOSIX` is changed to `true`.
Documentation is updated.
Commit: db76af28f600a2607152096cf623560705f0215f
https://github.com/llvm/llvm-project/commit/db76af28f600a2607152096cf623560705f0215f
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M mlir/lib/Query/Query.cpp
Log Message:
-----------
[mlir-query] Fix ambiguous overload
gcc7 fix didn't work (but unfortunately didn't get a notification and
forgot to check), this should hopefully address the ambiguous overload.
I can't repro locally/trying to create docker image for testing.
Commit: da5966e0c102f03ab853b906377814675db3623c
https://github.com/llvm/llvm-project/commit/da5966e0c102f03ab853b906377814675db3623c
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/test/Analysis/analyzer-config.c
Log Message:
-----------
Revert "[clang][analyzer] Change default value of checker option in unix.StdCLibraryFunctions. (#80457)"
This reverts commit 7af4e8bcc354d2bd7e46ecf547172b1f19ddde3e.
Commit: aaf5c818b3b84a49f0c14879c141c7770f0fcf4b
https://github.com/llvm/llvm-project/commit/aaf5c818b3b84a49f0c14879c141c7770f0fcf4b
Author: Matthias Springer <me at m-sp.org>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms][NFC] Simplify `BlockTypeConversionRewrite` (#83286)
When a block signature is converted during dialect conversion, a
`BlockTypeConversionRewrite` object is stored in the stack of rewrites.
Such an object represents multiple steps:
- Splitting the old block, i.e., creating a new block and moving all
operations over.
- Rewriting block arguments.
- Erasing the old block.
We have dedicated `IRRewrite` objects that represent "creating a block",
"moving an op" and "erasing a block". This commit reuses those rewrite
objects, so that there is less work to do in
`BlockTypeConversionRewrite::rollback` and
`BlockTypeConversionRewrite::commit`/`cleanup`.
Note: This change is in preparation of adding listener support to the
dialect conversion. The less work is done in a `commit` function, the
fewer notifications will have to be sent.
Commit: 71c2a132b2713c568ef41b0d18f92c4fa8ee73a6
https://github.com/llvm/llvm-project/commit/71c2a132b2713c568ef41b0d18f92c4fa8ee73a6
Author: sinan <sinan.lin at linux.alibaba.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/unittests/Core/BinaryContext.cpp
Log Message:
-----------
[BOLT] support AArch64 JUMP26 createRelocation (#83531)
Add R_AARCH64_JUMP26 implementation for createRelocation, which
could significantly reduce the number of failed scan-refs cases if we
perform bolt on a selective range of functions.
Commit: 310a278812319a7cae86239c975738019b5d90a3
https://github.com/llvm/llvm-project/commit/310a278812319a7cae86239c975738019b5d90a3
Author: Matthias Springer <me at m-sp.org>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms][NFC] Simplify handling of erased IR (#83423)
The dialect conversion uses a `SingleEraseRewriter` to ensure that an
op/block is not erased twice. This can happen during the "commit" phase
when an unresolved materialization is inserted into a block and the
enclosing op is erased by the user. In that case, the unresolved
materialization should not be erased a second time later in the "commit"
phase.
This problem cannot happen during "rollback", so ops/block can be erased
directly without using the rewriter. With this change, the
`SingleEraseRewriter` is used only during "commit"/"cleanup". At that
point, the dialect conversion is guaranteed to succeed and no rollback
can happen. Therefore, it is not necessary to store the number of erased
IR objects (because we will never "reset" the rewriter to previous a
previous state).
Commit: c6565f22bedc5074dd2b47f62ea6569ca9906c94
https://github.com/llvm/llvm-project/commit/c6565f22bedc5074dd2b47f62ea6569ca9906c94
Author: Ingo Müller <ingomueller at google.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Remove defines of obsolete MLIR_GPU_TO_CUBIN_PASS_ENABLE. (#83006)
This macro is obsolete since the landing of #82486 but was forgotten to
be removed from the BUILD files.
Commit: 5dc9e87c8cae7842edcaa4dd01308873109208da
https://github.com/llvm/llvm-project/commit/5dc9e87c8cae7842edcaa4dd01308873109208da
Author: NagyDonat <donat.nagy at ericsson.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/ArrayBoundCheckerV2.cpp
Log Message:
-----------
[analyzer] Improve some comments in ArrayBoundCheckerV2 (NFC) (#83545)
This comment-only change fixes a typo, clarifies some comments and
includes some thoughts about the difficulties in resolving a certain
FIXME.
Commit: ded5de11faca916e0434df2e43653559d564c2df
https://github.com/llvm/llvm-project/commit/ded5de11faca916e0434df2e43653559d564c2df
Author: Dani <daniel.kiss at arm.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/include/llvm/IR/AutoUpgrade.h
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/test/LTO/AArch64/link-branch-target-enforcement.ll
A llvm/test/LTO/AArch64/link-sign-return-address.ll
M llvm/test/Linker/link-arm-and-thumb.ll
Log Message:
-----------
[llvm][AArch64] Autoupgrade function attributes from Module attributes. (#82763)
sign-return-address and similar module attributes should be propagated to
the function level before got merged because module flags may contradict and
this information is not recoverable.
Generated code will match with the normal linking flow.
Refactored version of (#80640).
Run the attribute copy only during IRMove.
Commit: f7d4236adf8e0865e734216626c378345f673ca5
https://github.com/llvm/llvm-project/commit/f7d4236adf8e0865e734216626c378345f673ca5
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M libc/src/__support/FPUtil/ManipulationFunctions.h
M libc/src/__support/FPUtil/NormalFloat.h
M libc/src/__support/FPUtil/generic/sqrt.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
M libc/src/__support/FPUtil/x86_64/sqrt.h
M libc/src/__support/float_to_string.h
M libc/src/__support/macros/properties/types.h
M libc/src/__support/str_to_float.h
M libc/test/src/__support/FPUtil/fpbits_test.cpp
M libc/test/src/__support/str_to_long_double_test.cpp
M libc/test/src/math/smoke/nanl_test.cpp
M libc/test/src/stdio/sprintf_test.cpp
M libc/test/src/stdio/sscanf_test.cpp
M libc/test/src/stdlib/strtold_test.cpp
Log Message:
-----------
[libc][NFC] Rename `LIBC_LONG_DOUBLE_IS_` macros (#83399)
Umbrella bug #83182
Commit: 982e9022ca4abaad58c693d2b0aba0e908ee2d39
https://github.com/llvm/llvm-project/commit/982e9022ca4abaad58c693d2b0aba0e908ee2d39
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
Log Message:
-----------
[AMDGPU] Add GFX12 memory legalizer tests (#83814)
Commit: cad6ad2759a782c48193f83886488dacc9f330e3
https://github.com/llvm/llvm-project/commit/cad6ad2759a782c48193f83886488dacc9f330e3
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/test/Transforms/Inline/X86/call-abi-compatibility.ll
Log Message:
-----------
[Inline] Add test for #67054 (NFC)
Commit: 540d255167742b6464a01f052d31c704fc4dd5aa
https://github.com/llvm/llvm-project/commit/540d255167742b6464a01f052d31c704fc4dd5aa
Author: Vyacheslav Levytskyy <89994100+VyacheslavLevytskyy at users.noreply.github.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
A llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/add.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/and.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fadd.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmax.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmaximum.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmin.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fminimum.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmul.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/mul.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/or.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/smax.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/smin.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/umax.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/umin.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/xor.ll
Log Message:
-----------
[SPIRV] Add vector reduction instructions (#82786)
This PR is to add vector reduction instructions according to
https://llvm.org/docs/GlobalISel/GenericOpcode.html#vector-reduction-operations
and widen in such a way a range of successful supported conversions,
covering new cases of vector reduction instructions which IRTranslator
is unable to resolve.
By legalizing vector reduction instructions we introduce a new
instruction patterns that should be addressed, including patterns that
are delegated to pre-legalize step. To address this problem, a new pass
is added that is to bring newly generated instructions after
legalization to an aspect required by instruction selection.
Expected overheads for existing cases is minimal, because a new pass is
working only with newly introduced instructions, otherwise it's just a
additional code traverse without any actions.
Commit: ecc3bdaae14a02acc879c018e21d58a83329dc6e
https://github.com/llvm/llvm-project/commit/ecc3bdaae14a02acc879c018e21d58a83329dc6e
Author: Vyacheslav Levytskyy <89994100+VyacheslavLevytskyy at users.noreply.github.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
A llvm/test/CodeGen/SPIRV/bitcast.ll
Log Message:
-----------
[SPIR-V] Fix bitcast legalization/instruction selection in SPIR-V Backend (#83139)
This PR is to fix a way how SPIR-V Backend describes legality of
OpBitcast instruction and how it is validated on a step of instruction
selection. Instead of checking a size of virtual registers (that makes
no sense due to lack of guarantee of direct relations between size of
virtual register and bit width associated with the type size), this PR
allows to legalize OpBitcast without size check and postpones validation
to the instruction selection step.
As an example, let's consider the next example that was copied as is
from a bigger test suite:
```
%355:id(s16) = G_BITCAST %301:id(s32)
%303:id(s16) = ASSIGN_TYPE %355:id(s16), %349:type(s32)
%644:fid(s32) = G_FMUL %645:fid, %646:fid
%301:id(s32) = ASSIGN_TYPE %644:fid(s32), %40:type(s32)
```
Without the PR this leads to a crash with complains to an illegal
bitcast, because %355 is s16 and %301 is s32. However, we must check not
virtual registers in this case, but types of %355 and %301, i.e.,
%349:type(s32) and %40:type(s32), which are perfectly well compatible in
a sense of OpBitcast in this case.
In a test case that is a part of this PR OpBitcast is legal, being
applied for `OpTypeInt 16` and `OpTypeFloat 16`, but would not be
legalized without this PR due to virtual registers defined as having
size 16 and 32.
Commit: 67d5ba907789a187165b96d7862e3c67efdd7ac1
https://github.com/llvm/llvm-project/commit/67d5ba907789a187165b96d7862e3c67efdd7ac1
Author: Vyacheslav Levytskyy <89994100+VyacheslavLevytskyy at users.noreply.github.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/test/CodeGen/SPIRV/exec_mode_float_control_khr.ll
Log Message:
-----------
[SPIR-V] Add support for SPV_KHR_float_controls (#83418)
This PR is to add explicit support for SPV_KHR_float_controls
(https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/KHR/SPV_KHR_float_controls.asciidoc).
This extension is included into SPIR-V after version 1.4, but in case of
lower versions it is to be included explicitly and OpExtension must be
present in the module with `OpExtension "SPV_KHR_float_controls"`.
This PR fixes this issue and fixes the test case
test/CodeGen/SPIRV/exec_mode_float_control_khr.ll to account for a
version lower than 1.4.
Commit: 5c54f729018cb04b3cd42fcbef019f3479c9f9e8
https://github.com/llvm/llvm-project/commit/5c54f729018cb04b3cd42fcbef019f3479c9f9e8
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/openmp-firstprivate.mlir
Log Message:
-----------
[MLIR][OpenMP] Extend omp.private materialization support: `firstprivate` (#82164)
Extends current support for delayed privatization during translation to
LLVM IR. This adds support for one-block `firstprivate` `omp.private`
ops.
Commit: eaf0d82529f30fd53b453886676821d67ccfe9af
https://github.com/llvm/llvm-project/commit/eaf0d82529f30fd53b453886676821d67ccfe9af
Author: Niwin Anto <niwinantop at gmail.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/test/Transforms/LoopVectorize/no-fold-tail-by-masking-iv-external-uses.ll
Log Message:
-----------
[LV] Disable fold tail by masking when IV is used outside (#81609)
When induction variable are used outside the loop body, tail folding
by masking mis-compiles, because for users outside of the loop the
final value of the induction is computed separately from the vector
loop.
Fixes https://github.com/llvm/llvm-project/issues/76069
Fixes https://github.com/llvm/llvm-project/issues/51677
Commit: 8f30b62395ff9a41fd66ef0f3a98bceffa0bf121
https://github.com/llvm/llvm-project/commit/8f30b62395ff9a41fd66ef0f3a98bceffa0bf121
Author: Vyacheslav Levytskyy <89994100+VyacheslavLevytskyy at users.noreply.github.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv-negative1.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv-negative2.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv-negative3.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv-negative4.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv.ll
Log Message:
-----------
[SPIR-V] Add support for the SPIR-V extension SPV_INTEL_bfloat16_conversion (#83443)
This PR is to add support for the SPIR-V extension
SPV_INTEL_bfloat16_conversion
(https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_bfloat16_conversion.asciidoc)
and OpenCL extension cl_intel_bfloat16_conversions
(https://registry.khronos.org/OpenCL/extensions/intel/cl_intel_bfloat16_conversions.html).
Commit: 00e4a4197137410129d4725ffb82bae9ce44bdde
https://github.com/llvm/llvm-project/commit/00e4a4197137410129d4725ffb82bae9ce44bdde
Author: James Westwood <james.westwood at arm.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMSubtarget.h
M llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
A llvm/test/CodeGen/Thumb2/pacbti-m-frame-chain.ll
Log Message:
-----------
[ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (#82801)
When code for M class architecture was compiled with AAPCS and PAC
enabled, the frame pointer, r11, was not pushed to the stack adjacent to
the link register. Due to PAC being enabled, r12 was placed between r11
and lr. This patch fixes this by adding an extra case to the already
existing code that splits the GPR push in two when R11 is the frame
pointer and certain paremeters are met. The differential revision for
this previous change can be found here:
https://reviews.llvm.org/D125649. This now ensures that r11 and lr are
pushed in a separate push instruction to the other GPRs when PAC and
AAPCS are enabled, meaning the frame pointer and link register are now
pushed onto the stack adjacent to each other.
Commit: 7d55a3ba92368be55b392c20d623fde6ac82d86d
https://github.com/llvm/llvm-project/commit/7d55a3ba92368be55b392c20d623fde6ac82d86d
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang/docs/conf.py
M flang/docs/conf.py
M llvm/docs/conf.py
Log Message:
-----------
[Docs] Allow building man pages without myst_parser (#82402)
The man pages do not depend on the doc present in markdown files, so
they can be built without myst_parser.
Doing so might allow llvm distributions to have less development
dependencies.
As we do not have the ennvironment to test these configuration, this
capability is provided on a best-effort basis.
This restores a capability accidentally lost in #65664.
Commit: c089fa5a729e217d0c0d4647656386dac1a1b135
https://github.com/llvm/llvm-project/commit/c089fa5a729e217d0c0d4647656386dac1a1b135
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.h
M clang/test/AST/Interp/arrays.cpp
Log Message:
-----------
[clang][Interp] Fix assertion in InitElem{,Pop} ops
... when the pointer is an unknown size array.
Commit: e4882d83d77f9d6a5198ecb7faabd5bf2ce4b730
https://github.com/llvm/llvm-project/commit/e4882d83d77f9d6a5198ecb7faabd5bf2ce4b730
Author: Sirraide <aeternalmail at gmail.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/Decl.cpp
A clang/test/Layout/dump-complete-invalid.cpp
M clang/test/Layout/dump-complete.cpp
Log Message:
-----------
[Clang] [Sema] Do not crash on dependent or invalid record decls when `-fdump-record-layouts-complete` is passed (#83688)
We no longer try to compute and dump the layout of types in cases where that isn’t possible.
This fixes #83684 and #83671.
Commit: 906580bad3a68e3877f4ff7ac2b7fc1b7ee84fd5
https://github.com/llvm/llvm-project/commit/906580bad3a68e3877f4ff7ac2b7fc1b7ee84fd5
Author: Qiu Chaofan <qiucofan at cn.ibm.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-rotate.c
M llvm/include/llvm/IR/IntrinsicsPowerPC.td
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/rldimi.ll
M llvm/test/CodeGen/PowerPC/rlwimi.ll
M llvm/test/CodeGen/PowerPC/rlwinm.ll
Log Message:
-----------
[PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (#82968)
These builtins are already there in Clang, however current codegen may
produce suboptimal results due to their complex behavior. Implement them
as intrinsics to ensure expected instructions are emitted.
Commit: 6b62a9135a28bd001263e5a9db08d4cff1123126
https://github.com/llvm/llvm-project/commit/6b62a9135a28bd001263e5a9db08d4cff1123126
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/Transforms/Utils/Local.h
M llvm/lib/IR/Instructions.cpp
M llvm/lib/Transforms/CFGuard/CFGuard.cpp
M llvm/lib/Transforms/Scalar/Reg2Mem.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/lib/Transforms/Utils/CanonicalizeFreezeInLoops.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/DemoteRegToStack.cpp
M llvm/lib/Transforms/Utils/EntryExitInstrumenter.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopConstrainer.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/LoopSimplify.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
M llvm/lib/Transforms/Utils/LowerGlobalDtors.cpp
M llvm/lib/Transforms/Utils/LowerInvoke.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Utils/LowerSwitch.cpp
M llvm/lib/Transforms/Utils/MatrixUtils.cpp
M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
M llvm/lib/Transforms/Utils/StripGCRelocates.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/tools/bugpoint/Miscompilation.cpp
M llvm/unittests/IR/InstructionsTest.cpp
Log Message:
-----------
[RemoveDIs] Reapply 3fda50d3915, insert instructions using iterators
I'd reverted this in 6c7805d5d1 after a bad stage. Original commit
messsage follows:
[NFC][RemoveDIs] Bulk update utilities to insert with iterators
As part of the RemoveDIs project we need LLVM to insert instructions using
iterators wherever possible, so that the iterators can carry a bit of
debug-info. This commit implements some of that by updating the contents of
llvm/lib/Transforms/Utils to always use iterator-versions of instruction
constructors.
There are two general flavours of update:
* Almost all call-sites just call getIterator on an instruction
* Several make use of an existing iterator (scenarios where the code is
actually significant for debug-info)
The underlying logic is that any call to getFirstInsertionPt or similar
APIs that identify the start of a block need to have that iterator passed
directly to the insertion function, without being converted to a bare
Instruction pointer along the way.
I've also switched DemotePHIToStack to take an optional iterator: it needs
to take an iterator, and having a no-insert-location behaviour appears to
be important. The constructors for ICmpInst and FCmpInst have been updated
too. They're the only instructions that take block _references_ rather than
pointers for certain calls, and a future patch is going to make use of
default-null block insertion locations.
All of this should be NFC.
Commit: 6e36cebc17417f88e70b4e87c9f177036b1443f4
https://github.com/llvm/llvm-project/commit/6e36cebc17417f88e70b4e87c9f177036b1443f4
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/docs/conf.py
A clang/docs/ghlinks.py
Log Message:
-----------
[Clang][Docs] Simpler syntax for Github links. (#82746)
Github links in release notes are often invalid rST, clutter the release
notes and are annoying to write.
This introduces a sphynx plugin that rewrites
`#GH<NUMBER>` to a link to the corresponding issue.
Commit: 530f0e64ec11327879c44f2fd55c7c28efdbaa2d
https://github.com/llvm/llvm-project/commit/530f0e64ec11327879c44f2fd55c7c28efdbaa2d
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/inline-constraints.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
Log Message:
-----------
[AMDGPU] Replace `isInlinableLiteral16` with specific version (#81345)
Commit: 46d7876957deb817b48a5fa8a854b5a47a6a0653
https://github.com/llvm/llvm-project/commit/46d7876957deb817b48a5fa8a854b5a47a6a0653
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/examples/BrainF/BrainF.cpp
M llvm/examples/Fibonacci/fibonacci.cpp
Log Message:
-----------
Follow up to 6b62a9135a2, fix llvm-examples build
This is due to the {I,F}CmpInst constructor being normalised to take a
pointer to a block rather than a reference (unlike any other Instruction).
Commit: d9ae4a63ca875f3569e7a0b41bcc7352e3133e34
https://github.com/llvm/llvm-project/commit/d9ae4a63ca875f3569e7a0b41bcc7352e3133e34
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M libc/src/__support/FPUtil/dyadic_float.h
Log Message:
-----------
[libc][NFC] Fix typo in dyadic_float.h (#83846)
Commit: 27ce5121ee875c337dd0f977b00afcb756977f62
https://github.com/llvm/llvm-project/commit/27ce5121ee875c337dd0f977b00afcb756977f62
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
Log Message:
-----------
[AMDGPU] Fix setting nontemporal in memory legalizer (#83815)
Iterator MI can advance in insertWait() but we need original instruction
to set temporal hint. Just move it before handling volatile.
Commit: b3c2c5a834b32fad1f24aad074d1b4cf719f69f5
https://github.com/llvm/llvm-project/commit/b3c2c5a834b32fad1f24aad074d1b4cf719f69f5
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/DebugInfo/print-non-instruction-debug-info.ll
Log Message:
-----------
[RemoveDIs][DebugInfo] Verifier and printing fixes for DPLabel (#83242)
`DPLabel`, the RemoveDI version of `llvm.dbg.label`, was landed recently
at the same time the RemoveDIs IR printing and verifier patches were
landing. The patches were updated to not miscompile, but did not have
full-featured and correct support for DPLabel built in; this patch makes
the remaining set of changes to enable DPLabel support.
Commit: 1e429ff1439e0b26f4299faa8a29ed1947743fa3
https://github.com/llvm/llvm-project/commit/1e429ff1439e0b26f4299faa8a29ed1947743fa3
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[Clang][Docs] Fix issue number
Fix typo introduced by 6e36cebc17417f88e70b4e87c9f177036b1443f4
Commit: c1d8d0aa156f651ee48414fa002e9608d6998763
https://github.com/llvm/llvm-project/commit/c1d8d0aa156f651ee48414fa002e9608d6998763
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Scope.h
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/Scope.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/CXX/temp/temp.res/temp.local/p6.cpp
Log Message:
-----------
Reapply "[Clang][Sema] Diagnose function/variable templates that shadow their own template parameters (#78274)" (#79683)
Reapplies #78274 with the addition of a default-error warning
(`strict-primary-template-shadow`) that is issued for instances of
shadowing which were previously accepted prior to this patch.
I couldn't find an established convention for naming diagnostics related
to compatibility with previous versions of clang, so I just used the
prefix `ext_compat_`.
Commit: bbeb946652f2830b3211dcd8c6836bce4dbdd188
https://github.com/llvm/llvm-project/commit/bbeb946652f2830b3211dcd8c6836bce4dbdd188
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/test/Analysis/analyzer-config.c
M clang/test/Analysis/std-c-library-functions.c
Log Message:
-----------
[clang][analyzer] Change value of checker option in unix.StdCLibraryFunctions (second try). (#80457)
Default value of checker option `ModelPOSIX` is changed to `true`.
Documentation is updated.
This is a re-apply of commit 7af4e8bcc354d2bd7e46ecf547172b1f19ddde3e
that was reverted because a test failure (this is fixed now).
Commit: 52a460f9d4640ddc04e65161c78958bdabaae2b2
https://github.com/llvm/llvm-project/commit/52a460f9d4640ddc04e65161c78958bdabaae2b2
Author: NagyDonat <donat.nagy at ericsson.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallDescription.h
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/GenericTaintChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Core/CallDescription.cpp
M clang/unittests/StaticAnalyzer/CallDescriptionTest.cpp
Log Message:
-----------
[analyzer] Refactor CallDescription match mode (NFC) (#83432)
The class `CallDescription` is used to define patterns that are used for
matching `CallEvent`s. For example, a
`CallDescription{{"std", "find_if"}, 3}`
matches a call to `std::find_if` with 3 arguments.
However, these patterns are somewhat fuzzy, so this pattern could also
match something like `std::__1::find_if` (with an additional namespace
layer), or, unfortunately, a `CallDescription` for the well-known
function `free()` can match a C++ method named `free()`:
https://github.com/llvm/llvm-project/issues/81597
To prevent this kind of ambiguity this commit introduces the enum
`CallDescription::Mode` which can limit the pattern matching to
non-method function calls (or method calls etc.). After this NFC change,
one or more follow-up commits will apply the right pattern matching
modes in the ~30 checkers that use `CallDescription`s.
Note that `CallDescription` previously had a `Flags` field which had
only two supported values:
- `CDF_None` was the default "match anything" mode,
- `CDF_MaybeBuiltin` was a "match only C library functions and accept
some inexact matches" mode.
This commit preserves `CDF_MaybeBuiltin` under the more descriptive
name `CallDescription::Mode::CLibrary` (or `CDM::CLibrary`).
Instead of this "Flags" model I'm switching to a plain enumeration
becasue I don't think that there is a natural usecase to combine the
different matching modes. (Except for the default "match anything" mode,
which is currently kept for compatibility, but will be phased out in the
follow-up commits.)
Commit: 07f8efa22e0d0254e4d6c696f07256bfe514038e
https://github.com/llvm/llvm-project/commit/07f8efa22e0d0254e4d6c696f07256bfe514038e
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M libc/include/llvm-libc-types/float128.h
M libc/src/__support/macros/properties/types.h
Log Message:
-----------
[libc][NFC] Don't expose how `float16` and `float128` types are provided (#83818)
Umbrella bug #83182
Commit: c54064de80e93494d1d44550b56ce8f2f3cf9c4b
https://github.com/llvm/llvm-project/commit/c54064de80e93494d1d44550b56ce8f2f3cf9c4b
Author: Pranav Bhandarkar <pranav.bhandarkar at amd.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
Log Message:
-----------
[mlir][OpenMP][NFC] - Minor fix in OpenMP ops documentation (#83598)
This patch is a minor formatting fix in the OpenMP ops documentation
wherein the examples section in ``omp.private`` was breaking out into a
top level list item.
Commit: f407f2df2ced195264d1a81df84143dc87c0cd24
https://github.com/llvm/llvm-project/commit/f407f2df2ced195264d1a81df84143dc87c0cd24
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/test/tools/llvm-mca/AMDGPU/gfx940-mfma.s
Log Message:
-----------
AMDGPU: Test a few more cycle counts for mfma ops
Commit: 13a78fd1ac886b3119574bbffb327489f335e713
https://github.com/llvm/llvm-project/commit/13a78fd1ac886b3119574bbffb327489f335e713
Author: Tuan Chuong Goh <chuong.goh at arm.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir
M llvm/test/CodeGen/AArch64/shufflevector.ll
Log Message:
-----------
[AArch64][GlobalISel] Re-commit Legalize G_SHUFFLE_VECTOR for Odd-Sized Vectors (#83038)
Legalize smaller/larger than legal vectors with i8 and i16 element sizes.
Vectors with elements smaller than i8 will get widened to i8 elements.
Commit: 89827863a3a65947e1665b436ca8dd1fbdb042fb
https://github.com/llvm/llvm-project/commit/89827863a3a65947e1665b436ca8dd1fbdb042fb
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Make canVectorizeLoads member of BoUpSLP class, NFC.
Commit: d0521484c854adf082936824c99f9db101363cb8
https://github.com/llvm/llvm-project/commit/d0521484c854adf082936824c99f9db101363cb8
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M libcxx/utils/libcxx/test/format.py
Log Message:
-----------
[libc++] Remove leftover .fail.cpp matcher in Lit test format (#83583)
This should have been removed in 8dcb8ea75cef, which removed support for
.fail.cpp tests in the libc++ test suite.
Commit: f010b1bef4dda2c7082cbb41dbabf1f149cce306
https://github.com/llvm/llvm-project/commit/f010b1bef4dda2c7082cbb41dbabf1f149cce306
Author: Mitch Phillips <mitchp at google.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/include/llvm/ADT/GenericConvergenceVerifier.h
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
R llvm/include/llvm/CodeGen/MachineConvergenceVerifier.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/GenericConvergenceVerifierImpl.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/Target.td
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/CMakeLists.txt
R llvm/lib/CodeGen/MachineConvergenceVerifier.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/IR/ConvergenceVerifier.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
R llvm/test/CodeGen/AMDGPU/convergence-tokens.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr_constant_to_sgpr.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/PowerPC/fmf-propagation.ll
R llvm/test/MachineVerifier/convergencectrl/AMDGPU/basic.mir
R llvm/test/MachineVerifier/convergencectrl/AMDGPU/cycles.mir
R llvm/test/MachineVerifier/convergencectrl/AMDGPU/lit.local.cfg
R llvm/test/MachineVerifier/convergencectrl/AMDGPU/mixed2.mir
R llvm/test/MachineVerifier/convergencectrl/AMDGPU/region-nesting.mir
M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-imms.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-intrinsics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-patfrag-root.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-variadics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
Log Message:
-----------
Revert "Restore "Implement convergence control in MIR using SelectionDAG (#71785)""
This reverts commit c7fdd8c11e54585dc9d15d63de9742067e0506b9.
Reason: Broke the sanitizer buildbots. See the comments at
https://github.com/llvm/llvm-project/pull/71785
for more information.
Commit: 89e41e2965b2b38a4aa1ad7757684566679ef762
https://github.com/llvm/llvm-project/commit/89e41e2965b2b38a4aa1ad7757684566679ef762
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/test/AST/Interp/complex.cpp
Log Message:
-----------
[clang][Interp] Implement __builtin_complex
Commit: 03f852f704c343abc4a36db194027461b7b35afa
https://github.com/llvm/llvm-project/commit/03f852f704c343abc4a36db194027461b7b35afa
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Transforms/LoopUnroll/AArch64/scalable-vec-ins-ext.ll
Log Message:
-----------
[AArch64] Improve cost model for legal subvec insert/extract (#81135)
Currently we model subvector inserts and extracts as shuffles,
potentially going as far as scalarizing. If the types are legal then
they can just be simple zip/unzip operations, or possible even no-ops.
Change the cost to a relatively small one to ensure that simple loops
featuring such operations between fixed and scalable vector types that
are effectively the same at a given sve width can be unrolled and
further optimized.
Commit: 2a65941a7964644930dcf97559f73f8e5b81738e
https://github.com/llvm/llvm-project/commit/2a65941a7964644930dcf97559f73f8e5b81738e
Author: Nico Weber <thakis at chromium.org>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
Log Message:
-----------
[gn] port 8300f30a9234
Commit: cedb9704bda4f4f9622ba60a18135d70569d0582
https://github.com/llvm/llvm-project/commit/cedb9704bda4f4f9622ba60a18135d70569d0582
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
Log Message:
-----------
[VPlan] Verify CFG invariants first (NFCI).
Verifying CFG invariants of a block before verifying its contents allows
contents verification to rely on the CFG invariants (e.g. that there's a
vector loop region that can be retrieved).
This avoids extra checks in
https://github.com/llvm/llvm-project/pull/76172.
Commit: c240aca7a8a71f7218724aeb6c040289b51057dc
https://github.com/llvm/llvm-project/commit/c240aca7a8a71f7218724aeb6c040289b51057dc
Author: Kazushi (Jam) Marukawa <marukawa at nec.com>
Date: 2024-03-05 (Tue, 05 Mar 2024)
Changed paths:
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/Driver.cpp
R clang/test/Driver/modules-print-library-module-manifest-path.cpp
Log Message:
-----------
Revert "Reland "[clang][modules] Print library module manifest path." (#82160)"
This reverts commit 0c89427b99f6f6d7c217c70ff880ca097340f9a4.
Commit: de92615d68ff3ae206d5059f35a6e4ded8b38297
https://github.com/llvm/llvm-project/commit/de92615d68ff3ae206d5059f35a6e4ded8b38297
Author: Hongyu Chen <46539970+yugier at users.noreply.github.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/ExecutionEngine/CMakeLists.txt
M llvm/lib/ExecutionEngine/IntelJITEvents/CMakeLists.txt
M llvm/lib/ExecutionEngine/IntelJITEvents/IntelJITEventListener.cpp
R llvm/lib/ExecutionEngine/IntelJITEvents/IntelJITEventsWrapper.h
R llvm/lib/ExecutionEngine/IntelJITEvents/ittnotify_config.h
R llvm/lib/ExecutionEngine/IntelJITEvents/ittnotify_types.h
R llvm/lib/ExecutionEngine/IntelJITEvents/jitprofiling.c
R llvm/lib/ExecutionEngine/IntelJITEvents/jitprofiling.h
A llvm/lib/ExecutionEngine/IntelJITProfiling/CMakeLists.txt
A llvm/lib/ExecutionEngine/IntelJITProfiling/IntelJITEventsWrapper.h
A llvm/lib/ExecutionEngine/IntelJITProfiling/ittnotify_config.h
A llvm/lib/ExecutionEngine/IntelJITProfiling/ittnotify_types.h
A llvm/lib/ExecutionEngine/IntelJITProfiling/jitprofiling.c
A llvm/lib/ExecutionEngine/IntelJITProfiling/jitprofiling.h
M llvm/tools/llvm-jitlistener/llvm-jitlistener.cpp
Log Message:
-----------
[ExecutionEngine] Move IntelJITEventsWrapper to its own library. NFC (#81825)
Split IntelJITEventsWrapper away from IntelJITEvents and rename it into
IntelJITProfiling.
NFC
Commit: bc9c6c0c65e267a1a84e4eede81099d8ceb37558
https://github.com/llvm/llvm-project/commit/bc9c6c0c65e267a1a84e4eede81099d8ceb37558
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang/lib/AST/CMakeLists.txt
M clang/lib/AST/Interp/ByteCodeEmitter.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
R clang/lib/AST/Interp/ByteCodeGenError.cpp
R clang/lib/AST/Interp/ByteCodeGenError.h
M clang/lib/AST/Interp/ByteCodeStmtGen.cpp
M clang/lib/AST/Interp/Context.cpp
M clang/lib/AST/Interp/Context.h
M clang/lib/AST/Interp/EvalEmitter.cpp
Log Message:
-----------
[clang][Interp][NFC] Remove ByteCodeGenError
Unused.
Commit: 17efdad2296a2757813e4f11d0575ee6fb826e39
https://github.com/llvm/llvm-project/commit/17efdad2296a2757813e4f11d0575ee6fb826e39
Author: Hongyu Chen <46539970+yugier at users.noreply.github.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
A llvm/include/llvm/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.h
A llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/JITLoaderVTune.h
M llvm/lib/ExecutionEngine/Orc/Debugging/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderVTune.cpp
A llvm/test/ExecutionEngine/JITLink/x86-64/ELF_vtune.s
M llvm/test/ExecutionEngine/JITLink/x86-64/lit.local.cfg
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
Log Message:
-----------
[ORC][JITLink] Add Intel VTune support to JITLink (#81826)
This patch adds two plugins: VTuneSupportPlugin.cpp and
JITLoaderVTune.cpp. The testing is done in a manner similar to
llvm-jitlistener. Currently, we only support the old version of Intel
VTune API.
This pull request is stacked on top of
https://github.com/llvm/llvm-project/pull/81825
Commit: 57a720872128ea21e8ed22cdd9ae4c62154e6fb1
https://github.com/llvm/llvm-project/commit/57a720872128ea21e8ed22cdd9ae4c62154e6fb1
Author: ykhatav <yashasvi.khatavkar at intel.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
Log Message:
-----------
Fix a use-after-move bug in DWARFVerifier constructor (#83621)
Resolve a use-after-move bug for the parameter "DumpOpts" in the
DWARFVerifier constructor.
Commit: f83858f87c5d7a634af717f18a7a53ed5ddde3bd
https://github.com/llvm/llvm-project/commit/f83858f87c5d7a634af717f18a7a53ed5ddde3bd
Author: Mingming Liu <mingmingl at google.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
Log Message:
-----------
[nfc][InstrProfiling]Compute a boolean state as a constant and use it everywhere (#83756)
Commit: af9c5ca820499b932e23d7644e90ea5ff04c3c5f
https://github.com/llvm/llvm-project/commit/af9c5ca820499b932e23d7644e90ea5ff04c3c5f
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/Debugging/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/TargetProcess/BUILD.gn
Log Message:
-----------
[gn build] Port 17efdad2296a
Commit: e6dff54f362f9bcae2a3dd8b0bf7aa6fc9f11017
https://github.com/llvm/llvm-project/commit/e6dff54f362f9bcae2a3dd8b0bf7aa6fc9f11017
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn
Log Message:
-----------
[gn build] Port bc9c6c0c65e2
Commit: 252f3c98db1383ee0e1f25020d488ffb7b4ac392
https://github.com/llvm/llvm-project/commit/252f3c98db1383ee0e1f25020d488ffb7b4ac392
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
A lldb/test/API/lang/cpp/gmodules/pch-chain/Makefile
A lldb/test/API/lang/cpp/gmodules/pch-chain/TestPchChain.py
A lldb/test/API/lang/cpp/gmodules/pch-chain/base-pch.h
A lldb/test/API/lang/cpp/gmodules/pch-chain/main.cpp
A lldb/test/API/lang/cpp/gmodules/pch-chain/pch.h
Log Message:
-----------
[lldb][test] Add test for chained PCH debugging (#83582)
Adds a test-case for debugging a program with a
pch chain, that is, the main executable depends
on a pch that itself included another pch.
Currently clang doesn't emit the sekeleton CUs
required for LLDB to track all types on the pch chain. Thus this test is
XFAILed for now.
Commit: bd7bce2c8465e9cb36a823846a52c9f553502575
https://github.com/llvm/llvm-project/commit/bd7bce2c8465e9cb36a823846a52c9f553502575
Author: Erich Keane <ekeane at nvidia.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/DeclSpec.h
M clang/include/clang/Sema/ParsedAttr.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Sema/ParsedAttr.cpp
A clang/test/Parser/cxx-declarator-attribute-crash.cpp
Log Message:
-----------
Fix null-deref thanks to an attribute on a global declarator chunk (#83611)
This was reported (sort of) in a PR: #77703. The problem is that a
declarator 'owns' an attributes allocation via an `AttributePool`.
However, this example tries to copy a DeclaratorChunk from one
Declarator to another, so when the temporary Declarator goes out of
scope, it deletes the attribute it has tried to pass on via the chunk.
This patch ensures that we copy the 'ownership' of the attribute
correctly, and adds an assert to catch any other casess where this
happens.
Additionally, this was put in as a bug report, so this
Fixes #83611
Commit: 87e7140f72ba46330efb8d9110c2a4a1e6e94900
https://github.com/llvm/llvm-project/commit/87e7140f72ba46330efb8d9110c2a4a1e6e94900
Author: Mingming Liu <mingmingl at google.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
Log Message:
-----------
[nfc][InstrProfiling]For comdat setting helper function, move comment closer to the code (#83757)
Commit: 2e0693abbcf844c138adfa29fc70ea07681e373f
https://github.com/llvm/llvm-project/commit/2e0693abbcf844c138adfa29fc70ea07681e373f
Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-gemm-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matmul-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sampled-matmul-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sddmm-lib.mlir
Log Message:
-----------
[mlir][sparse][gpu] migration to sparse_tensor.print (#83510)
Continuous efforts #83357 for our sparse CUDA tests
Commit: 379e55ea40cbc5ae8b4a16d96236f6a88bd0a649
https://github.com/llvm/llvm-project/commit/379e55ea40cbc5ae8b4a16d96236f6a88bd0a649
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
Fix release note bug reference from bd7bce2c8465e9cb
Commit: ac783addc4dd5bda557cc07b90c08bab2d110ec3
https://github.com/llvm/llvm-project/commit/ac783addc4dd5bda557cc07b90c08bab2d110ec3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[LV] Use SmallVector::resize instead of push_back/emplace_back in a loop. NFC (#83696)
This should be more efficient since the vector can know how much
additional space to reserve before creating the new elements.
Commit: 0097fd2b068e374b02571b391bd4a0a84e8ed3e2
https://github.com/llvm/llvm-project/commit/0097fd2b068e374b02571b391bd4a0a84e8ed3e2
Author: Félix-Antoine Constantin <60141446+felix642 at users.noreply.github.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/UnusedReturnValueCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/UnusedReturnValueCheck.h
M clang-tools-extra/clang-tidy/hicpp/IgnoredRemoveResultCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unused-return-value.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unused-return-value-custom.cpp
Log Message:
-----------
[clang-tidy] bugprone-unused-return-value config now supports regexes (#82952)
The parameter `CheckedFunctions` now supports regexes
Fixes #63107
Commit: 98418c27bc17946990e5980d56ef98ae82da8770
https://github.com/llvm/llvm-project/commit/98418c27bc17946990e5980d56ef98ae82da8770
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M libcxx/test/std/input.output/iostream.objects/narrow.stream.objects/cin.sh.cpp
M libcxx/test/std/input.output/iostream.objects/wide.stream.objects/wcin-imbue.sh.cpp
M libcxx/test/std/input.output/iostream.objects/wide.stream.objects/wcin.sh.cpp
Log Message:
-----------
[libc++][AIX] Use input redirection instead of piping for cin tests (#83184)
When echo is used for piping, lit uses the system echo rather than the
builtin echo. The system echo on AIX doesn't support the `-n` option,
which causes these tests to fail. Use input redirection, so the builtin
echo can be used.
Commit: 56754478e7184a68e88ccc578ffd31097da85d15
https://github.com/llvm/llvm-project/commit/56754478e7184a68e88ccc578ffd31097da85d15
Author: Kirill Stoimenov <kstoimenov at google.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
A llvm/test/Instrumentation/HWAddressSanitizer/pgo-opt-out-no-ps.ll
A llvm/test/Instrumentation/HWAddressSanitizer/pgo-opt-out.ll
Log Message:
-----------
Reapply "[HWASAN] Implement selective instrumentation based on profiling information (#83503)"
Added REQUIRES: asserts, which should fix the build problem.
This reverts commit f6f79d46e580b34b2c98bd9bda7ede3a38f43f77.
Commit: c996023f9a288f12f97de8e1a2b8fbb28d2ed0c3
https://github.com/llvm/llvm-project/commit/c996023f9a288f12f97de8e1a2b8fbb28d2ed0c3
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M libc/config/baremetal/arm/headers.txt
M libc/config/baremetal/riscv/headers.txt
M libc/config/darwin/arm/headers.txt
M libc/config/darwin/x86_64/headers.txt
M libc/config/gpu/headers.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/stdint-macros.h
A libc/include/stdint.h.def
M libc/spec/stdc.td
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Provide an implementation of the 'stdint.h' header (#83353)
Summary:
I've noticed one problem is that the user includes `stdint.h` the
compiler will do `#include_next <stdint.h>` potentially into a
conflicting implementation on systems with multiple headers installed.
The `clang` header is standards compliant and works with `clang` and
`gcc` which are both of our targets, so I simply copied it here. This
has the effect of including `stdint.h` on clang / LLVM libc behaving the
same as `-ffreestanding`.
Commit: 32e2294b8abba6b70356aa37b65acf155506d457
https://github.com/llvm/llvm-project/commit/32e2294b8abba6b70356aa37b65acf155506d457
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
M libc/src/__support/GPU/CMakeLists.txt
Log Message:
-----------
[libc][NFC] Clean up GPU utilities directory after rework (#83692)
Summary:
This CMake can be cleaned up now that the AMDGPU and NVPTX builds do not
share a CMake invocation.
Commit: 2f28ed26085b573285475e2d7ac7bdc029af0133
https://github.com/llvm/llvm-project/commit/2f28ed26085b573285475e2d7ac7bdc029af0133
Author: Alex Richardson <alexrichardson at google.com>
Date: 2024-03-04 (Mon, 04 Mar 2024)
Changed paths:
R .arcconfig
R .arclint
M .github/workflows/build-ci-container.yml
M bolt/include/bolt/Core/ParallelUtilities.h
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/unittests/Core/BinaryContext.cpp
M clang-tools-extra/clang-tidy/bugprone/UnusedReturnValueCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/UnusedReturnValueCheck.h
M clang-tools-extra/clang-tidy/google/ExplicitConstructorCheck.cpp
M clang-tools-extra/clang-tidy/hicpp/IgnoredRemoveResultCheck.cpp
M clang-tools-extra/clangd/HeuristicResolver.cpp
M clang-tools-extra/clangd/HeuristicResolver.h
M clang-tools-extra/clangd/unittests/FindTargetTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unused-return-value.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unused-return-value-custom.cpp
A clang-tools-extra/test/clang-tidy/checkers/google/explicit-constructor-cxx20.cpp
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/checkers.rst
M clang/docs/conf.py
A clang/docs/ghlinks.py
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Sema/DeclSpec.h
M clang/include/clang/Sema/ParsedAttr.h
M clang/include/clang/Sema/Scope.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallDescription.h
M clang/lib/AST/CMakeLists.txt
M clang/lib/AST/Decl.cpp
M clang/lib/AST/Interp/ByteCodeEmitter.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
R clang/lib/AST/Interp/ByteCodeGenError.cpp
R clang/lib/AST/Interp/ByteCodeGenError.h
M clang/lib/AST/Interp/ByteCodeStmtGen.cpp
M clang/lib/AST/Interp/Context.cpp
M clang/lib/AST/Interp/Context.h
M clang/lib/AST/Interp/EvalEmitter.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/DragonFly.cpp
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Haiku.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/MipsLinux.cpp
M clang/lib/Driver/ToolChains/NetBSD.cpp
M clang/lib/Driver/ToolChains/OHOS.cpp
M clang/lib/Driver/ToolChains/OpenBSD.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/ToolChains/Solaris.cpp
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/lib/Driver/ToolChains/ZOS.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/TokenAnnotator.h
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Sema/ParsedAttr.cpp
M clang/lib/Sema/Scope.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/StaticAnalyzer/Checkers/ArrayBoundCheckerV2.cpp
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CheckerDocumentation.cpp
M clang/lib/StaticAnalyzer/Checkers/GenericTaintChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Core/CallDescription.cpp
M clang/lib/Tooling/CMakeLists.txt
M clang/test/AST/Interp/arrays.cpp
M clang/test/AST/Interp/builtin-functions.cpp
M clang/test/AST/Interp/complex.cpp
M clang/test/AST/Interp/literals.cpp
M clang/test/Analysis/analyzer-config.c
M clang/test/Analysis/std-c-library-functions.c
M clang/test/CXX/temp/temp.res/temp.local/p6.cpp
M clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-rotate.c
A clang/test/Layout/dump-complete-invalid.cpp
M clang/test/Layout/dump-complete.cpp
A clang/test/Parser/cxx-declarator-attribute-crash.cpp
M clang/unittests/StaticAnalyzer/CallDescriptionTest.cpp
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/extendbfsf2.c
M compiler-rt/lib/builtins/fp_extend.h
M compiler-rt/lib/sanitizer_common/sanitizer_posix_libcdep.cpp
M compiler-rt/lib/scudo/standalone/checksum.cpp
M compiler-rt/lib/scudo/standalone/checksum.h
M compiler-rt/lib/scudo/standalone/crc32_hw.cpp
M flang/docs/conf.py
M flang/include/flang/Optimizer/CodeGen/CodeGen.h
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Transforms/MemoryAllocation.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/test/Fir/memory-allocation-opt.fir
M flang/test/Transforms/simplifyintrinsics.fir
M libc/cmake/modules/LLVMLibCHeaderRules.cmake
M libc/config/baremetal/arm/headers.txt
M libc/config/baremetal/riscv/headers.txt
M libc/config/darwin/arm/headers.txt
M libc/config/darwin/x86_64/headers.txt
M libc/config/gpu/headers.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/stdint-macros.h
M libc/include/llvm-libc-types/float128.h
A libc/include/stdint.h.def
M libc/spec/stdc.td
M libc/src/__support/FPUtil/ManipulationFunctions.h
M libc/src/__support/FPUtil/NormalFloat.h
M libc/src/__support/FPUtil/dyadic_float.h
M libc/src/__support/FPUtil/generic/sqrt.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
M libc/src/__support/FPUtil/x86_64/sqrt.h
M libc/src/__support/GPU/CMakeLists.txt
M libc/src/__support/float_to_string.h
M libc/src/__support/macros/properties/types.h
M libc/src/__support/str_to_float.h
M libc/test/src/__support/FPUtil/fpbits_test.cpp
M libc/test/src/__support/str_to_long_double_test.cpp
M libc/test/src/math/smoke/nanl_test.cpp
M libc/test/src/stdio/sprintf_test.cpp
M libc/test/src/stdio/sscanf_test.cpp
M libc/test/src/stdlib/strtold_test.cpp
M libcxx/include/CMakeLists.txt
M libcxx/include/__atomic/atomic_base.h
M libcxx/include/__atomic/atomic_flag.h
M libcxx/include/__atomic/atomic_sync.h
M libcxx/include/__filesystem/path.h
M libcxx/include/__format/parser_std_format_spec.h
M libcxx/include/__functional/bind.h
M libcxx/include/__functional/hash.h
M libcxx/include/__functional/identity.h
A libcxx/include/__fwd/functional.h
R libcxx/include/__fwd/hash.h
M libcxx/include/__thread/id.h
M libcxx/include/__thread/support/pthread.h
M libcxx/include/__type_traits/is_reference_wrapper.h
M libcxx/include/__type_traits/remove_cv.h
M libcxx/include/__type_traits/remove_cvref.h
M libcxx/include/__type_traits/unwrap_ref.h
M libcxx/include/experimental/propagate_const
M libcxx/include/filesystem
M libcxx/include/fstream
M libcxx/include/latch
M libcxx/include/libcxx.imp
M libcxx/include/module.modulemap.in
M libcxx/include/optional
M libcxx/include/semaphore
M libcxx/include/type_traits
M libcxx/src/iostream.cpp
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/test/std/containers/container.adaptors/container.adaptors.format/format.functions.tests.h
M libcxx/test/std/containers/sequences/vector.bool/vector.bool.fmt/format.functions.tests.h
M libcxx/test/std/input.output/iostream.objects/narrow.stream.objects/cin.sh.cpp
M libcxx/test/std/input.output/iostream.objects/wide.stream.objects/wcin-imbue.sh.cpp
M libcxx/test/std/input.output/iostream.objects/wide.stream.objects/wcin.sh.cpp
M libcxx/test/std/utilities/format/format.range/format.range.fmtmap/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.fmtset/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.fmtstr/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.formatter/format.functions.tests.h
M libcxx/test/std/utilities/format/format.tuple/format.functions.tests.h
M libcxx/utils/generate_iwyu_mapping.py
M libcxx/utils/libcxx/test/format.py
M lld/CMakeLists.txt
M lld/test/CMakeLists.txt
M lldb/include/lldb/Core/Debugger.h
M lldb/source/Core/Debugger.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
A lldb/test/API/lang/cpp/gmodules/pch-chain/Makefile
A lldb/test/API/lang/cpp/gmodules/pch-chain/TestPchChain.py
A lldb/test/API/lang/cpp/gmodules/pch-chain/base-pch.h
A lldb/test/API/lang/cpp/gmodules/pch-chain/main.cpp
A lldb/test/API/lang/cpp/gmodules/pch-chain/pch.h
M llvm/cmake/modules/AddLLVM.cmake
M llvm/docs/Contributing.rst
M llvm/docs/DeveloperPolicy.rst
R llvm/docs/Phabricator.rst
R llvm/docs/Phabricator_premerge_results.png
R llvm/docs/Phabricator_premerge_unit_tests.png
M llvm/docs/UserGuides.rst
M llvm/docs/conf.py
M llvm/examples/BrainF/BrainF.cpp
M llvm/examples/Fibonacci/fibonacci.cpp
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/ValueTypes.h
M llvm/include/llvm/Debuginfod/Debuginfod.h
A llvm/include/llvm/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.h
A llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/JITLoaderVTune.h
M llvm/include/llvm/IR/AutoUpgrade.h
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/IntrinsicsPowerPC.td
M llvm/include/llvm/IR/RuntimeLibcalls.def
M llvm/include/llvm/Support/BalancedPartitioning.h
M llvm/include/llvm/Support/ThreadPool.h
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/include/llvm/TargetParser/ARMTargetParser.def
M llvm/include/llvm/TargetParser/ARMTargetParser.h
M llvm/include/llvm/Transforms/Utils/Local.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/DWARFLinker/Classic/CMakeLists.txt
M llvm/lib/DWARFLinker/Parallel/CMakeLists.txt
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
M llvm/lib/DebugInfo/GSYM/CMakeLists.txt
M llvm/lib/Debuginfod/Debuginfod.cpp
M llvm/lib/ExecutionEngine/CMakeLists.txt
M llvm/lib/ExecutionEngine/IntelJITEvents/CMakeLists.txt
M llvm/lib/ExecutionEngine/IntelJITEvents/IntelJITEventListener.cpp
R llvm/lib/ExecutionEngine/IntelJITEvents/IntelJITEventsWrapper.h
R llvm/lib/ExecutionEngine/IntelJITEvents/ittnotify_config.h
R llvm/lib/ExecutionEngine/IntelJITEvents/ittnotify_types.h
R llvm/lib/ExecutionEngine/IntelJITEvents/jitprofiling.c
R llvm/lib/ExecutionEngine/IntelJITEvents/jitprofiling.h
A llvm/lib/ExecutionEngine/IntelJITProfiling/CMakeLists.txt
A llvm/lib/ExecutionEngine/IntelJITProfiling/IntelJITEventsWrapper.h
A llvm/lib/ExecutionEngine/IntelJITProfiling/ittnotify_config.h
A llvm/lib/ExecutionEngine/IntelJITProfiling/ittnotify_types.h
A llvm/lib/ExecutionEngine/IntelJITProfiling/jitprofiling.c
A llvm/lib/ExecutionEngine/IntelJITProfiling/jitprofiling.h
M llvm/lib/ExecutionEngine/Orc/Debugging/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderVTune.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/CMakeLists.txt
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/Support/LockFileManager.cpp
M llvm/lib/Support/ThreadPool.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SLSHardening.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/lib/Target/ARM/ARMSLSHardening.cpp
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMSubtarget.h
M llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.td
M llvm/lib/Target/AVR/AVRRegisterInfo.td
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.h
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVMetadata.cpp
M llvm/lib/Target/SPIRV/SPIRVMetadata.h
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86IndirectThunks.cpp
M llvm/lib/Target/X86/X86InstrVecCompiler.td
M llvm/lib/Transforms/CFGuard/CFGuard.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/Reg2Mem.cpp
M llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/lib/Transforms/Utils/CanonicalizeFreezeInLoops.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/DemoteRegToStack.cpp
M llvm/lib/Transforms/Utils/EntryExitInstrumenter.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopConstrainer.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/LoopSimplify.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
M llvm/lib/Transforms/Utils/LowerGlobalDtors.cpp
M llvm/lib/Transforms/Utils/LowerInvoke.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Utils/LowerSwitch.cpp
M llvm/lib/Transforms/Utils/MatrixUtils.cpp
M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
M llvm/lib/Transforms/Utils/StripGCRelocates.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
A llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Analysis/CostModel/AArch64/reduce-fadd.ll
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/PowerPC/insert_extract-inseltpoison.ll
M llvm/test/Analysis/CostModel/PowerPC/insert_extract.ll
A llvm/test/Analysis/CostModel/RISCV/vector-cost-without-v.ll
M llvm/test/Assembler/debug-info.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir
M llvm/test/CodeGen/AArch64/GlobalISel/lower-neon-vector-fcmp.mir
M llvm/test/CodeGen/AArch64/implicitly-set-zero-high-64-bits.ll
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
M llvm/test/CodeGen/AArch64/round-fptosi-sat-scalar.ll
M llvm/test/CodeGen/AArch64/shufflevector.ll
M llvm/test/CodeGen/AArch64/vector-fcopysign.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/inline-constraints.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/ARM/aes-erratum-fix.ll
A llvm/test/CodeGen/ARM/aes.ll
M llvm/test/CodeGen/ARM/arm-position-independence.ll
M llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-fp.ll
M llvm/test/CodeGen/PowerPC/crsave.ll
M llvm/test/CodeGen/PowerPC/rldimi.ll
M llvm/test/CodeGen/PowerPC/rlwimi.ll
M llvm/test/CodeGen/PowerPC/rlwinm.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-compressstore-fp.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-compressstore-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-expandload-fp.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-expandload-int.ll
A llvm/test/CodeGen/RISCV/rvv/pr83017.ll
A llvm/test/CodeGen/SPIRV/bitcast.ll
M llvm/test/CodeGen/SPIRV/exec_mode_float_control_khr.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv-negative1.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv-negative2.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv-negative3.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv-negative4.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_conversion/bfloat16-conv.ll
M llvm/test/CodeGen/SPIRV/function/alloca-load-store.ll
M llvm/test/CodeGen/SPIRV/half_no_extension.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-nested-composite-store.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-simple-composite-store.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/add.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/and.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fadd.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmax.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmaximum.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmin.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fminimum.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmul.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/mul.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/or.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/smax.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/smin.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/umax.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/umin.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/xor.ll
M llvm/test/CodeGen/SPIRV/opaque_pointers.ll
M llvm/test/CodeGen/SPIRV/opencl/basic/get_global_offset.ll
R llvm/test/CodeGen/SPIRV/opencl/metadata/kernel_arg_type_function_metadata.ll
R llvm/test/CodeGen/SPIRV/opencl/metadata/kernel_arg_type_module_metadata.ll
M llvm/test/CodeGen/SPIRV/opencl/vload2.ll
A llvm/test/CodeGen/SPIRV/opencl/vstore2.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVEmitIntrinsics-TargetExtType-arg-no-spv_assign_type.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVEmitIntrinsics-no-divergent-spv_assign_ptr_type.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVEmitIntrinsics-no-duplicate-spv_assign_type.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-kernel-arg-char.ll
A llvm/test/CodeGen/SPIRV/pointers/kernel-argument-builtin-vload-type-discrapency.ll
A llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-type-deduction-mismatch.ll
A llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-type-deduction-no-metadata.ll
A llvm/test/CodeGen/SPIRV/pointers/ptr-argument-byref.ll
A llvm/test/CodeGen/SPIRV/pointers/ptr-argument-byval.ll
A llvm/test/CodeGen/SPIRV/pointers/store-operand-ptr-to-struct.ll
A llvm/test/CodeGen/SPIRV/pointers/two-bitcast-or-param-users.ll
R llvm/test/CodeGen/SPIRV/pointers/two-bitcast-users.ll
M llvm/test/CodeGen/SPIRV/pointers/two-subsequent-bitcasts.ll
M llvm/test/CodeGen/SPIRV/sitofp-with-bool.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpenCL/atomic_cmpxchg.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpenCL/atomic_legacy.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-private-array-initialization.ll
M llvm/test/CodeGen/SPIRV/uitofp-with-bool.ll
A llvm/test/CodeGen/Thumb2/pacbti-m-frame-chain.ll
M llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll
M llvm/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll
M llvm/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll
M llvm/test/CodeGen/X86/2008-02-18-TailMergingBug.ll
A llvm/test/CodeGen/X86/apx/long-instruction-fixup-x32.ll
A llvm/test/CodeGen/X86/apx/long-instruction-fixup.ll
M llvm/test/CodeGen/X86/avx-cmp.ll
M llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
A llvm/test/CodeGen/X86/bfloat-constrained.ll
M llvm/test/CodeGen/X86/bfloat.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool.ll
M llvm/test/CodeGen/X86/cmp-shiftX-maskX.ll
M llvm/test/CodeGen/X86/cmp.ll
M llvm/test/CodeGen/X86/dagcombine-and-setcc.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
M llvm/test/CodeGen/X86/half-constrained.ll
M llvm/test/CodeGen/X86/inline-spiller-impdef-on-implicit-def-regression.ll
M llvm/test/CodeGen/X86/lsr-addrecloops.ll
M llvm/test/CodeGen/X86/movmsk-cmp.ll
M llvm/test/CodeGen/X86/or-branch.ll
M llvm/test/CodeGen/X86/peephole-na-phys-copy-folding.ll
M llvm/test/CodeGen/X86/pr33747.ll
M llvm/test/CodeGen/X86/pr37025.ll
M llvm/test/CodeGen/X86/pr38795.ll
M llvm/test/CodeGen/X86/setcc-logic.ll
M llvm/test/CodeGen/X86/swifterror.ll
M llvm/test/CodeGen/X86/tail-dup-merge-loop-headers.ll
M llvm/test/CodeGen/X86/tail-opts.ll
M llvm/test/CodeGen/X86/tailcall-extract.ll
M llvm/test/CodeGen/X86/test-shrink-bug.ll
M llvm/test/CodeGen/X86/x86-shrink-wrap-unwind.ll
R llvm/test/DebugInfo/AArch64/ptrauth.ll
M llvm/test/DebugInfo/print-non-instruction-debug-info.ll
A llvm/test/ExecutionEngine/JITLink/x86-64/ELF_vtune.s
M llvm/test/ExecutionEngine/JITLink/x86-64/lit.local.cfg
A llvm/test/Instrumentation/HWAddressSanitizer/pgo-opt-out-no-ps.ll
A llvm/test/Instrumentation/HWAddressSanitizer/pgo-opt-out.ll
M llvm/test/LTO/AArch64/link-branch-target-enforcement.ll
A llvm/test/LTO/AArch64/link-sign-return-address.ll
M llvm/test/Linker/link-arm-and-thumb.ll
A llvm/test/MC/X86/apx/long-instruction-err.s
A llvm/test/TableGen/GlobalISelEmitter-multiple-output-reject.td
M llvm/test/TableGen/GlobalISelEmitter-multiple-output.td
A llvm/test/Transforms/DeadStoreElimination/batchaa-caching-new-pointers.ll
M llvm/test/Transforms/Inline/X86/call-abi-compatibility.ll
M llvm/test/Transforms/LoopUnroll/AArch64/scalable-vec-ins-ext.ll
M llvm/test/Transforms/LoopVectorize/no-fold-tail-by-masking-iv-external-uses.ll
A llvm/test/tools/llvm-mca/AMDGPU/gfx940-mfma.s
M llvm/tools/bugpoint/Miscompilation.cpp
M llvm/tools/llvm-cov/CoverageReport.h
M llvm/tools/llvm-cov/SourceCoverageViewHTML.h
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlistener/llvm-jitlistener.cpp
M llvm/tools/opt/optdriver.cpp
M llvm/unittests/IR/InstructionsTest.cpp
M llvm/unittests/IR/MetadataTest.cpp
M llvm/unittests/Support/ThreadPool.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
M llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/Debugging/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/TargetProcess/BUILD.gn
M llvm/utils/not/not.cpp
M mlir/include/mlir/CAPI/Support.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/PDL/IR/PDLOps.td
M mlir/include/mlir/Dialect/PDLInterp/IR/PDLInterpOps.td
M mlir/include/mlir/IR/MLIRContext.h
M mlir/include/mlir/IR/PDLPatternMatch.h.inc
M mlir/include/mlir/IR/Threading.h
M mlir/include/mlir/Query/Matcher/ErrorBuilder.h
M mlir/include/mlir/Query/Matcher/MatchersInternal.h
M mlir/lib/CAPI/IR/IR.cpp
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/lib/Conversion/PDLToPDLInterp/PDLToPDLInterp.cpp
M mlir/lib/Conversion/PDLToPDLInterp/Predicate.h
M mlir/lib/Conversion/PDLToPDLInterp/PredicateTree.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/lib/Dialect/PDL/IR/PDL.cpp
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/Query/CMakeLists.txt
M mlir/lib/Query/Matcher/Diagnostics.cpp
M mlir/lib/Query/Matcher/Parser.cpp
M mlir/lib/Query/Matcher/Parser.h
M mlir/lib/Query/Matcher/RegistryManager.cpp
M mlir/lib/Query/Matcher/RegistryManager.h
M mlir/lib/Query/Query.cpp
M mlir/lib/Rewrite/ByteCode.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Tools/PDLL/Parser/Parser.cpp
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Conversion/MemRefToSPIRV/memref-to-spirv.mlir
M mlir/test/Conversion/PDLToPDLInterp/pdl-to-pdl-interp-matcher.mlir
A mlir/test/Conversion/PDLToPDLInterp/use-constraint-result.mlir
M mlir/test/Dialect/Linalg/canonicalize.mlir
M mlir/test/Dialect/Linalg/reshape_fusion.mlir
M mlir/test/Dialect/PDL/ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-gemm-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matmul-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sampled-matmul-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-sddmm-lib.mlir
M mlir/test/Rewrite/pdl-bytecode.mlir
A mlir/test/Target/LLVMIR/openmp-firstprivate.mlir
M mlir/test/Transforms/test-legalizer.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.cpp
M mlir/test/lib/Rewrite/TestPDLByteCode.cpp
M mlir/test/mlir-pdll/Parser/constraint-failure.pdll
M mlir/test/mlir-pdll/Parser/constraint.pdll
A mlir/test/mlir-query/function-extraction.mlir
M mlir/test/python/dialects/pdl_ops.py
M openmp/libomptarget/include/Shared/SourceInfo.h
M openmp/libomptarget/include/omptarget.h
M openmp/libomptarget/plugins-nextgen/common/include/RPC.h
A pyproject.toml
R utils/arcanist/clang-format.sh
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
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