[all-commits] [llvm/llvm-project] 420928: [X86][CodeGen] Fix compile crash in EVEX compressi...

[Shengchen Kan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 420928b2fa8b00f23f0adcb19328014592455698
      https://github.com/llvm/llvm-project/commit/420928b2fa8b00f23f0adcb19328014592455698
  Author: Shengchen Kan <shengchen.kan at intel.com>
  Date:   2024-03-01 (Fri, 01 Mar 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86CompressEVEX.cpp
    M llvm/test/CodeGen/X86/apx/compress-evex.mir

  Log Message:
  -----------
  [X86][CodeGen] Fix compile crash in EVEX compression for corner case

The base register of OPmi_ND may be allocated to the same physic
register as the ND operand.

OPmi_ND is not compressible b/c it has different semnatic from OPmi.
In this case, `isRedundantNewDataDest` should return false, otherwise
we would get error

Assertion `!IsNDLike && "Missing entry for ND-like instruction"' failed.



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