[all-commits] [llvm/llvm-project] 0d572c: AMDGPU\GlobalISel: remove amdgpu-global-isel-risky...

[Petar Avramovic via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0d572c41f941a4c9b3744a3b849ec35cd26bae2b
      https://github.com/llvm/llvm-project/commit/0d572c41f941a4c9b3744a3b849ec35cd26bae2b
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2024-02-29 (Thu, 29 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir

  Log Message:
  -----------
  AMDGPU\GlobalISel: remove amdgpu-global-isel-risky-select flag (#83426)

AMDGPUInstructionSelector should no longer attempt to select S1 G_PHIs.
Remove MIR test that attempts to inst-select divergent vcc(S1) G_PHI.
Lane mask merging algorithm for GlobalISel is now responsible for
selecting divergent S1 G_PHIs in AMDGPUGlobalISelDivergenceLowering.
Uniform S1 G_PHIs should be lowered to S32 G_PHIs in reg bank select
pass. In summary S1 G_PHIs should not reach AMDGPUInstructionSelector.



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