[all-commits] [llvm/llvm-project] 3e35ba: AMDGPU/GFX12: Insert waitcnts before stores with s...

[Petar Avramovic via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3e35ba53e20dbbd3ccc191d71ed75d52dc36ec59
      https://github.com/llvm/llvm-project/commit/3e35ba53e20dbbd3ccc191d71ed75d52dc36ec59
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2024-02-28 (Wed, 28 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.h
    M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
    M llvm/lib/Target/AMDGPU/SOPInstructions.td
    M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
    M llvm/test/CodeGen/AMDGPU/clamp.ll
    M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
    M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
    M llvm/test/CodeGen/AMDGPU/omod.ll
    M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
    A llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll
    A llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.mir

  Log Message:
  -----------
  AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (#82996)

Insert waitcnts for loads and atomics before stores with system scope.
Scope is field in instruction encoding and corresponds to desired
coherence level in cache hierarchy.
Intrinsic stores can set scope in cache policy operand.
If volatile keyword is used on generic stores memory legalizer will set
scope to system. Generic stores, by default, get lowest scope level.
Waitcnts are not required if it is guaranteed that memory is cached.
For example vulkan shaders can guarantee this.
TODO: implement flag for frontends to give us a hint not to insert
waits.
Expecting vulkan flag to be implemented as vulkan:private MMRA.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications