[all-commits] [llvm/llvm-project] 99c457: Unbreak *tf builtins for hexfloat (#82208)

Florian Hahn via All-commits all-commits at lists.llvm.org
Mon Feb 26 09:59:00 PST 2024


  Branch: refs/heads/users/fhahn/vplan-uniform-scalar-lanes
  Home:   https://github.com/llvm/llvm-project
  Commit: 99c457dc2ef395872d7448c85609f6cb73a7f89b
      https://github.com/llvm/llvm-project/commit/99c457dc2ef395872d7448c85609f6cb73a7f89b
  Author: Alexander Richardson <alexrichardson at google.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M compiler-rt/lib/builtins/divtc3.c
    M compiler-rt/lib/builtins/fp_lib.h
    M compiler-rt/lib/builtins/int_types.h
    M compiler-rt/lib/builtins/multc3.c

  Log Message:
  -----------
  Unbreak *tf builtins for hexfloat (#82208)

This re-lands cc0065a7d082f0bd322a538cf62cfaef1c8f89f8 in a way that 
keeps existing targets working.

---------

Original commit message:
#68132 ended up removing
__multc3 & __divtc3 from compiler-rt library builds that have
QUAD_PRECISION but not TF_MODE due to missing int128 support. 
I added support for QUAD_PRECISION to use the native hex float long double representation.

---------

Co-authored-by: Sean Perry <perry at ca.ibm.com>


  Commit: 81b4b89197a6be5f19f907b558540bb3cb70f064
      https://github.com/llvm/llvm-project/commit/81b4b89197a6be5f19f907b558540bb3cb70f064
  Author: Justin Stitt <jstitt007 at gmail.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/docs/UndefinedBehaviorSanitizer.rst
    M clang/lib/CodeGen/CGExprScalar.cpp
    M clang/test/CodeGen/integer-overflow.c

  Log Message:
  -----------
  [Sanitizer] Support -fwrapv with -fsanitize=signed-integer-overflow (#82432)

Clang has a `signed-integer-overflow` sanitizer to catch arithmetic
overflow; however, most of its instrumentation [fails to
apply](https://godbolt.org/z/ee41rE8o6) when `-fwrapv` is enabled; this
is by design.

The Linux kernel enables `-fno-strict-overflow` which implies `-fwrapv`.
This means we are [currently unable to detect signed-integer
wrap-around](https://github.com/KSPP/linux/issues/26). All the while,
the root cause of many security vulnerabilities in the Linux kernel is
[arithmetic overflow](https://cwe.mitre.org/data/definitions/190.html).

To work around this and enhance the functionality of
`-fsanitize=signed-integer-overflow`, we instrument signed arithmetic
even if the signed overflow behavior is defined.

Co-authored-by: Justin Stitt <justinstitt at google.com>


  Commit: c63e68ba5fb54b69521c4f010d1c5290856c6509
      https://github.com/llvm/llvm-project/commit/c63e68ba5fb54b69521c4f010d1c5290856c6509
  Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M lldb/test/API/python_api/type/TestTypeList.py

  Log Message:
  -----------
  Bump the minimum LLVM version for TestTypeList.py


  Commit: 2b2881b0ae94e56aa019b519419d122bb7b81462
      https://github.com/llvm/llvm-project/commit/2b2881b0ae94e56aa019b519419d122bb7b81462
  Author: Jorge Gorbe Moya <jgorbe at google.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M clang/include/clang/InstallAPI/Context.h

  Log Message:
  -----------
  Add namespace qualifier for llvm::StringRef


  Commit: 9eff001d3dbe84851caa7de4e1093af62c009e06
      https://github.com/llvm/llvm-project/commit/9eff001d3dbe84851caa7de4e1093af62c009e06
  Author: David Majnemer <david.majnemer at gmail.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/AMDGPU/bf16.ll
    M llvm/test/CodeGen/AMDGPU/fmed3-cast-combine.ll
    M llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll
    M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
    M llvm/test/CodeGen/AMDGPU/local-atomics-fp.ll
    M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll

  Log Message:
  -----------
  [TargetLowering] Correctly yield NaN from FP_TO_BF16

We didn't set the exponent field, resulting in tiny numbers instead of
NaNs.


  Commit: d17eade22ab9a65144a2bbd538f47924eed6b87d
      https://github.com/llvm/llvm-project/commit/d17eade22ab9a65144a2bbd538f47924eed6b87d
  Author: Florian Mayer <fmayer at google.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M compiler-rt/lib/scudo/standalone/combined.h

  Log Message:
  -----------
  Do not call disable / enable on null depot (#82542)

depot can be null if allocation_ring_buffer_size=0


  Commit: be36812fb7cb3fca05f20865e062c966a14dbfdc
      https://github.com/llvm/llvm-project/commit/be36812fb7cb3fca05f20865e062c966a14dbfdc
  Author: David Majnemer <david.majnemer at gmail.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/AMDGPU/bf16.ll
    M llvm/test/CodeGen/AMDGPU/fmed3-cast-combine.ll
    M llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll
    M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
    M llvm/test/CodeGen/AMDGPU/local-atomics-fp.ll
    M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll

  Log Message:
  -----------
  [TargetLowering] Be more efficient in fp -> bf16 NaN conversions

We can avoid masking completely as it is OK (and probably preferable) to
bring over some of the existant NaN payload.


  Commit: 828bf134d732a29146d1dd666548c75b49012b08
      https://github.com/llvm/llvm-project/commit/828bf134d732a29146d1dd666548c75b49012b08
  Author: Cyndy Ishida <cyndy_ishida at apple.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M clang/include/clang/InstallAPI/HeaderFile.h
    M clang/tools/clang-installapi/Options.cpp

  Log Message:
  -----------
  [InstallAPI] Cleanup HeaderFile Interface & options handling, NFC (#82544)


  Commit: 049e142badfca3fae5c190c5d4b37acdd2e9c10c
      https://github.com/llvm/llvm-project/commit/049e142badfca3fae5c190c5d4b37acdd2e9c10c
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M libc/CMakeLists.txt
    M libc/lib/CMakeLists.txt
    M libc/startup/linux/CMakeLists.txt

  Log Message:
  -----------
  [libc] Fix startup utilities failing to install in full build mode (#82522)

Summary:
Currently, doing `ninja install` will fail in fullbuild mode due to the
startup utilities not being built by default. This was hidden previously
by the fact that if tests were run, it would build the startup utilities
and thus they would be present.

This patch solves this issue by making the `libc-startup` target a
dependncy on the final library. Furthermore we simply factor out the
library install directory into the base CMake directory next to the
include directory handling. This change makes the `crt` files get
installed in `lib/x86_64-unknown-linu-gnu` instead of just `lib`.

This fixes an error I had where doing a runtimes failed to install its
libraries because the install step always errored.


  Commit: 300425cea51ef566a4d38e57afd9a7ae8024a682
      https://github.com/llvm/llvm-project/commit/300425cea51ef566a4d38e57afd9a7ae8024a682
  Author: Zixu Wang <9819235+zixu-w at users.noreply.github.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst

  Log Message:
  -----------
  Revert "[Docs] Add release note about Clang-defined target OS macros … (#80045)

…(#79879)"

This reverts commit b40d5b1b08564d23d5e0769892ebbc32447b2987.

The target OS macros work is included in the 18.x release. Move the
release note to the release branch
(https://github.com/llvm/llvm-project/pull/80044).


  Commit: 699c408c88b3ed02f25464aa868bd48454fbba3f
      https://github.com/llvm/llvm-project/commit/699c408c88b3ed02f25464aa868bd48454fbba3f
  Author: Vitaly Buka <vitalybuka at google.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp

  Log Message:
  -----------
  [NFC][HWASAN] Fix misleading name


  Commit: 9ea9e93f4a74b363887b773397bcb134062270d9
      https://github.com/llvm/llvm-project/commit/9ea9e93f4a74b363887b773397bcb134062270d9
  Author: Yuta Mukai <mukai.yuta at fujitsu.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/CodeGen/MachinePipeliner.cpp

  Log Message:
  -----------
  [MachinePipeliner] Fix elements being added while the list is iterated (#80805)

There is no need to add the elements of Objs twice, so the addition is
removed.


  Commit: 640e781dc87bdb74e14a66c89e54417e60150904
      https://github.com/llvm/llvm-project/commit/640e781dc87bdb74e14a66c89e54417e60150904
  Author: Alexander Yermolovich <43973793+ayermolo at users.noreply.github.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M bolt/include/bolt/Core/DIEBuilder.h
    M bolt/lib/Core/DIEBuilder.cpp
    M bolt/lib/Rewrite/DWARFRewriter.cpp

  Log Message:
  -----------
  [BOLT][DWARF][NFC] Use SkeletonCU in place of IsDWO check (#82540)

Changed isDWO to a function that checks Skeleton CU that is passed in.
This is for preparation for
https://github.com/llvm/llvm-project/pull/81062.


  Commit: 004c1972b4585fe8051814ceb6c6cdbf3cb62290
      https://github.com/llvm/llvm-project/commit/004c1972b4585fe8051814ceb6c6cdbf3cb62290
  Author: Alexander Yermolovich <43973793+ayermolo at users.noreply.github.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M bolt/include/bolt/Core/DebugData.h
    M bolt/lib/Core/DebugData.cpp

  Log Message:
  -----------
  [BOLT][DWARF][NFC] Expose DebugStrOffsetsWriter::clear (#82548)

Refactored cod that clears data-structures in DebugStrOffsetsWriter into
clear() function and made initialize() public. This is for
https://github.com/llvm/llvm-project/pull/81062.


  Commit: f204aee1b9173ed9ae72017808f0a379c3a8de7a
      https://github.com/llvm/llvm-project/commit/f204aee1b9173ed9ae72017808f0a379c3a8de7a
  Author: Fabian Mora <fmora.dev at gmail.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M mlir/CMakeLists.txt
    M mlir/include/mlir/Dialect/GPU/Transforms/Passes.h
    M mlir/lib/Dialect/GPU/CMakeLists.txt
    R mlir/lib/Dialect/GPU/Transforms/SerializeToCubin.cpp

  Log Message:
  -----------
  [mlir][GPU] Remove the SerializeToCubin pass (#82486)

The `SerializeToCubin` pass was deprecated in September 2023 in favor of
GPU compilation attributes; see the [GPU
compilation](https://mlir.llvm.org/docs/Dialects/GPU/#gpu-compilation)
section in the `gpu` dialect MLIR docs.
This patch removes `SerializeToCubin` from the repo.


  Commit: 4c0fdcdb33076e936327cb0743c827f019a8e1ff
      https://github.com/llvm/llvm-project/commit/4c0fdcdb33076e936327cb0743c827f019a8e1ff
  Author: Sumanth Gundapaneni <sgundapa at quicinc.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M llvm/lib/Target/Hexagon/CMakeLists.txt
    A llvm/lib/Target/Hexagon/HexagonGenMemAbsolute.cpp
    M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
    A llvm/test/CodeGen/Hexagon/load-const-extend-opt.ll
    A llvm/test/CodeGen/Hexagon/store-const-extend-opt.ll

  Log Message:
  -----------
  [Hexagon] Generate absolute-set load/store instructions. (#82034)

The optimization finds the loads/stores of a specific form and translate
the first load/store to an absolute-set form there by optimizing out the
transfer and eliminate the constant extenders.


  Commit: d62ca8def395ac165f253fdde1d93725394a4d53
      https://github.com/llvm/llvm-project/commit/d62ca8def395ac165f253fdde1d93725394a4d53
  Author: Sumanth Gundapaneni <sgundapa at quicinc.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M llvm/lib/Target/Hexagon/CMakeLists.txt
    M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
    M llvm/lib/Target/Hexagon/HexagonInstrInfo.h
    A llvm/lib/Target/Hexagon/HexagonPostIncOpt.cpp
    M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
    M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h
    A llvm/test/CodeGen/Hexagon/post-inc-vec.mir
    A llvm/test/CodeGen/Hexagon/post_inc_store.mir
    A llvm/test/CodeGen/Hexagon/postincopt-crash.mir
    A llvm/test/CodeGen/Hexagon/postincopt-dcfetch.mir
    A llvm/test/CodeGen/Hexagon/valid-offset-loadbsw4.mir

  Log Message:
  -----------
  [Hexagon] Optimize post-increment load and stores in loops. (#82418)

This patch optimizes the post-increment instructions so that we can
packetize them together.
v1 = phi(v0, v3')
v2,v3  = post_load v1, 4
v2',v3'= post_load v3, 4

This can be optimized in two ways

v1 = phi(v0, v3')
v2,v3' = post_load v1, 8
v2' = load v1, 4


  Commit: a976e3c6959209f6f011260f64e4705ee84b47e8
      https://github.com/llvm/llvm-project/commit/a976e3c6959209f6f011260f64e4705ee84b47e8
  Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M compiler-rt/lib/sanitizer_common/sanitizer_fuchsia.cpp

  Log Message:
  -----------
  [compiler-rt][Fuchsia] Propogate raw_report to UnmapOrDieVmar (#82566)

As of #77488, UnmapOrDie now accepts raw_report which allows the program
to crash without calling Report(). We should propogate this value
through UnmapOrDieVmar and have that call ReportMunmapFailureAndDie
which uses `raw_report`.


  Commit: ba31a195f5f2efc17bee8cf3be4260badc578615
      https://github.com/llvm/llvm-project/commit/ba31a195f5f2efc17bee8cf3be4260badc578615
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/BUILD.gn

  Log Message:
  -----------
  [gn build] Port 4c0fdcdb3307


  Commit: dd6d059da5a75689666e555058ade7a83e81d29f
      https://github.com/llvm/llvm-project/commit/dd6d059da5a75689666e555058ade7a83e81d29f
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/BUILD.gn

  Log Message:
  -----------
  [gn build] Port d62ca8def395


  Commit: 99822be6f08e42eef38913a128996a93e8292f73
      https://github.com/llvm/llvm-project/commit/99822be6f08e42eef38913a128996a93e8292f73
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M mlir/unittests/Dialect/SPIRV/SerializationTest.cpp

  Log Message:
  -----------
  Apply clang-tidy fixes for readability-identifier-naming in SerializationTest.cpp (NFC)


  Commit: 443247993cb8562f1308aab5ee0a9404983707d0
      https://github.com/llvm/llvm-project/commit/443247993cb8562f1308aab5ee0a9404983707d0
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M mlir/unittests/IR/InterfaceAttachmentTest.cpp

  Log Message:
  -----------
  Apply clang-tidy fixes for llvm-qualified-auto in InterfaceAttachmentTest.cpp (NFC)


  Commit: df8d5c17802b162c5d20300426f03d6fb970d2a2
      https://github.com/llvm/llvm-project/commit/df8d5c17802b162c5d20300426f03d6fb970d2a2
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M mlir/unittests/IR/OperationSupportTest.cpp

  Log Message:
  -----------
  Apply clang-tidy fixes for llvm-qualified-auto in OperationSupportTest.cpp (NFC)


  Commit: fa25433d433932b1b8fd296206b1bcd974afecad
      https://github.com/llvm/llvm-project/commit/fa25433d433932b1b8fd296206b1bcd974afecad
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp

  Log Message:
  -----------
  Apply clang-tidy fixes for modernize-use-override in SerializeNVVMTarget.cpp (NFC)


  Commit: 0d12628d06b8ab37157faea474548735ddb7eeb2
      https://github.com/llvm/llvm-project/commit/0d12628d06b8ab37157faea474548735ddb7eeb2
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp

  Log Message:
  -----------
  Apply clang-tidy fixes for readability-container-size-empty in SerializeNVVMTarget.cpp (NFC)


  Commit: 1eeeab82c6eb185f5139e633a59c2dbcb15616e4
      https://github.com/llvm/llvm-project/commit/1eeeab82c6eb185f5139e633a59c2dbcb15616e4
  Author: Jordan Rupprecht <rupprecht at google.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M lldb/test/API/commands/expression/call-throws/TestCallThatThrows.py
    M lldb/test/API/commands/expression/dont_allow_jit/TestAllowJIT.py
    M lldb/test/API/commands/statistics/basic/TestStats.py
    M lldb/test/API/commands/trace/TestTraceSave.py
    M lldb/test/API/functionalities/breakpoint/address_breakpoints/TestBadAddressBreakpoints.py
    M lldb/test/API/functionalities/breakpoint/breakpoint_command/TestBreakpointCommand.py
    M lldb/test/API/functionalities/breakpoint/breakpoint_names/TestBreakpointNames.py
    M lldb/test/API/functionalities/gdb_remote_client/TestJLink6Armv7RegisterDefinition.py
    M lldb/test/API/functionalities/module_cache/simple_exe/TestModuleCacheSimple.py
    M lldb/test/API/functionalities/stats_api/TestStatisticsAPI.py
    M lldb/test/API/functionalities/thread/backtrace_limit/TestBacktraceLimit.py
    M lldb/test/API/macosx/arm-corefile-regctx/TestArmMachoCorefileRegctx.py
    M lldb/test/API/macosx/lc-note/addrable-bits/TestAddrableBitsCorefile.py
    M lldb/test/API/macosx/lc-note/firmware-corefile/TestFirmwareCorefiles.py
    M lldb/test/API/macosx/lc-note/kern-ver-str/TestKernVerStrLCNOTE.py
    M lldb/test/API/macosx/lc-note/multiple-binary-corefile/TestMultipleBinaryCorefile.py
    M lldb/test/API/macosx/queues/TestQueues.py
    M lldb/test/API/macosx/safe-to-func-call/TestSafeFuncCalls.py
    M lldb/test/API/python_api/interpreter/TestRunCommandInterpreterAPI.py

  Log Message:
  -----------
  [lldb][test] Modernize assertEqual(value, bool) (#82526)

Any time we see the pattern `assertEqual(value, bool)`, we can replace
that with `assert<bool>(value)`. Likewise for `assertNotEqual`.

Technically this relaxes the test a bit, as we may want to make sure
`value` is either `True` or `False`, and not something that implicitly
converts to a bool. For example, `assertEqual("foo", True)` will fail,
but `assertTrue("foo")` will not. In most cases, this distinction is not
important.

There are two such places that this patch does **not** transform, since
it seems intentional that we want the result to be a bool:
*
https://github.com/llvm/llvm-project/blob/5daf2001a1e4d71ce1273a1e7e31cf6e6ac37c10/lldb/test/API/python_api/sbstructureddata/TestStructuredDataAPI.py#L90
*
https://github.com/llvm/llvm-project/blob/5daf2001a1e4d71ce1273a1e7e31cf6e6ac37c10/lldb/test/API/commands/settings/TestSettings.py#L940

Followup to 9c2468821ec51defd09c246fea4a47886fff8c01. I patched `teyit`
with a `visit_assertEqual` node handler to generate this.


  Commit: 11d115d0569b212dfeb7fe6485be48070e068e19
      https://github.com/llvm/llvm-project/commit/11d115d0569b212dfeb7fe6485be48070e068e19
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll

  Log Message:
  -----------
  [RISCV] Adjust test case to show wrong stride. NFC

See https://github.com/llvm/llvm-project/pull/82506#discussion_r1498080785


  Commit: 7e1432f1258e229a4fcc9c017937166f0578e1f8
      https://github.com/llvm/llvm-project/commit/7e1432f1258e229a4fcc9c017937166f0578e1f8
  Author: Alex Langford <alangford at apple.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M lldb/include/lldb/Interpreter/Options.h
    M lldb/source/Commands/CommandObjectBreakpoint.cpp
    M lldb/source/Interpreter/Options.cpp
    M lldb/unittests/Interpreter/CMakeLists.txt
    A lldb/unittests/Interpreter/TestOptions.cpp

  Log Message:
  -----------
  [lldb] Standardize command option parsing error messages (#82273)

I have been looking to simplify parsing logic and improve the interfaces
so that they are both easier to use and harder to abuse. To be specific,
I am referring to functions such as `OptionArgParser::ToBoolean`: I
would like to go from its current interface to something more like
`llvm::Error<bool> ToBoolean(llvm::StringRef option_arg)`.

Through working on that, I encountered 2 inconveniences:
1. Option parsing code is not uniform. Every function writes a slightly
different error message, so incorporating an error message from the
`ToBoolean` implementation is going to be laborious as I figure out what
exactly needs to change or stay the same.
2. Changing the interface of `ToBoolean` would require a global atomic
change across all of the Command code. This would be quite frustrating
to do because of the non-uniformity of our existing code.

To address these frustrations, I think it would be easiest to first
standardize the error reporting mechanism when parsing options in
commands. I do so by introducing `CreateOptionParsingError` which will
create an error message of the shape:
Invalid value ('${option_arg}') for -${short_value} ('${long_value}'):
${additional_context}

Concretely, it would look something like this:
(lldb) breakpoint set -n main -G yay
error: Invalid value ('yay') for -G (auto-continue): Failed to parse as
boolean

After this, updating the interfaces for parsing the values themselves
should become simpler. Because this can be adopted incrementally, this
should be able to done over the course of time instead of all at once as
a giant difficult-to-review change. I've changed exactly one function
where this function would be used as an illustration of what I am
proposing.


  Commit: 05af9c83f3a0d154f73d619ac1361eae05531e5e
      https://github.com/llvm/llvm-project/commit/05af9c83f3a0d154f73d619ac1361eae05531e5e
  Author: Jason Eckhardt <jeckhardt at nvidia.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    A llvm/test/TableGen/HwModeEncodeDecode2.td
    M llvm/utils/TableGen/DecoderEmitter.cpp
    M llvm/utils/TableGen/DisassemblerEmitter.cpp

  Log Message:
  -----------
  [TableGen] Suppress per-HwMode duplicate instructions/tables. (#82567)

Currently, for per-HwMode encoding/decoding, those instructions that do
not have a HwMode override are duplicated into the decoder tables for
all HwModes. This includes inducing multiple tables for instructions
that are otherwise unrelated (e.g., different namespace with no
overrides at all).

This patch adds support to suppress instruction and table duplicates.
TableGen option "-gen-disassembler --suppress-per-hwmode-duplicates"
enables the suppression (off by default).

For one downstream backend with a complicated ISA and major
cross-generation encoding differences, this eliminates ~32000 duplicate
table entries at the time of this patch.

There are legitimate reasons to suppress or not suppress duplicates. If
there are relatively few non-overridden related instructions, it can be
convenient to pull them into the per-mode tables (only need to decode
the per-mode tables, slightly simpler decode function in disassembler).
On the other hand, in some backends, the opposite is true or the size is
too large to tolerate any duplication in the first place. We let the
user decide which makes sense.

This is currently off by default, though there is no reason it couldn't
be enabled by default. Any existing backends downstream using the
per-HwMode feature will function as before. Turning on the feature
requires minor modifications to their disassembler due to more/less
tables and naming.


  Commit: 815644b4dd882ade2e5649d4f97c3dd6f7aea200
      https://github.com/llvm/llvm-project/commit/815644b4dd882ade2e5649d4f97c3dd6f7aea200
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll

  Log Message:
  -----------
  [RISCV] Fix mgather -> riscv.masked.strided.load combine not extending indices (#82506)

This fixes the miscompile reported in #82430 by telling
isSimpleVIDSequence to sign extend to XLen instead of the width of the
indices, since the "sequence" of indices generated by a strided load
will be at XLen.

This was the simplest way I could think of getting isSimpleVIDSequence
to treat the indexes as if they were zero extended to XLenVT.

Another way we could do this is by refactoring out the "get constant
integers" part from isSimpleVIDSequence and handle them as APInts so we
can separately zero extend it.

Fixes #82430


  Commit: db7e9e68411de074dee78c92657e983da4b89500
      https://github.com/llvm/llvm-project/commit/db7e9e68411de074dee78c92657e983da4b89500
  Author: Mingming Liu <mingmingl at google.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M compiler-rt/include/profile/InstrProfData.inc
    M compiler-rt/lib/profile/InstrProfiling.h
    M compiler-rt/lib/profile/InstrProfilingBuffer.c
    M compiler-rt/lib/profile/InstrProfilingInternal.h
    M compiler-rt/lib/profile/InstrProfilingMerge.c
    M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
    M compiler-rt/lib/profile/InstrProfilingWriter.c
    M compiler-rt/test/profile/instrprof-write-buffer-internal.c
    M llvm/include/llvm/ProfileData/InstrProf.h
    M llvm/include/llvm/ProfileData/InstrProfData.inc
    M llvm/include/llvm/ProfileData/InstrProfReader.h
    M llvm/lib/ProfileData/InstrProf.cpp
    M llvm/lib/ProfileData/InstrProfReader.cpp
    M llvm/lib/ProfileData/InstrProfWriter.cpp
    M llvm/test/Instrumentation/InstrProfiling/coverage.ll
    M llvm/test/Transforms/PGOProfile/Inputs/thinlto_indirect_call_promotion.profraw
    M llvm/test/Transforms/PGOProfile/comdat_internal.ll
    M llvm/test/tools/llvm-profdata/Inputs/c-general.profraw
    M llvm/test/tools/llvm-profdata/Inputs/compressed.profraw
    A llvm/test/tools/llvm-profdata/Inputs/thinlto_indirect_call_promotion.profraw
    M llvm/test/tools/llvm-profdata/binary-ids-padding.test
    M llvm/test/tools/llvm-profdata/large-binary-id-size.test
    M llvm/test/tools/llvm-profdata/malformed-not-space-for-another-header.test
    M llvm/test/tools/llvm-profdata/malformed-num-counters-zero.test
    M llvm/test/tools/llvm-profdata/malformed-ptr-to-counter-array.test
    M llvm/test/tools/llvm-profdata/misaligned-binary-ids-size.test
    M llvm/test/tools/llvm-profdata/mismatched-raw-profile-header.test
    M llvm/test/tools/llvm-profdata/raw-32-bits-be.test
    M llvm/test/tools/llvm-profdata/raw-32-bits-le.test
    M llvm/test/tools/llvm-profdata/raw-64-bits-be.test
    M llvm/test/tools/llvm-profdata/raw-64-bits-le.test
    M llvm/test/tools/llvm-profdata/raw-two-profiles.test

  Log Message:
  -----------
  [TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling. (#81691)

* Raw profile format
- Header: records the byte size of compressed vtable names, and the
number of profiled vtable entries (call it `VTableProfData`). Header
also records padded bytes of each section.
- Payload: adds a section for compressed vtable names, and a section to
store `VTableProfData`. Both sections are padded so the size is a
multiple of 8.
* Indexed profile format
  - Header: records the byte offset of compressed vtable names.
- Payload: adds a section to store compressed vtable names. This section
is used by `llvm-profdata` to show the list of vtables profiled for an
instrumented site.
  
[The originally reviewed
patch](https://github.com/llvm/llvm-project/pull/66825) will have
profile reader/write change and llvm-profdata change.
- To ensure this PR has all the necessary profile format change along
with profile version bump, created a copy of the originally reviewed
patch in https://github.com/llvm/llvm-project/pull/80761. The copy
doesn't have profile format change, but it has the set of tests which
covers type profile generation, profile read and profile merge. Tests
pass there.
  
rfc in
https://discourse.llvm.org/t/rfc-dynamic-type-profiling-and-optimizations-in-llvm/74600

---------

Co-authored-by: modiking <modiking213 at gmail.com>


  Commit: 4d73cbe863886add6742a8ebd00d19c1cab11095
      https://github.com/llvm/llvm-project/commit/4d73cbe863886add6742a8ebd00d19c1cab11095
  Author: Mingming Liu <mingmingl at google.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M llvm/lib/ProfileData/InstrProfWriter.cpp

  Log Message:
  -----------
  [nfc]remove unused variable after pr/81691 (#82578)

* `N` became unused after [pull request 81691](https://github.com/llvm/llvm-project/pull/81691)
* This should fix the build bot failure of `unused variable`
https://lab.llvm.org/buildbot/#/builders/77/builds/34840


  Commit: 0e8d1877cd145719b7acb707539287b7b877a555
      https://github.com/llvm/llvm-project/commit/0e8d1877cd145719b7acb707539287b7b877a555
  Author: Mingming Liu <mingmingl at google.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M compiler-rt/include/profile/InstrProfData.inc
    M compiler-rt/lib/profile/InstrProfiling.h
    M compiler-rt/lib/profile/InstrProfilingBuffer.c
    M compiler-rt/lib/profile/InstrProfilingInternal.h
    M compiler-rt/lib/profile/InstrProfilingMerge.c
    M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
    M compiler-rt/lib/profile/InstrProfilingWriter.c
    M compiler-rt/test/profile/instrprof-write-buffer-internal.c
    M llvm/include/llvm/ProfileData/InstrProf.h
    M llvm/include/llvm/ProfileData/InstrProfData.inc
    M llvm/include/llvm/ProfileData/InstrProfReader.h
    M llvm/lib/ProfileData/InstrProf.cpp
    M llvm/lib/ProfileData/InstrProfReader.cpp
    M llvm/lib/ProfileData/InstrProfWriter.cpp
    M llvm/test/Instrumentation/InstrProfiling/coverage.ll
    M llvm/test/Transforms/PGOProfile/Inputs/thinlto_indirect_call_promotion.profraw
    M llvm/test/Transforms/PGOProfile/comdat_internal.ll
    M llvm/test/tools/llvm-profdata/Inputs/c-general.profraw
    M llvm/test/tools/llvm-profdata/Inputs/compressed.profraw
    R llvm/test/tools/llvm-profdata/Inputs/thinlto_indirect_call_promotion.profraw
    M llvm/test/tools/llvm-profdata/binary-ids-padding.test
    M llvm/test/tools/llvm-profdata/large-binary-id-size.test
    M llvm/test/tools/llvm-profdata/malformed-not-space-for-another-header.test
    M llvm/test/tools/llvm-profdata/malformed-num-counters-zero.test
    M llvm/test/tools/llvm-profdata/malformed-ptr-to-counter-array.test
    M llvm/test/tools/llvm-profdata/misaligned-binary-ids-size.test
    M llvm/test/tools/llvm-profdata/mismatched-raw-profile-header.test
    M llvm/test/tools/llvm-profdata/raw-32-bits-be.test
    M llvm/test/tools/llvm-profdata/raw-32-bits-le.test
    M llvm/test/tools/llvm-profdata/raw-64-bits-be.test
    M llvm/test/tools/llvm-profdata/raw-64-bits-le.test
    M llvm/test/tools/llvm-profdata/raw-two-profiles.test

  Log Message:
  -----------
  Revert type profiling change as compiler-rt test break on Windows. (#82583)

Examples
https://lab.llvm.org/buildbot/#/builders/127/builds/62532/steps/8/logs/stdio


  Commit: 386aa7b16977150da917a78423fd05cb19609850
      https://github.com/llvm/llvm-project/commit/386aa7b16977150da917a78423fd05cb19609850
  Author: Diego Caballero <diegocaballero at google.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
    M mlir/test/Dialect/Vector/vector-rewrite-narrow-types.mlir

  Log Message:
  -----------
  [mlir][Vector] Replace `vector.shuffle` with `vector.interleave` in vector narrow type emulation (#82550)

This PR replaces the generation of `vector.shuffle` with
`vector.interleave` in the i4 conversions in vector narrow type
emulation. The multi dimensional semantics of `vector.interleave` allow
us to enable these conversion emulations also for multi dimensional
vectors.


  Commit: 675791335285fa86434dc46e5c92f543e0e79d19
      https://github.com/llvm/llvm-project/commit/675791335285fa86434dc46e5c92f543e0e79d19
  Author: Jordan Rupprecht <rupprecht at google.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M lldb/unittests/ScriptInterpreter/Python/PythonDataObjectsTests.cpp

  Log Message:
  -----------
  [lldb][test] Fix PythonDataObjectsTest

This is using `FileSystem::Instance()` w/o calling `FileSystem::Initialize()`. Use `SubsystemRAII` to do that.


  Commit: 6676f67e3103bb6779d226de6bb4f0f8f8ab99f2
      https://github.com/llvm/llvm-project/commit/6676f67e3103bb6779d226de6bb4f0f8f8ab99f2
  Author: Adrian Kuegel <akuegel at google.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  [mlir][Bazel] Remove stub target which is not needed anymore.


  Commit: bc1c86b810e518a8e3fa90d5c26908c43788873d
      https://github.com/llvm/llvm-project/commit/bc1c86b810e518a8e3fa90d5c26908c43788873d
  Author: Adrian Kuegel <akuegel at google.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  [mlir][Bazel] Also remove SerializeToCubin target.


  Commit: 7e97ae35ae2d1c38d149e670139a538bdba86e93
      https://github.com/llvm/llvm-project/commit/7e97ae35ae2d1c38d149e670139a538bdba86e93
  Author: Yeting Kuo <46629943+yetingk at users.noreply.github.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    M llvm/test/CodeGen/RISCV/make-compressible.mir

  Log Message:
  -----------
  [RISCV] Teach RISCVMakeCompressible handle Zca/Zcf/Zce/Zcd. (#81844)

Make targets which don't have C but have Zca/Zcf/Zce/Zcd benefit from
this pass.


  Commit: edd4aee4dd9b5b98b2576a6f783e4086173d902a
      https://github.com/llvm/llvm-project/commit/edd4aee4dd9b5b98b2576a6f783e4086173d902a
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp

  Log Message:
  -----------
  [RISCV] Compute integers once in isSimpleVIDSequence. NFCI (#82590)

We need to iterate through the integers twice in isSimpleVIDSequence, so
instead of computing them twice just compute them once at the start.

This also replaces the individual checks that each element is constant
with a single call to BuildVectorSDNode::isConstant.


  Commit: e899641df2391179e8ec29ca14c53b09ae7ce85c
      https://github.com/llvm/llvm-project/commit/e899641df2391179e8ec29ca14c53b09ae7ce85c
  Author: martinboehme <mboehme at google.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/lib/Analysis/FlowSensitive/ControlFlowContext.cpp
    M clang/unittests/Analysis/FlowSensitive/TypeErasedDataflowAnalysisTest.cpp

  Log Message:
  -----------
  [clang][dataflow] Fix inaccuracies in `buildStmtToBasicBlockMap()`. (#82496)

See the comments added to the code for details on the inaccuracies that
have
now been fixed.

The patch adds tests that fail with the old implementation.


  Commit: 8bd327d6fed5a4ae99bdbd039f5503700030cf53
      https://github.com/llvm/llvm-project/commit/8bd327d6fed5a4ae99bdbd039f5503700030cf53
  Author: Nick Anderson <nickleus27 at gmail.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
    M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
    A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fdiv-sqrt-to-rsq.mir

  Log Message:
  -----------
  [AMDGPU][GlobalISel] Add fdiv / sqrt to rsq combine (#78673)

Fixes #64743


  Commit: fde344aef20bc4280f01294ac6e14a5c2db2d572
      https://github.com/llvm/llvm-project/commit/fde344aef20bc4280f01294ac6e14a5c2db2d572
  Author: Matthias Springer <me at m-sp.org>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M mlir/include/mlir/Transforms/DialectConversion.h
    M mlir/lib/Transforms/Utils/DialectConversion.cpp

  Log Message:
  -----------
  [mlir][Transforms] Dialect conversion: Improve signature conversion API (#81997)

This commit improves the block signature conversion API of the dialect
conversion.

There is the following comment in
`ArgConverter::applySignatureConversion`:
```
// If no arguments are being changed or added, there is nothing to do.
```

However, the implementation actually used to replace a block with a new
block even if the block argument types do not change (i.e., there is
"nothing to do"). This is fixed in this commit. The documentation of the
public `ConversionPatternRewriter` API is updated accordingly.

This commit also removes a check that used to *sometimes* skip a block
signature conversion if the block was already converted. This is not
consistent with the public `ConversionPatternRewriter` API; blocks
should always be converted, regardless of whether they were already
converted or not.

Block signature conversion also used to be silently skipped when the
specified block was detached. Instead of silently skipping, an assertion
is triggered. Attempting to convert a detached block (which is likely an
erased block) is invalid API usage.


  Commit: 25e7e8d993f12f391ad90d23b5c3e2385ebafc81
      https://github.com/llvm/llvm-project/commit/25e7e8d993f12f391ad90d23b5c3e2385ebafc81
  Author: Antonio Frighetto <me at antoniofrighetto.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/CodeGen/CodeGenPrepare.cpp
    M llvm/test/CodeGen/AArch64/addsub.ll
    M llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll
    M llvm/test/CodeGen/RISCV/pr51206.ll
    M llvm/test/CodeGen/X86/tailcall-cgp-dup.ll

  Log Message:
  -----------
  [CGP] Permit tail call optimization on undefined return value

We may freely allow tail call optzs on undef values as well.

Fixes: https://github.com/llvm/llvm-project/issues/82387.


  Commit: c5253aa136ac6ba683b367b2bae0dde1a543d1df
      https://github.com/llvm/llvm-project/commit/c5253aa136ac6ba683b367b2bae0dde1a543d1df
  Author: CarolineConcatto <caroline.concatto at arm.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/test/CodeGen/AArch64/framelayout-sve-calleesaves-fix.mir
    M llvm/test/CodeGen/AArch64/framelayout-sve.mir
    M llvm/test/CodeGen/AArch64/sme-streaming-compatible-interface.ll
    M llvm/test/CodeGen/AArch64/sme-streaming-interface.ll
    M llvm/test/CodeGen/AArch64/sme2-intrinsics-ld1.ll
    M llvm/test/CodeGen/AArch64/sme2-intrinsics-ldnt1.ll
    M llvm/test/CodeGen/AArch64/stack-probing-sve.ll
    M llvm/test/CodeGen/AArch64/sve-alloca.ll
    M llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
    M llvm/test/CodeGen/AArch64/sve-tailcall.ll
    M llvm/test/CodeGen/AArch64/unwind-preserved.ll

  Log Message:
  -----------
  [AArch64] Restore Z-registers before P-registers (#79623) (#82492)

This is needed by PR#77665[1] that uses a P-register while restoring
Z-registers.

The reverse for SVE register restore in the epilogue was added to
guarantee performance, but further work was done to improve sve frame
restore and besides that the schedule also may change the order of the
restore, undoing the reverse restore.

This also fix the problem reported in (PR #79623) on Windows with
std::reverse and .base().

[1]https://github.com/llvm/llvm-project/pull/77665


  Commit: 55558cd05c998f1b287b0af97aa6db0db0bdfaa0
      https://github.com/llvm/llvm-project/commit/55558cd05c998f1b287b0af97aa6db0db0bdfaa0
  Author: Matthias Springer <me at m-sp.org>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M mlir/lib/Transforms/Utils/DialectConversion.cpp

  Log Message:
  -----------
  [mlir][Transforms][NFC] Turn block type conversion into `IRRewrite` (#81756)

This commit is a refactoring of the dialect conversion. The dialect
conversion maintains a list of "IR rewrites" that can be committed (upon
success) or rolled back (upon failure).

Until now, the signature conversion of a block was only a "partial" IR
rewrite. Rollbacks were triggered via
`BlockTypeConversionRewrite::rollback`, but there was no
`BlockTypeConversionRewrite::commit` equivalent.

Overview of changes:
* Remove `ArgConverter`, an internal helper class that kept track of all
block type conversions. There is now a separate
`BlockTypeConversionRewrite` for each block type conversion.
* No more special handling for block type conversions. They are now
normal "IR rewrites", just like "block creation" or "block movement". In
particular, trigger "commits" of block type conversion via
`BlockTypeConversionRewrite::commit`.
* Remove `ArgConverter::notifyOpRemoved`. This function was used to
inform the `ArgConverter` that an operation was erased, to prevent a
double-free of operations in certain situations. It would be unpractical
to add a `notifyOpRemoved` API to `IRRewrite`. Instead, erasing
ops/block should go through a new `SingleEraseRewriter` (that is owned
by the `ConversionPatternRewriterImpl`) if there is chance of
double-free. This rewriter ignores `eraseOp`/`eraseBlock` if the
op/block was already freed.


  Commit: fddf23c6f4478fc39b0077538d288082f983ce80
      https://github.com/llvm/llvm-project/commit/fddf23c6f4478fc39b0077538d288082f983ce80
  Author: Vyacheslav Levytskyy <89994100+VyacheslavLevytskyy at users.noreply.github.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
    M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
    M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
    M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
    M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
    A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_subgroup_rotate/subgroup-rotate.ll

  Log Message:
  -----------
  [SPIRV] Add support for the SPV_KHR_subgroup_rotate extension (#82374)

This PR adds support for the SPV_KHR_subgroup_rotate extension that
enables rotating values across invocations within a subgroup:
*
https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/KHR/SPV_KHR_subgroup_rotate.asciidoc


  Commit: 6cca23a3b91e12c0b6639449bc1e5eb564067db3
      https://github.com/llvm/llvm-project/commit/6cca23a3b91e12c0b6639449bc1e5eb564067db3
  Author: Vyacheslav Levytskyy <89994100+VyacheslavLevytskyy at users.noreply.github.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/SPIRV/SPIRVISelLowering.h
    A llvm/test/CodeGen/SPIRV/switch-no-jump-table.ll

  Log Message:
  -----------
  [SPIRV] Prevent creation of jump tables from switch (#82287)

This PR is to prevent creation of jump tables from switch. The reason is
that SPIR-V doesn't know how to lower jump tables, and a sequence of
commands that IRTranslator generates for switch via jump tables breaks
SPIR-V Backend code generation with complains to G_BRJT. The next
example is the shortest code to break SPIR-V Backend code generation in
this way:

```
target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
target triple = "spir64-unknown-unknown"

define spir_func void @foo(i32 noundef %val) {
entry:
  switch i32 %val, label %sw.epilog [
    i32 0, label %sw.bb
    i32 1, label %sw.bb2
    i32 2, label %sw.bb3
    i32 3, label %sw.bb4
  ]
sw.bb:
  br label %sw.epilog
sw.bb2:
  br label %sw.epilog
sw.bb3:
  br label %sw.epilog
sw.bb4:
  br label %sw.epilog
sw.epilog:
  ret void
}
```

To resolve the issue we set a high lower limit for number of blocks in a
jump table via getMinimumJumpTableEntries() and prevent undesirable (or
rather unsupported at the moment) path of code generation.


  Commit: bcbffd99c48ed0cabd1b94e9ff252680f0968fc3
      https://github.com/llvm/llvm-project/commit/bcbffd99c48ed0cabd1b94e9ff252680f0968fc3
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/lib/Target/AMDGPU/VOP1Instructions.td
    M llvm/lib/Target/AMDGPU/VOP2Instructions.td
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
    M llvm/lib/Target/AMDGPU/VOPCInstructions.td

  Log Message:
  -----------
  [AMDGPU] Split Dpp8FI and Dpp16FI operands (#82379)

Split Dpp8FI and Dpp16FI into two different operands sharing an
AsmOperandClass. They are parsed and rendered identically as fi:1 but
the encoding is different: for DPP16 FI is a single bit, but for DPP8 it
uses two different special values in the src0 field. Having a dedicated
decoder for Dpp8FI allows it to reject other (non-special) src0 values
so that AMDGPUDisassembler::getInstruction no longer needs to call
isValidDPP8 to do post hoc validation of decoded DPP8 instructions.


  Commit: 6193233540e55de61baeb80208b06c6808b14dbc
      https://github.com/llvm/llvm-project/commit/6193233540e55de61baeb80208b06c6808b14dbc
  Author: Yury Gribov <tetra2005 at gmail.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SchedTSV110.td
    A llvm/test/tools/llvm-mca/AArch64/HiSilicon/tsv110-forwarding.s

  Log Message:
  -----------
  [AArch64] Fix sched model for TSV110 core. (#82343)

Accumulator operand of MADD instruction can be bypassed from another
MUL-like operation. Before this fix bypassing was incorrectly applied to
multiplier operand.

Co-authored-by: Yury Gribov <gribov.yuri at huawei.com>


  Commit: 4a602d9250e1eb3c729d0421d11be2be8693cbf2
      https://github.com/llvm/llvm-project/commit/4a602d9250e1eb3c729d0421d11be2be8693cbf2
  Author: Vyacheslav Levytskyy <89994100+VyacheslavLevytskyy at users.noreply.github.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
    M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
    M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
    M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
    M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
    M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
    M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
    M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
    M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
    M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
    M llvm/lib/Target/SPIRV/SPIRVUtils.h
    A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_usm_storage_classes/intel-usm-addrspaces.ll

  Log Message:
  -----------
  Add support for the SPV_INTEL_usm_storage_classes extension (#82247)

Add support for the SPV_INTEL_usm_storage_classes extension:
*
https://github.com/intel/llvm/blob/sycl/sycl/doc/design/spirv-extensions/SPV_INTEL_usm_storage_classes.asciidoc


  Commit: f01719afaae9a208ac272d99760d18e4c16d9241
      https://github.com/llvm/llvm-project/commit/f01719afaae9a208ac272d99760d18e4c16d9241
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    A mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-scalable-interleave.mlir
    A mlir/test/Integration/Dialect/Vector/CPU/test-interleave.mlir

  Log Message:
  -----------
  [mlir][test] Add integration tests for vector.interleave (#80969)


  Commit: e4d4ebe0415b9f1fd8cb034ac68f0616f12facf2
      https://github.com/llvm/llvm-project/commit/e4d4ebe0415b9f1fd8cb034ac68f0616f12facf2
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/test/ExecutionEngine/JITLink/Generic/sectcreate.test

  Log Message:
  -----------
  [llvm][llvm-jitlink] Disable test on Windows on Arm

This fails on one of our bots:
https://lab.llvm.org/buildbot/#/builders/120/builds/6309

llvm-jitlink error: Unsupported target machine architecture in COFF object

The other bot doesn't run the test at all it seems but I can't explain
why. It's also possible that I'm mistaken and the mostly native but still
"cross compiling" setup we have on WoA means an x86 object is produced sometimes
(perhaps because a default triple is still x86).


  Commit: b9ce237980b5a636e87e3578609c812833f7537f
      https://github.com/llvm/llvm-project/commit/b9ce237980b5a636e87e3578609c812833f7537f
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp

  Log Message:
  -----------
  [AMDGPU] Clean up conversion of DPP instructions in AMDGPUDisassembler (#82480)

Convert DPP instructions after all calls to tryDecodeInst, just like we
do for all other instruction types. NFCI.


  Commit: 4f12f47550eee85447c9ec37d27a20c6593d3d40
      https://github.com/llvm/llvm-project/commit/4f12f47550eee85447c9ec37d27a20c6593d3d40
  Author: Harald van Dijk <harald at gigawatt.nl>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/test/CodeGen/AArch64/strictfp_f16_abi_promote.ll

  Log Message:
  -----------
  [AArch64] Switch to soft promoting half types. (#80576)

The traditional promotion is known to generate wrong code.

Like #80440 for ARM, except that far less is affected as on AArch64,
hardware floating point support always includes FP16 support and is
unaffected by these changes. This only affects `-mgeneral-regs-only`
(Clang) / `-mattr=-fp-armv8` (LLVM).

Because this only affects a configuration where no FP support is
available at all, `useFPRegsForHalfType()` has no effect and is not
specified: `f32` was getting legalized as a parameter and return type to
an integer anyway.


  Commit: 3b7d43301e3662da4197cef7948c18fab850d9c4
      https://github.com/llvm/llvm-project/commit/3b7d43301e3662da4197cef7948c18fab850d9c4
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
    M llvm/lib/Target/AMDGPU/VOP1Instructions.td
    M llvm/lib/Target/AMDGPU/VOP2Instructions.td
    M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
    M llvm/lib/Target/AMDGPU/VOPCInstructions.td
    M llvm/lib/Target/AMDGPU/VOPInstructions.td

  Log Message:
  -----------
  [AMDGPU] Remove DPP DecoderNamespaces. NFC. (#82491)

Now that there is no special checking for valid DPP encodings, these
instructions can use the same DecoderNamespace as other 64- or 96-bit
instructions.

Also clean up setting DecoderNamespace: in most cases it should be set
as a pair with AssemblerPredicate.


  Commit: f17e4151423a798c18533080fe7f8a3e922d7312
      https://github.com/llvm/llvm-project/commit/f17e4151423a798c18533080fe7f8a3e922d7312
  Author: Billy Laws <blaws05 at gmail.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
    M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
    M llvm/test/CodeGen/AArch64/arm64ec-entry-thunks-local-linkage.ll

  Log Message:
  -----------
  [AArch64] Mangle names of all ARM64EC functions with entry thunks (#80996)

This better matches MSVC output in cases where static functions have their addresses taken.


  Commit: 1f99a450127c2404d4f9b8ac24acdb17823c988b
      https://github.com/llvm/llvm-project/commit/1f99a450127c2404d4f9b8ac24acdb17823c988b
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    R llvm/test/CodeGen/AArch64/reverse-csr-restore-seq.mir

  Log Message:
  -----------
  [AArch64] Remove unused ReverseCSRRestoreSeq option. (#82326)

This patch removes the `-reverse-csr-restore-seq` option from
AArch64FrameLowering, since this is no longer used.

This patch was reverted because of a crash in PR#79623.
Merging it back as it was fixed in PR#82492.


  Commit: 4235e44d4c37ca738c74def05da8caf124d2464e
      https://github.com/llvm/llvm-project/commit/4235e44d4c37ca738c74def05da8caf124d2464e
  Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/Utils.cpp
    A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-extract-vector-load.mir

  Log Message:
  -----------
  [GlobalISel] Constant-fold G_PTR_ADD with different type sizes (#81473)

All other opcodes in the list are constrained to have the same type on
both operands, but not G_PTR_ADD.

Fixes  #81464


  Commit: 3ef63a71adb7fd1c792fd61d00c74159fcef9a2f
      https://github.com/llvm/llvm-project/commit/3ef63a71adb7fd1c792fd61d00c74159fcef9a2f
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
    M llvm/test/Transforms/CorrelatedValuePropagation/min-max.ll

  Log Message:
  -----------
  [CVP] Refactor `processMinMaxIntrinsic` to check non-strict predicate in both directions (#82596)

This patch uses `getConstantRangeAtUse` in `processMinMaxIntrinsic` to
address the comment
https://github.com/llvm/llvm-project/pull/82478#discussion_r1497300920.
After this patch we can reuse the range result in
https://github.com/llvm/llvm-project/pull/82478.


  Commit: c831d83bb17caa3a8f137052559cb6c54b21b7c1
      https://github.com/llvm/llvm-project/commit/c831d83bb17caa3a8f137052559cb6c54b21b7c1
  Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
    A llvm/test/Transforms/InferAddressSpaces/AMDGPU/multiple-uses-of-val.ll

  Log Message:
  -----------
  [InferAddrSpaces] Correctly replace identical operands of insts (#82610)

It's important for PHI nodes because if a PHI node has multiple edges
coming from the same block, we can have the same incoming value multiple
times in the list of incoming values. All of those need to be consistent
(exact same Value*) otherwise verifier complains.

Fixes SWDEV-445797


  Commit: 73c646a3b27293f8cb4ba120de7bc01c223b4b5f
      https://github.com/llvm/llvm-project/commit/73c646a3b27293f8cb4ba120de7bc01c223b4b5f
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M flang/lib/Evaluate/fold-integer.cpp

  Log Message:
  -----------
  [flang] Fix warning when with clang-cl/msvc

\llvm\flang\lib\Evaluate\fold-integer.cpp(705,35): warning: lambda capture 'FromInt64' is not used [-Wunused-lambda-capture]

It is intentionally unused.


  Commit: 18f116651af0e328e6f9f6b0619171bd8a2c4817
      https://github.com/llvm/llvm-project/commit/18f116651af0e328e6f9f6b0619171bd8a2c4817
  Author: pwprzybyla <121295298+pwprzybyla at users.noreply.github.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/include/clang/Driver/ToolChain.h
    M clang/lib/Driver/ToolChain.cpp

  Log Message:
  -----------
  Multilib support for libraries with exceptions (#75031)

For better multilib matching explicitly match -fno-rtti and -fno-exceptions


  Commit: b47f63d3c8fedf7c98b7f58e892e784fddee4601
      https://github.com/llvm/llvm-project/commit/b47f63d3c8fedf7c98b7f58e892e784fddee4601
  Author: Sam Tebbs <samuel.tebbs at arm.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/include/clang/Basic/DiagnosticFrontendKinds.td
    M clang/lib/CodeGen/Targets/AArch64.cpp
    A clang/test/CodeGen/aarch64-sme-inline-streaming-attrs.c

  Log Message:
  -----------
  [Clang][SME] Detect always_inline used with mismatched streaming attributes (#77936)

This patch adds an error that is emitted when a streaming function is
marked as always_inline and is called from a non-streaming function.


  Commit: fa8a21144ec9a6836e9bf1e3bf5cd0b2f058209e
      https://github.com/llvm/llvm-project/commit/fa8a21144ec9a6836e9bf1e3bf5cd0b2f058209e
  Author: NagyDonat <donat.nagy at ericsson.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SValBuilder.h
    M clang/lib/StaticAnalyzer/Checkers/ArrayBoundCheckerV2.cpp
    M clang/test/Analysis/out-of-bounds.c

  Log Message:
  -----------
  [analyzer] Improve handling of unsigned values in ArrayBoundCheckerV2 (#81034)

A memory access is an out of bounds error if the offset is < the extent
of the memory region. Notice that here "<" is a _mathematical_
comparison between two numbers and NOT a C/C++ operator that compares
two typed C++ values: for example -1 < 1000 is true in mathematics, but
if the `-1` is an `int` and the `1000` is a `size_t` value, then
evaluating the C/C++ operator `<` will return false because the `-1`
will be converted to `SIZE_MAX` by the automatic type conversions.

This means that it's incorrect to perform a bounds check with
`evalBinOpNN(State, BO_LT, ...)` which performs automatic conversions
and can produce wildly incorrect results.

ArrayBoundsCheckerV2 already had a special case where it avoided calling
`evalBinOpNN` in a situation where it would have performed an automatic
conversion; this commit replaces that code with a more general one that
covers more situations. (It's still not perfect, but it's better than
the previous version and I think it will cover practically all
real-world code.)

Note that this is not a limitation/bug of the simplification algorithm
defined in `getSimplifedOffsets()`: the simplification is not applied in
the test case `test_comparison_with_extent_symbol` (because the `Extent`
is not a concrete int), but without the new code it would still run into
a `-1 < UNSIGNED` comparison that evaluates to false because
`evalBinOpNN` performs an automatic type conversion.


  Commit: afa8a2eed0c4ca61ac19abd88022e63e58408af1
      https://github.com/llvm/llvm-project/commit/afa8a2eed0c4ca61ac19abd88022e63e58408af1
  Author: NagyDonat <donat.nagy at ericsson.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/lib/StaticAnalyzer/Checkers/ErrnoChecker.cpp
    M clang/lib/StaticAnalyzer/Checkers/TaggedUnionModeling.h

  Log Message:
  -----------
  [analyzer] Remove superfluous #include "CallDescription.h" (NFC) (#82614)

To fix https://github.com/llvm/llvm-project/issues/81597, I'm planning
to refactor the usage of CallDescription; and as I was preparing for
this I noticed that there are two superfluous references to this header.


  Commit: 770fd3856660fea6cbaa78d9cb1f03cc92611783
      https://github.com/llvm/llvm-project/commit/770fd3856660fea6cbaa78d9cb1f03cc92611783
  Author: Ian Hickson <ian at hixie.ch>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/docs/LangRef.rst

  Log Message:
  -----------
  [LangRef] Document string literals in LLVM's format (#82529)


  Commit: 5b8e5604c297aa8fd09bf641d12d0a663e0ea801
      https://github.com/llvm/llvm-project/commit/5b8e5604c297aa8fd09bf641d12d0a663e0ea801
  Author: zhijian lin <zhijian at ca.ibm.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/lib/Basic/Targets/PPC.cpp
    M clang/lib/Basic/Targets/PPC.h
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/lib/Sema/SemaChecking.cpp
    A clang/test/CodeGen/aix-builtin-cpu-is.c
    A clang/test/Sema/aix-builtin-cpu-unsupports.c
    M llvm/include/llvm/TargetParser/PPCTargetParser.def

  Log Message:
  -----------
  [AIX] Lower intrinsic __builtin_cpu_is into AIX platform-specific code. (#80069)

On AIX OS, __builtin_cpu_is() references the runtime external variable
_system_configuration from /usr/include/sys/systemcfg.h.

ref issue:  https://github.com/llvm/llvm-project/issues/80042


  Commit: cbb24e139d0753d755d17fbe6bfac48ab44d0721
      https://github.com/llvm/llvm-project/commit/cbb24e139d0753d755d17fbe6bfac48ab44d0721
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/include/llvm/IR/Constants.h
    M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
    M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
    M llvm/lib/IR/AsmWriter.cpp
    M llvm/lib/IR/Constants.cpp
    M llvm/lib/IR/LLVMContextImpl.cpp
    M llvm/lib/IR/LLVMContextImpl.h
    A llvm/test/Bitcode/constant-splat.ll

  Log Message:
  -----------
  [LLVM][IR] Add native vector support to ConstantInt & ConstantFP. (#74502)

NOTE: For brevity the following talks about ConstantInt but
everything extends to cover ConstantFP as well.

Whilst ConstantInt::get() supports the creation of vectors whereby
each lane has the same value, it achieves this via other constants:

  * ConstantVector for fixed-length vectors
  * ConstantExprs for scalable vectors

However, ConstantExprs are being deprecated and ConstantVector is
not space efficient for larger vector types. By extending ConstantInt
we can represent vector splats by only storing the underlying scalar
value.

More specifically:

 * ConstantInt gains an ElementCount variant of get().
 * LLVMContext is extended to map <EC,APInt>->ConstantInt.
 * BitcodeReader/Writer support is extended to allow vector types.

Whilst this patch adds the base support, more work is required
before it's production ready. For example, there's likely to be
many places where isa<ConstantInt> assumes a scalar type. Accordingly
the default behaviour of ConstantInt::get() remains unchanged but a
set of flags are added to allow wider testing and thus help with the
migration:

  --use-constant-int-for-fixed-length-splat
  --use-constant-fp-for-fixed-length-splat
  --use-constant-int-for-scalable-splat
  --use-constant-fp-for-scalable-splat

NOTE: No change is required to the bitcode format because types and
values are handled separately.

NOTE: For similar reasons as above, code generation doesn't work
out-the-box.


  Commit: 88e31f64a034ec6dead2106016ee5b797674edb0
      https://github.com/llvm/llvm-project/commit/88e31f64a034ec6dead2106016ee5b797674edb0
  Author: Matt <MattPD at users.noreply.github.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
    A llvm/test/Transforms/OpenMP/deduplication_soundness.ll

  Log Message:
  -----------
  [OpenMP][FIX] Remove unsound omp_get_thread_limit deduplication (#79524)

The deduplication of the calls to `omp_get_thread_limit` used to be
legal when originally added in
<https://github.com/llvm/llvm-project/commit/e28936f6137c5a9c4f7673e248c192a9811543b6#diff-de101c82aff66b2bda2d1f53fde3dde7b0d370f14f1ff37b7919ce38531230dfR123>,
as the result (thread_limit) was immutable.

However, now that we have `thread_limit` clause, we no longer have
immutability; therefore `omp_get_thread_limit()` is not a deduplicable
runtime call.

Thus, removing `omp_get_thread_limit` from the
`DeduplicableRuntimeCallIDs` array.

Here's a simple example:
```
#include <omp.h>
#include <stdio.h>

int main()
{
#pragma omp target thread_limit(4)
{
printf("\n1:target thread_limit: %d\n", omp_get_thread_limit());
}

#pragma omp target thread_limit(3)
{
printf("\n2:target thread_limit: %d\n", omp_get_thread_limit());
}
return 0;
}
```

GCC-compiled binary execution: https://gcc.godbolt.org/z/Pjv3TWoTq
```
1:target thread_limit: 4
2:target thread_limit: 3
```

Clang/LLVM-compiled binary execution:
https://clang.godbolt.org/z/zdPbrdMPn
```
1:target thread_limit: 4
2:target thread_limit: 4
```

By my reading of the OpenMP spec GCC does the right thing here; cf.
<https://www.openmp.org/spec-html/5.2/openmpse12.html#x34-330002.4>:
> If a target construct with a thread_limit clause is encountered, the
thread-limit-var ICV from the data environment of the generated initial
task is instead set to an implementation defined value between one and
the value specified in the clause.

The common subexpression elimination (CSE) of the second call to
`omp_get_thread_limit` by LLVM does not seem to be correct, as it's not
an available expression at any program point(s) (in the scope of the
clause in question) after the second target construct with a
`thread_limit` clause is encountered.

Compiling with `-Rpass=openmp-opt -Rpass-analysis=openmp-opt
-Rpass-missed=openmp-opt` we have:
https://clang.godbolt.org/z/G7dfhP7jh
```
<source>:8:42: remark: OpenMP runtime call omp_get_thread_limit deduplicated. [OMP170] [-Rpass=openmp-opt]
8 | printf("\n1:target thread_limit: %d\n",omp_get_thread_limit());
| ^
```

OMP170 has the following explanation:
https://openmp.llvm.org/remarks/OMP170.html

> This optimization remark indicates that a call to an OpenMP runtime
call was replaced with the result of an existing one. This occurs when
the compiler knows that the result of a runtime call is immutable.
Removing duplicate calls is done by replacing all calls to that function
with the result of the first call. This cannot be done automatically by
the compiler because the implementations of the OpenMP runtime calls
live in a separate library the compiler cannot see.
This optimization will trigger for known OpenMP runtime calls whose
return value will not change.

At the same time I do not believe we have an analysis checking whether
this precondition holds here: "This occurs when the compiler knows that
the result of a runtime call is immutable."

AFAICT, such analysis doesn't appear to exist in the original patch
introducing deduplication, either:

-
https://github.com/llvm/llvm-project/commit/9548b74a831ea005649465797f359e0521f3b8a9
- https://reviews.llvm.org/D69930

The fix is to remove it from `DeduplicableRuntimeCallIDs`, effectively
reverting the addition in this commit (noting that `omp_get_max_threads`
is not present in `DeduplicableRuntimeCallIDs`, so it's possible this
addition was incorrect in the first place):

- [OpenMP][Opt] Annotate known runtime functions and deduplicate more,
-
https://github.com/llvm/llvm-project/commit/e28936f6137c5a9c4f7673e248c192a9811543b6#diff-de101c82aff66b2bda2d1f53fde3dde7b0d370f14f1ff37b7919ce38531230dfR123

As a result, we're no longer unsoundly deduplicating the OpenMP runtime
call `omp_get_thread_limit` as illustrated by the test case: Note the
(correctly) repeated `call i32 @omp_get_thread_limit()`.

---------

Co-authored-by: Joseph Huber <huberjn at outlook.com>


  Commit: d3f6dd6585f4866a38a794b80db55a62c1050c77
      https://github.com/llvm/llvm-project/commit/d3f6dd6585f4866a38a794b80db55a62c1050c77
  Author: Benjamin Kramer <benny.kra at googlemail.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/IR/Instructions.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
    M llvm/test/Transforms/InstCombine/fpextend.ll

  Log Message:
  -----------
  [InstCombine] Pick bfloat over half when shrinking ops that started with an fpext from bfloat (#82493)

This fixes the case where we would shrink an frem to half and then
bitcast to bfloat, producing invalid results. The transformation was
written under the assumption that there is only one type with a given
bit width.

Also add a strategic assert to CastInst::CreateFPCast to turn this
miscompilation into a crash.


  Commit: 9dbedcac1243e8e99103bdff37da51dded67b766
      https://github.com/llvm/llvm-project/commit/9dbedcac1243e8e99103bdff37da51dded67b766
  Author: Petr Hosek <phosek at google.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M libc/CMakeLists.txt
    M llvm/CMakeLists.txt

  Log Message:
  -----------
  [build] Check RUNTIMES_${target}_LLVM_ENABLE_RUNTIMES for libc also (#82561)

When checking whether we need to build libc-hdrgen, we need to check
LLVM_ENABLE_RUNTIMES and RUNTIMES_${target}_LLVM_ENABLE_RUNTIMES, just
the former is not sufficient since libc may be enabled only for certain
targets.


  Commit: cf8fc53a96f844328be8d20435c5b4151a7b8f92
      https://github.com/llvm/llvm-project/commit/cf8fc53a96f844328be8d20435c5b4151a7b8f92
  Author: agozillon <Andrew.Gozillon at amd.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M flang/test/Semantics/OpenMP/device-constructs.f90
    M llvm/include/llvm/Frontend/OpenMP/OMP.td

  Log Message:
  -----------
  [Flang][LLVM][OpenMP] Relax target data restrictions to be more inline with the specification (#82537)

Currently we emit errors whenever a map is not provided on a target data
directive, however, I believe that's incorrect behavior, the
specification states:

"At least one map, use_device_addr or use_device_ptr clause must appear
on the directive"

So provided one is present, the directive is legal in this case.
Slightly different to its siblings (enter/exit/update) which don't have
use_device_addr/use_device_ptr.


  Commit: 27498e9942dbb8dd005588a03d6777088d2255ce
      https://github.com/llvm/llvm-project/commit/27498e9942dbb8dd005588a03d6777088d2255ce
  Author: Sergio Afonso <safonsof at amd.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M flang/lib/Semantics/resolve-directives.cpp
    A flang/test/Semantics/OpenMP/struct.f90

  Log Message:
  -----------
  [Flang][OpenMP] Prevent ICE for certain constructs in unnamed programs (#73938)

This patch fixes #72748 by modifying the processing of program units to
search for a symbol to which OpenMP REQUIRES clauses can bind to. Rather
than picking up the first PFT node with a source reference and getting
its associated scope, it picks up the last one.

This avoids using the source from the first specification construct of
a nameless program, which can sometimes not be associated to any scope,
causing an ICE due to an invalid source location.


  Commit: 8e28037374934c60602cb8c85874f443e3348b9e
      https://github.com/llvm/llvm-project/commit/8e28037374934c60602cb8c85874f443e3348b9e
  Author: Kai Nacke <kai.peter.nacke at ibm.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M .github/new-prs-labeler.yml

  Log Message:
  -----------
  [SystemZ] Add SystemZ path for the PR labeler (#82515)

Similar to #82200:
Add paths for SystemZ related changes to the PR labeler.

There is no pr-subscribers-backend:SystemZ team in the llvm org yet.
Much appreciated if some admin can help to create the team.


  Commit: 307409a8872ff27339d5d5c6a7e7777254972f34
      https://github.com/llvm/llvm-project/commit/307409a8872ff27339d5d5c6a7e7777254972f34
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M flang/lib/Evaluate/fold-integer.cpp

  Log Message:
  -----------
  [flang] Fix warning fix

This fixes 73c646a3b27293f8cb4ba120de7bc01c223b4b5f.

I misread the #ifdefs and didn't realise that they were in
the middle of passing parameters to a function.

Move the workaround outside this.


  Commit: 20434bf3731389773fb8569889bd5d06375683bf
      https://github.com/llvm/llvm-project/commit/20434bf3731389773fb8569889bd5d06375683bf
  Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/include/llvm/IR/DebugProgramInstruction.h
    M llvm/lib/IR/AsmWriter.cpp
    M llvm/lib/IR/DebugProgramInstruction.cpp

  Log Message:
  -----------
  [RemoveDIs][NFC] Add DPLabel class [2/3] (#82376)

Patch 2 of 3 to add llvm.dbg.label support to the RemoveDIs project. The
patch stack adds the DPLabel class, which is the RemoveDIs
llvm.dbg.label
equivalent.

       1. Add DbgRecord base class for DPValue and the not-yet-added
          DPLabel class.
    -> 2. Add the DPLabel class.
       3. Enable dbg.label conversion and add support to passes.

This will be used (and tested) in the final patch(es), coming next.


  Commit: 601c9bec736739da9160092ef60e3468266816bd
      https://github.com/llvm/llvm-project/commit/601c9bec736739da9160092ef60e3468266816bd
  Author: Victor Campos <victor.campos at arm.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/lib/Headers/arm_acle.h

  Log Message:
  -----------
  [clang][NFC] Fix arm_acle.h title headers (#82624)

Fix some title headers to align them with the actual ACLE document.


  Commit: 08eced5fccd2f103379292f119834a7a3c3b6b25
      https://github.com/llvm/llvm-project/commit/08eced5fccd2f103379292f119834a7a3c3b6b25
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-scalable-interleave.mlir

  Log Message:
  -----------
  [mlir][test] Add -march=aarch64 -mattr=+sve to test-scalable-interleave

Fix for https://lab.llvm.org/buildbot/#/builders/179/builds/9438


  Commit: 695a9d84dc1dd003c31d3e5e22af3525c31218c2
      https://github.com/llvm/llvm-project/commit/695a9d84dc1dd003c31d3e5e22af3525c31218c2
  Author: Ramkumar Ramachandra <r at artagnon.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    A llvm/test/Transforms/LoopVectorize/X86/pr72969.ll

  Log Message:
  -----------
  LoopVectorize: add test for crash in #72969 (#74111)


  Commit: 9eb5f94f9b47154cf07160a6ba74ab1c31becfa3
      https://github.com/llvm/llvm-project/commit/9eb5f94f9b47154cf07160a6ba74ab1c31becfa3
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll

  Log Message:
  -----------
  [RISCV][AArch64] Add vscale_range attribute to tests per architecture minimums

Spent a bunch of time tracing down an odd issue "in SCEV" which turned out
to be the fact that SCEV doesn't have access to TTI.  As a result, the only
way for it to get range facts on vscales (to avoid collapsing ranges of
element counts and type sizes to trivial ranges on multiplies) is to look
at the vscale_range attribute.  Since vscale_range is set by clang by
default, manually setting it in the tests shouldn't interfere with the
test intent.


  Commit: 0107c8824b695db86706bbc3466bbfd585a754aa
      https://github.com/llvm/llvm-project/commit/0107c8824b695db86706bbc3466bbfd585a754aa
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/select.ll

  Log Message:
  -----------
  [RISCV][SDAG] Improve codegen of select with constants if zicond is available (#82456)

This patch uses `add + czero.eqz/nez` to lower select with constants if
zicond is available.
```
(select c, c1, c2) -> (add (czero_nez c2 - c1, c), c1)
(select c, c1, c2) -> (add (czero_eqz c1 - c2, c), c2)
```
The above code sequence is suggested by [RISCV Optimization
Guide](https://riscv-optimization-guide-riseproject-c94355ae3e6872252baa952524.gitlab.io/riscv-optimization-guide.html#_avoid_branches_using_conditional_moves).


  Commit: 43f1fa99ca7d05be9545a102e15ad0d607887839
      https://github.com/llvm/llvm-project/commit/43f1fa99ca7d05be9545a102e15ad0d607887839
  Author: cmtice <cmtice at google.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/include/llvm/DebugInfo/DWARF/DWARFAcceleratorTable.h
    M llvm/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp

  Log Message:
  -----------
  [LLVM][DebugInfo] Refactor some code for easier sharing. (#82153)

Refactor the code that calculates the offsets for the various pieces of
the DWARF .debug_names index section, to make it easier to share the
code with other tools, such as LLD.


  Commit: f67ef1a8d9841718ce08a69d935ac8fd8e6112f9
      https://github.com/llvm/llvm-project/commit/f67ef1a8d9841718ce08a69d935ac8fd8e6112f9
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll

  Log Message:
  -----------
  [RISCV][LV] Add additional small trip count loop coverage


  Commit: c9afd1ad783a67210bed4fd2f7108477fc986e15
      https://github.com/llvm/llvm-project/commit/c9afd1ad783a67210bed4fd2f7108477fc986e15
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/test/CodeGen/RISCV/sext-zext-trunc.ll

  Log Message:
  -----------
  [RISCV] Add test case showing missed opportunity to form sextload when sext and zext nneg are both present. NFC


  Commit: a51f4afc5aec8145091fead1d68c81e7d210fc0d
      https://github.com/llvm/llvm-project/commit/a51f4afc5aec8145091fead1d68c81e7d210fc0d
  Author: Shimin Cui <scui at ca.ibm.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/include/llvm/Transforms/IPO/HotColdSplitting.h
    M llvm/lib/Transforms/IPO/HotColdSplitting.cpp
    M llvm/test/Transforms/HotColdSplit/assumption-cache-invalidation.ll
    M llvm/test/Transforms/HotColdSplit/eh-pads.ll
    M llvm/test/Transforms/HotColdSplit/outline-disjoint-diamonds.ll
    A llvm/test/Transforms/HotColdSplit/outline-inner-region.ll
    A llvm/test/Transforms/HotColdSplit/outline-outer-region.ll

  Log Message:
  -----------
  [HCS] Externd to outline overlapping sub/super cold regions (#80732)

Currently, with hot cold splitting, when a cold region is identified, it
is added to the region list of ColdBlocks. Then when another cold region
(B) identified overlaps with a ColdBlocks region (A) already added to
the list, the region B is not added to the list because of the
overlapping with region A. The splitting analysis is performed, and the
region A may not get split, for example, if it’s considered too
expansive. This is to improve the handling the overlapping case when the
region A is not considered good for splitting, while the region B is
good for splitting.
 
The change is to move the cold region splitting analysis earlier to
allow more cold region splitting. If an identified region cannot be
split, it will not be added to the candidate list of ColdBlocks for
overlapping check.


  Commit: c1716e3fcf4e43b4a328731920f76b2fce9485d0
      https://github.com/llvm/llvm-project/commit/c1716e3fcf4e43b4a328731920f76b2fce9485d0
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/RISCV/sext-zext-trunc.ll

  Log Message:
  -----------
  [DAGCombiner][RISCV] CSE zext nneg and sext. (#82597)

If we have a sext and a zext nneg with the same types and operand
we should combine them into the sext. We can't go the other way
because the nneg flag may only be valid in the context of the uses
of the zext nneg.


  Commit: 5b53fa04db33a931b843b32946065490513484bf
      https://github.com/llvm/llvm-project/commit/5b53fa04db33a931b843b32946065490513484bf
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
    M llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
    M llvm/test/CodeGen/RISCV/split-offsets.ll
    M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
    M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll

  Log Message:
  -----------
  [RISCV] Enable -riscv-enable-sink-fold by default. (#82026)

AArch64 has had it enabled since late November, so hopefully the main
issues have been resolved.

I see a small reduction in dynamic instruction count on every benchmark
in specint2017. The best improvement was 0.3% so nothing amazing.


  Commit: 26cc6f126a3b25644c595b3a5a0417b1e1ab42a8
      https://github.com/llvm/llvm-project/commit/26cc6f126a3b25644c595b3a5a0417b1e1ab42a8
  Author: Erich Keane <ekeane at nvidia.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/include/clang/Sema/Scope.h
    M clang/lib/Parse/ParseOpenACC.cpp
    M clang/lib/Sema/Scope.cpp
    M clang/lib/Sema/SemaStmt.cpp
    A clang/test/SemaOpenACC/no-branch-in-out.c

  Log Message:
  -----------
  [OpenACC] Implement 'break' and 'continue' errors for Compute Cnstrcts (#82543)

OpenACC3.3 2.5.4 says: "A program may not branch into or out of a
compute construct". While some of this restriction isn't particularly
checkable, 'break' and 'continue' are possible and pretty trivial, so
this patch implements those limitations.

It IS unclear in the case of a 'break' in a 'switch' what should happen
(an antagonistic reading of the standard would prevent it from
 appearing), however we're choosing to special-case the break-in-switch
to ensure that this works (albeit, a 'parallel' directive on a 'switch'
isn't particularly useful, though permitted).

Future implementations of this rule will be in a follow-up patch.


  Commit: 87b1e735b28f81d9012fd302cd07385db50a274f
      https://github.com/llvm/llvm-project/commit/87b1e735b28f81d9012fd302cd07385db50a274f
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
    M llvm/test/Transforms/ConstraintElimination/minmax.ll
    M llvm/test/Transforms/ConstraintElimination/sext.ll

  Log Message:
  -----------
  [ConstraintElim] Decompose sext-like insts for signed predicates (#82344)

Alive2: https://alive2.llvm.org/ce/z/A8dtGp
Fixes #82271.


  Commit: 26d71d9ed56c4c23e6284dac7a9bdf603a5801f3
      https://github.com/llvm/llvm-project/commit/26d71d9ed56c4c23e6284dac7a9bdf603a5801f3
  Author: Fangrui Song <i at maskray.me>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/docs/CommandGuide/llvm-readelf.rst
    M llvm/docs/CommandGuide/llvm-readobj.rst
    A llvm/test/tools/llvm-readobj/ELF/decompress-zlib-unsupported.test
    A llvm/test/tools/llvm-readobj/ELF/decompress-zlib.test
    A llvm/test/tools/llvm-readobj/ELF/decompress-zstd-unsupported.test
    A llvm/test/tools/llvm-readobj/ELF/decompress-zstd.test
    M llvm/tools/llvm-readobj/ObjDumper.cpp
    M llvm/tools/llvm-readobj/ObjDumper.h
    M llvm/tools/llvm-readobj/Opts.td
    M llvm/tools/llvm-readobj/llvm-readobj.cpp

  Log Message:
  -----------
  [llvm-readobj,ELF] Support --decompress/-z (#82594)

When a section has the SHF_COMPRESSED flag, -p/-x dump the compressed
content by default. In GNU readelf, if --decompress/-z is specified,
-p/-x will dump the decompressed content. This patch implements the
option.

Close #82507


  Commit: 163eaf3bbc24e46a6ec9b71deda8c66f0354d2d7
      https://github.com/llvm/llvm-project/commit/163eaf3bbc24e46a6ec9b71deda8c66f0354d2d7
  Author: Daniel Hoekwater <hoekwater at google.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/CodeGen/MachineFunctionSplitter.cpp

  Log Message:
  -----------
  [CodeGen] Clean up MachineFunctionSplitter MBB safety checking (NFC)

Move the "is MBB safe to split" check out of `isColdBlock` and update
the comment since we're no longer using a temporary hack.


  Commit: 6599c022be7c797cd0fafeea4c538e01aae78fd4
      https://github.com/llvm/llvm-project/commit/6599c022be7c797cd0fafeea4c538e01aae78fd4
  Author: yandalur <quic_yandalur at quicinc.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
    A llvm/test/CodeGen/Hexagon/bit-store-upper-sub-hi.mir

  Log Message:
  -----------
  [HEXAGON] Fix bit boundary for isub_hi in HexagonBitSimplify (#82336)

Use bit boundary of 32 for high subregisters in HexagonBitSimplify. This
fixes the subregister used in an upper half register store.


  Commit: b0edc1c45284586fdb12edd666f95d99f5f62b43
      https://github.com/llvm/llvm-project/commit/b0edc1c45284586fdb12edd666f95d99f5f62b43
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Analysis/Loads.cpp
    A llvm/test/Transforms/VectorCombine/RISCV/load-widening.ll

  Log Message:
  -----------
  [Loads] Fix crash in isSafeToLoadUnconditionally with scalable accessed type (#82650)

This fixes #82606 by updating isSafeToLoadUnconditionally to handle
fixed sized loads from a scalable accessed type.


  Commit: 5b079af169cd04b457465fd7ca31714efeefe6d9
      https://github.com/llvm/llvm-project/commit/5b079af169cd04b457465fd7ca31714efeefe6d9
  Author: Michael Jones <71531609+michaelrj-google at users.noreply.github.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M libc/src/__support/fixed_point/CMakeLists.txt
    M libc/src/__support/fixed_point/fx_bits.h
    M libc/test/src/__support/CMakeLists.txt
    M libc/test/src/__support/FPUtil/fpbits_test.cpp
    A libc/test/src/__support/fixed_point/CMakeLists.txt
    A libc/test/src/__support/fixed_point/fx_bits_test.cpp

  Log Message:
  -----------
  [libc] add FXBits class (#82065)

The FXBits class is what will be used to modify fixed point numbers on a
bit level. This patch adds a basic implementation as well as basic
tests.


  Commit: 3a85594cb340aabe7ad993eb3912987f4246925e
      https://github.com/llvm/llvm-project/commit/3a85594cb340aabe7ad993eb3912987f4246925e
  Author: sethp <seth at codecopse.net>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst

  Log Message:
  -----------
  [NFC] Fix typo in ReleaseNotes.rst (#82655)

Deletes the leading 7 from the textual issue number.


  Commit: bc841bb0f8b55d18ed97440df878d0121701a317
      https://github.com/llvm/llvm-project/commit/bc841bb0f8b55d18ed97440df878d0121701a317
  Author: Cyndy Ishida <cyndy_ishida at apple.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    A clang/test/InstallAPI/basic.test
    A clang/test/InstallAPI/driver-invalid-options.test
    R clang/test/InstallAPI/installapi-basic.test
    R clang/test/InstallAPI/installapi-driver-invalid-options.test

  Log Message:
  -----------
  [clang] Rename installapi tests, NFC

* Reduces redundancy


  Commit: e630a451b457e4d8d071a2b4f102b342bbea2d02
      https://github.com/llvm/llvm-project/commit/e630a451b457e4d8d071a2b4f102b342bbea2d02
  Author: Benjamin Kramer <benny.kra at googlemail.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Transforms/IPO/HotColdSplitting.cpp

  Log Message:
  -----------
  [HCS] Fix unused variable warnings. NFCI.


  Commit: ea174c09342275d6c6fec48fb846eaf28fae5b51
      https://github.com/llvm/llvm-project/commit/ea174c09342275d6c6fec48fb846eaf28fae5b51
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M openmp/libomptarget/include/PluginManager.h
    M openmp/libomptarget/include/omptarget.h
    M openmp/libomptarget/src/OffloadRTL.cpp
    M openmp/libomptarget/src/PluginManager.cpp
    M openmp/libomptarget/src/exports
    M openmp/libomptarget/src/interface.cpp
    A openmp/libomptarget/test/offloading/runtime_init.c

  Log Message:
  -----------
  [Libomptarget] Remove global ctor and use reference counting (#80499)

Summary:
Currently we rely on global constructors to initialize and shut down the
OpenMP runtime library and plugin manager. This causes some issues
because we do not have a defined lifetime that we can rely on to release
and allocate resources. This patch instead adds some simple reference
counted initialization and deinitialization function.

A future patch will use the `deinit` interface to more intelligently
handle plugin deinitilization. Right now we do nothing and rely on
`atexit` inside of the plugins to tear them down. This isn't great
because it limits our ability to control these things.

Note that I made the `__tgt_register_lib` functions do the
initialization instead of adding calls to the new runtime functions in
the linker wrapper. The reason for this is because in the past it's been
easier to not introduce a new function call, since sometimes the user's
compiler will link against an older `libomptarget`. Maybe if we change
the name with offloading in the future we can simplify this.

Depends on https://github.com/llvm/llvm-project/pull/80460


  Commit: ec24094b56793478909783c1156fd57ce5ec2006
      https://github.com/llvm/llvm-project/commit/ec24094b56793478909783c1156fd57ce5ec2006
  Author: Igor Kudrin <ikudrin at accesssoftek.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/include/llvm/LTO/Config.h
    M llvm/lib/LTO/LTOBackend.cpp

  Log Message:
  -----------
  [LTO] Remove Config.UseDefaultPipeline (#82587)

This option is not used. It was added in
[D122133](https://reviews.llvm.org/D122133), 5856f30b, with the only
usage in `ClangLinkerWrapper.cpp`, which was later updated in a1d57fc2,
and then finally removed in [D142650](https://reviews.llvm.org/D142650),
6185246f.


  Commit: 54a6cf15069e7e88125477e0b3ce1ab063c893c6
      https://github.com/llvm/llvm-project/commit/54a6cf15069e7e88125477e0b3ce1ab063c893c6
  Author: S. Bharadwaj Yadavalli <Bharadwaj.Yadavalli at microsoft.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/DirectX/DXIL.td
    M llvm/utils/TableGen/DXILEmitter.cpp

  Log Message:
  -----------
  [DirectX][NFC] Use LLVM Types in DXIL Operation specifications in DXIL.td (#81692)

This change uniformly uses LLVM Types in the specification of parameter
types and overload types of DXIL operation.

Updated (a) parameter types accordingly in the specification of existing
DXILOperations and (b) DXILEmitter.


  Commit: 2e7cacfced573283d5424830f20333e2a6731251
      https://github.com/llvm/llvm-project/commit/2e7cacfced573283d5424830f20333e2a6731251
  Author: Emilia Kond <emilia at rymiel.space>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/lib/Format/TokenAnnotator.cpp
    M clang/unittests/Format/FormatTest.cpp

  Log Message:
  -----------
  [clang-format] Fix crash in TokenAnnotator (#82349)

The while loop on line 3814 can cause a segmentation fault getting the
Next field on a nullptr. This is because further down, on line 3823,
there is another for loop, which assigns Tok to Tok->Next in its
initializer. This for loop has a condition to check if the result of
that isn't null. If it is, the loop is skipped and we drop back out to
the outer loop, except, now Tok is null, and we try to dereference it
without checking first.

This patch adds a defensive check that returns if Tok->Next is null
before we make it to the second for loop.

Fixes https://github.com/llvm/llvm-project/issues/82328

---------

Co-authored-by: Owen Pan <owenpiano at gmail.com>


  Commit: a23d4ceb8866df91334750627827a1724363e755
      https://github.com/llvm/llvm-project/commit/a23d4ceb8866df91334750627827a1724363e755
  Author: Greg Clayton <gclayton at fb.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
    M llvm/unittests/DebugInfo/DWARF/DWARFDebugLineTest.cpp

  Log Message:
  -----------
  [lldb][llvm] Return an error instead of crashing when parsing a line table prologue. (#80769)

We recently ran into some bad DWARF where the `DW_AT_stmt_list` of many
compile units was randomly set to invalid values and was causing LLDB to
crash due to an assertion about address sizes not matching. Instead of
asserting, we should return an appropriate recoverable `llvm::Error`.


  Commit: da1880cc56060c9da91cbd04daa7f8aa3ea0e829
      https://github.com/llvm/llvm-project/commit/da1880cc56060c9da91cbd04daa7f8aa3ea0e829
  Author: Kevin Frei <kevinfrei at users.noreply.github.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/tools/llvm-gsymutil/Opts.td
    M llvm/tools/llvm-gsymutil/llvm-gsymutil.cpp

  Log Message:
  -----------
  GSym aggregated output to JSON file (#81763)

In order to make tooling around dwarf health easier, I've added an
`--json-summary-file` option to `llvm-gsymutil` that will spit out error
summary data with counts to a JSON file.

I've added the same capability to `llvm-dwarfdump` in a [different
PR.](https://github.com/llvm/llvm-project/pull/81762)

The format of the json is:
```JSON
{ 
  "error-categories": { 
    "<first category description>": {"count": 1234},
    "<next category description>": {"count":4321}
  },
  "error-count": 5555
}
```
for a clean run:
```JSON
{ 
  "error-categories": {},
  "error-count": 0
}
```

---------

Co-authored-by: Kevin Frei <freik at meta.com>


  Commit: 5c24c316496e221e1841418f0f39ccb7200c83c6
      https://github.com/llvm/llvm-project/commit/5c24c316496e221e1841418f0f39ccb7200c83c6
  Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/Sema/SemaChecking.cpp
    M clang/test/CXX/drs/dr27xx.cpp
    M clang/test/SemaCXX/cxx2a-ms-no-unique-address.cpp
    M clang/test/SemaCXX/type-traits.cpp
    M clang/www/cxx_dr_status.html

  Log Message:
  -----------
  [clang] Implement CWG2759 "`[[no_unique_address]` and common initial sequence" (#82607)

This patch implements said defect report resolution by adding additional
check to common initial sequence evaluation. Consequently, this fixes
CWG2759.


  Commit: cc839275164a7768451531af868fa70eb9e71cbd
      https://github.com/llvm/llvm-project/commit/cc839275164a7768451531af868fa70eb9e71cbd
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
    M llvm/test/Transforms/CorrelatedValuePropagation/min-max.ll

  Log Message:
  -----------
  [CVP] Canonicalize signed minmax into unsigned (#82478)

This patch turns signed minmax to unsigned to match the behavior for
signed icmps.
Alive2: https://alive2.llvm.org/ce/z/UAAM42


  Commit: 33a6ce18373ffd1457ebd54e930b6f02fe4c39c1
      https://github.com/llvm/llvm-project/commit/33a6ce18373ffd1457ebd54e930b6f02fe4c39c1
  Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/lib/CodeGen/CGCUDANV.cpp
    M clang/lib/CodeGen/CodeGenModule.cpp
    M clang/lib/Driver/OffloadBundler.cpp
    M clang/lib/Driver/ToolChains/HIPUtility.cpp
    M clang/test/CMakeLists.txt
    M clang/test/CodeGenCUDA/device-stub.cu
    M clang/test/CodeGenCUDA/host-used-device-var.cu
    A clang/test/Driver/Inputs/hip.h
    M clang/test/Driver/clang-offload-bundler.c
    A clang/test/Driver/hip-partial-link.hip
    M clang/test/Driver/hip-toolchain-rdc.hip

  Log Message:
  -----------
  [HIP] Allow partial linking for `-fgpu-rdc` (#81700)

`-fgpu-rdc` mode allows device functions call device functions in
different TU. However, currently all device objects have to be linked
together since only one fat binary is supported. This is time consuming
for AMDGPU backend since it only supports LTO.

There are use cases that objects can be divided into groups in which
device functions are self-contained but host functions are not. It is
desirable to link/optimize/codegen the device code and generate a fatbin
for each group, whereas partially link the host code with `ld -r` or
generate a static library by using the `--emit-static-lib` option of
clang. This avoids linking all device code together, therefore decreases
the linking time for `-fgpu-rdc`.

Previously, clang emits an external symbol `__hip_fatbin` for all
objects for `-fgpu-rdc`. With this patch, clang emits an unique external
symbol `__hip_fatbin_{cuid}` for the fat binary for each object. When a
group of objects are linked together to generate a fatbin, the symbols
are merged by alias and point to the same fat binary. Each group has its
own fat binary. One executable or shared library can have multiple fat
binaries. Device linking is done for undefined fab binary symbols only
to avoid repeated linking. `__hip_gpubin_handle` is also uniquefied and
merged to avoid repeated registering. Symbol `__hip_cuid_{cuid}` is
introduced to facilitate debugging and tooling.

Fixes: https://github.com/llvm/llvm-project/issues/77018


  Commit: 1069823ce7d154aa8ef87ae5a0fd34b527eca2a0
      https://github.com/llvm/llvm-project/commit/1069823ce7d154aa8ef87ae5a0fd34b527eca2a0
  Author: Alexander Shaposhnikov <6532716+alexander-shaposhnikov at users.noreply.github.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Passes/PassBuilderPipelines.cpp
    M llvm/test/Other/new-pm-defaults.ll
    M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
    M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
    M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
    M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
    M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
    M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll

  Log Message:
  -----------
  Enable JumpTableToSwitch pass by default (#82546)

Enable JumpTableToSwitch pass by default.

Test plan: ninja check-all


  Commit: 4f7ab789bf43b49914815bdf4e4c3703f92e781d
      https://github.com/llvm/llvm-project/commit/4f7ab789bf43b49914815bdf4e4c3703f92e781d
  Author: Boian Petkantchin <boian.petkantchin at amd.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
    M mlir/test/Dialect/Mesh/spmdization.mlir

  Log Message:
  -----------
  [mlir][mesh] add support in spmdization for incomplete sharding annotations (#82442)

Don't require that `mesh.shard` operations come in pairs. If there is
only a single `mesh.shard` operation we assume that the producer result
and consumer operand have the same sharding.


  Commit: 744c0057e7dc0d1d046a4867cece2f31fee9bb23
      https://github.com/llvm/llvm-project/commit/744c0057e7dc0d1d046a4867cece2f31fee9bb23
  Author: Nashe Mncube <nashe.mncube at arm.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    A llvm/test/CodeGen/AArch64/16bit-float-promotion-with-nofp.ll
    M llvm/test/CodeGen/AArch64/strictfp_f16_abi_promote.ll

  Log Message:
  -----------
  [AArch64][CodeGen] Fix crash when fptrunc returns fp16 with +nofp attr (#81724)

When performing lowering of the fptrunc opcode returning fp16 with the
+nofp flag enabled we could trigger a compiler crash. This is because we
had no custom lowering implemented. This patch 
the case in which we need to promote an fp16 return type
for fptrunc when the +nofp attr is enabled.


  Commit: 6ddb25ed9ca2cb0f4ad8f402d7411ac3328f598d
      https://github.com/llvm/llvm-project/commit/6ddb25ed9ca2cb0f4ad8f402d7411ac3328f598d
  Author: Florian Mayer <fmayer at google.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M compiler-rt/lib/scudo/standalone/combined.h

  Log Message:
  -----------
  [scudo] increase frames per stack to 16 for stack depot (#82427)

8 was very low and it is likely that in real workloads we have more than
an average of 8 frames per stack given on Android we have 3 at the
bottom: __start_main, __libc_init, main, and three at the top: malloc,
scudo_malloc and Allocator::allocate. That leaves 2 frames for
application code, which is clearly unreasonable.


  Commit: 242f98c7ab7c100d76cac29b555db20205619b38
      https://github.com/llvm/llvm-project/commit/242f98c7ab7c100d76cac29b555db20205619b38
  Author: Benjamin Kramer <benny.kra at googlemail.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/test/CodeGen/aarch64-sme-inline-streaming-attrs.c

  Log Message:
  -----------
  [Clang][SME] Skip writing output files to the source directory


  Commit: 3168af56bcb827360c26957ef579b7871dad8e17
      https://github.com/llvm/llvm-project/commit/3168af56bcb827360c26957ef579b7871dad8e17
  Author: Benjamin Kramer <benny.kra at googlemail.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll

  Log Message:
  -----------
  LoopVectorize: Mark crash test as requiring assertions


  Commit: 32994cc0d63513f77223c64148faeeb50aebb702
      https://github.com/llvm/llvm-project/commit/32994cc0d63513f77223c64148faeeb50aebb702
  Author: Alexey Bataev <5361294+alexey-bataev at users.noreply.github.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/AArch64/extractelements-to-shuffle.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/reorder-fmuladd-crash.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
    M llvm/test/Transforms/SLPVectorizer/X86/pr35497.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reduction-transpose.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reorder-clustered-node.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reorder-vf-to-resize.ll
    M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reorder.ll
    M llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder2.ll
    M llvm/test/Transforms/SLPVectorizer/X86/vec3-reorder-reshuffle.ll

  Log Message:
  -----------
  [SLP]Improve findReusedOrderedScalars and graph rotation.

Patch syncs the code in findReusedOrderedScalars with cost
estimation/codegen. It tries to use similar logic to better determine
best order.
Before, it just tried to find previously vectorized node without
checking if it is possible to use the vectorized value in the shuffle.
Now it relies on the more generalized version. If it determines, that
a single vector must be reordered (using same mechanism, as codegen and
cost estimation), it generates better order.

The comparison between new/ref ordering:

Metric: SLP.NumVectorInstructions

Program                                                                                                                                                SLP.NumVectorInstructions
                                                                                                                                                       results                   results0 diff
                                                                                               test-suite :: MultiSource/Benchmarks/nbench/nbench.test   139.00                    140.00   0.7%
                                                                             test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/miniFE/miniFE.test   344.00                    346.00   0.6%
                                                                                        test-suite :: MultiSource/Benchmarks/FreeBench/pifft/pifft.test  1293.00                   1292.00  -0.1%
                                                                                test-suite :: External/SPEC/CFP2017rate/511.povray_r/511.povray_r.test  5176.00                   5170.00  -0.1%
                                                                                        test-suite :: External/SPEC/CFP2006/453.povray/453.povray.test  5173.00                   5167.00  -0.1%
                                                                                test-suite :: External/SPEC/CFP2017rate/510.parest_r/510.parest_r.test 11692.00                  11660.00  -0.3%
                                                                                     test-suite :: External/SPEC/CINT2006/464.h264ref/464.h264ref.test  1621.00                   1615.00  -0.4%
                                                                                             test-suite :: External/SPEC/CINT2006/403.gcc/403.gcc.test   795.00                    792.00  -0.4%
                                                                              test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 26499.00                  26338.00  -0.6%
                                                                                               test-suite :: MultiSource/Benchmarks/Bullet/bullet.test  7343.00                   7281.00  -0.8%
                                                                                          test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test  1104.00                   1094.00  -0.9%
                                                                                          test-suite :: MultiSource/Applications/JM/lencod/lencod.test  2216.00                   2180.00  -1.6%
                                                                                            test-suite :: External/SPEC/CFP2006/433.milc/433.milc.test   787.00                    637.00 -19.1%

Less 0% is better.
Most of the benchmarks see more vectorized code. The first ones just
have shuffles removed.

The ordering analysis still may require some improvements (e.g. for
alternate nodes), but this one should be produce better results.

Reviewers: RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/77529


  Commit: 2685e7eadce08125672f0f6013145ae45b7a5ac3
      https://github.com/llvm/llvm-project/commit/2685e7eadce08125672f0f6013145ae45b7a5ac3
  Author: Jordan Rupprecht <rupprecht at google.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M lldb/docs/resources/test.rst
    M lldb/docs/testsuite/a-detailed-walkthrough.txt
    M lldb/packages/Python/lldbsuite/test/README-TestSuite

  Log Message:
  -----------
  [lldb][docs] Remove/update docs pointing to unittest2 (#82672)


  Commit: e88c255313872185b8c9738d9fa0e624de1e1bea
      https://github.com/llvm/llvm-project/commit/e88c255313872185b8c9738d9fa0e624de1e1bea
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
    M llvm/test/Transforms/InstCombine/not.ll

  Log Message:
  -----------
  [InstCombine] Add support for cast instructions in `getFreelyInvertedImpl` (#82451)

This patch adds support for cast instructions in `getFreelyInvertedImpl`
to enable more optimizations.
Alive2: https://alive2.llvm.org/ce/z/F6maEE


  Commit: 3b20fb336d1191e7b969c30825ca8b9423550902
      https://github.com/llvm/llvm-project/commit/3b20fb336d1191e7b969c30825ca8b9423550902
  Author: Jorge Gorbe Moya <jgorbe at google.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M utils/bazel/llvm-project-overlay/libc/BUILD.bazel

  Log Message:
  -----------
  [bazel] add missing dep after 5b079af169cd04b457465fd7ca31714efeefe6d9


  Commit: f5c8e9e53130a628c2c3d25c2cbc308e62d2f3e0
      https://github.com/llvm/llvm-project/commit/f5c8e9e53130a628c2c3d25c2cbc308e62d2f3e0
  Author: Ramkumar Ramachandra <r at artagnon.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll

  Log Message:
  -----------
  LoopVectorize/test: guard pr72969 with asserts (#82653)

Follow up on 695a9d8 (LoopVectorize: add test for crash in #72969) to
guard pr72969.ll with REQUIRES: asserts, in order to be reasonably
confident that it will crash reliably.


  Commit: c1e9883a813db76c1b108ad715895928bb93f4c2
      https://github.com/llvm/llvm-project/commit/c1e9883a813db76c1b108ad715895928bb93f4c2
  Author: Matthias Gehre <93204396+mgehre-amd at users.noreply.github.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
    M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir

  Log Message:
  -----------
  [TOSA] TosaToLinalg: fix int64_t min/max lowering of clamp (#82641)

tosa.clamp takes `min`/`max` attributes as i64, so ensure that the
lowering to linalg works for the whole range.

Co-authored-by: Tiago Trevisan Jost <tiago.trevisanjost at amd.com>


  Commit: 66f6929fec3ae4770368b60aa1920623ab835f9d
      https://github.com/llvm/llvm-project/commit/66f6929fec3ae4770368b60aa1920623ab835f9d
  Author: Chris B <chris.bieneman at me.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    A clang/docs/HLSL/ExpectedDifferences.rst
    M clang/docs/HLSL/HLSLDocs.rst

  Log Message:
  -----------
  [HLSL][Doc] Add doc about expected differences (#82395)

This document covers expected differences between Clang and the HLSL
reference compiler implementations (FXC & DXC). The document is not
intended to be exhaustive, but it should be a best effort to cover known
cases.

This document should document both the behavioral difference and the
explanation of why Clang differs.

The initail document covers known overload resolution differences.

---------

Co-authored-by: S. Bharadwaj Yadavalli <Bharadwaj.Yadavalli at microsoft.com>


  Commit: 847048f497bcdfcfe52f36cba49f07bdbd63cd24
      https://github.com/llvm/llvm-project/commit/847048f497bcdfcfe52f36cba49f07bdbd63cd24
  Author: Diego Caballero <diegocaballero at google.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/Utils/IndexingUtils.h
    M mlir/lib/Dialect/Utils/IndexingUtils.cpp
    M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
    M mlir/test/Dialect/Vector/vector-transfer-flatten.mlir

  Log Message:
  -----------
  [mlir][Vector] Fix bug in vector xfer op flattening transformation (#81964)

It looks like the affine map generated to compute the indices of the
collapsed dimensions used the wrong dim size. For indices `[idx0][idx1]`
we computed the collapsed index as `idx0*size0 + idx1` instead of
`idx0*size1 + idx1`. This led to correctness issues in convolution tests
when enabling this transformation internally.


  Commit: 91e9e3175268c85f4d0e8828d0d392191c250543
      https://github.com/llvm/llvm-project/commit/91e9e3175268c85f4d0e8828d0d392191c250543
  Author: Arthur Eubanks <aeubanks at google.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachinePassManager.h
    M llvm/include/llvm/Passes/CodeGenPassBuilder.h
    M llvm/include/llvm/Passes/PassBuilder.h
    M llvm/include/llvm/Target/TargetMachine.h
    M llvm/lib/CodeGen/MachinePassManager.cpp
    M llvm/lib/Passes/PassBuilder.cpp
    M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
    M llvm/lib/Target/X86/X86TargetMachine.h
    M llvm/test/tools/llc/new-pm/pipeline.mir
    M llvm/test/tools/llc/new-pm/start-stop.ll
    M llvm/tools/llc/NewPMDriver.cpp
    M llvm/unittests/CodeGen/PassManagerTest.cpp
    M llvm/unittests/MIR/PassBuilderCallbacksTest.cpp

  Log Message:
  -----------
  [NewPM/CodeGen] Rewrite pass manager nesting (#81068)

Currently the new PM infra for codegen puts everything into a
MachineFunctionPassManager. The MachineFunctionPassManager owns both
Module passes and MachineFunction passes, and batches adjacent
MachineFunction passes like a typical PassManager.

The current MachineFunctionAnalysisManager also directly references a
module and function analysis manager to get results.

The initial argument was that the codegen pipeline is relatively "flat",
meaning it's mostly machine function passes with a couple of module
passes here and there. However, there are a couple of issues with this
as compared to a more structured nesting more like the optimization
pipeline. For example, it doesn't allow running function passes then
machine function passes on a function and its machine function all at
once. It also currently requires the caller to split out the IR passes
into one pass manager and the MIR passes into another pass manager.

This patch rewrites the new pass manager infra for the codegen pipeline
to be more similar to the nesting in the optimization pipeline.
Basically, a Function contains a MachineFunction. So we can have Module
-> Function -> MachineFunction adaptors. It also rewrites the analysis
managers to have inner/outer proxies like the ones in the optimization
pipeline. The new pass managers/adaptors/analysis managers can be seen
in use in PassManagerTest.cpp.

This allows us to consolidate to just having to add to one
ModulePassManager when using the codegen pipeline.

I haven't added the Function -> MachineFunction adaptor in this patch,
but it should be added when we merge AddIRPass/AddMachinePass so that we
can run IR and MIR passes on a function before proceeding to the next
function.

The MachineFunctionProperties infra for MIR verification is still WIP.


  Commit: 7f71fa909a10be182b82b9dfaf0fade6eb84796c
      https://github.com/llvm/llvm-project/commit/7f71fa909a10be182b82b9dfaf0fade6eb84796c
  Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/include/llvm/ADT/iterator_range.h

  Log Message:
  -----------
  Extend GCC workaround to GCC < 8.4 for llvm::iterator_range ctor (#82643)

GCC SFINAE error with decltype was fixed in commit
ac5e28911abdfb8d9bf6bea980223e199bbcf28d which made it into GCC 8.4.
Therefore adjust GCC version test accordingly.


  Commit: df6f756a19277d936ec83f7cebc2501327ac3add
      https://github.com/llvm/llvm-project/commit/df6f756a19277d936ec83f7cebc2501327ac3add
  Author: Zequan Wu <zequanwu at google.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
    A lldb/test/API/tools/lldb-dap/databreakpoint/Makefile
    A lldb/test/API/tools/lldb-dap/databreakpoint/TestDAP_setDataBreakpoints.py
    A lldb/test/API/tools/lldb-dap/databreakpoint/main.cpp
    M lldb/tools/lldb-dap/CMakeLists.txt
    M lldb/tools/lldb-dap/DAPForward.h
    A lldb/tools/lldb-dap/Watchpoint.cpp
    A lldb/tools/lldb-dap/Watchpoint.h
    M lldb/tools/lldb-dap/lldb-dap.cpp

  Log Message:
  -----------
  Re-land [lldb-dap] Add support for data breakpoint. (#81909)

This implements functionality to handle DataBreakpointInfo request and
SetDataBreakpoints request.

Previous commit
https://github.com/llvm/llvm-project/commit/8c56e78ec531f0e2460213c20fff869b6b7add99
was reverted because setting 1 byte watchpoint failed in the new test on
ARM64. So, I changed the test to setting 4 byte watchpoint instead, and
hope this won't break it again. It also adds the fixes from
https://github.com/llvm/llvm-project/pull/81680.


  Commit: 0eb64eebdecb3c138b4adfea1cbcdd03aa7d455c
      https://github.com/llvm/llvm-project/commit/0eb64eebdecb3c138b4adfea1cbcdd03aa7d455c
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn

  Log Message:
  -----------
  [gn build] Port df6f756a1927


  Commit: 45fe67dd61a6ac7df84d3a586e41c36a4767757f
      https://github.com/llvm/llvm-project/commit/45fe67dd61a6ac7df84d3a586e41c36a4767757f
  Author: Daniel Martinez <danielpedromartinez at duck.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M openmp/libomptarget/include/Shared/SourceInfo.h

  Log Message:
  -----------
  Fix build on musl by including stdint.h (#81434)

openmp fails to build on musl since it lacks the defines for int32_t

Co-authored-by: Daniel Martinez <danielmartinez at cock.li>


  Commit: 47b7c91abe7af3133a591aa2e73fffa30826f986
      https://github.com/llvm/llvm-project/commit/47b7c91abe7af3133a591aa2e73fffa30826f986
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/lib/Driver/ToolChains/CommonArgs.cpp
    M clang/test/Driver/openmp-offload-gpu.c
    M libc/CMakeLists.txt
    M libc/cmake/modules/LLVMLibCArchitectures.cmake
    M libc/cmake/modules/LLVMLibCCheckMPFR.cmake
    M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
    M libc/cmake/modules/LLVMLibCHeaderRules.cmake
    M libc/cmake/modules/LLVMLibCLibraryRules.cmake
    M libc/cmake/modules/LLVMLibCObjectRules.cmake
    M libc/cmake/modules/LLVMLibCTestRules.cmake
    M libc/cmake/modules/prepare_libc_gpu_build.cmake
    M libc/docs/gpu/using.rst
    M libc/include/CMakeLists.txt
    M libc/lib/CMakeLists.txt
    M libc/src/__support/File/CMakeLists.txt
    M libc/src/__support/GPU/CMakeLists.txt
    M libc/src/__support/OSUtil/CMakeLists.txt
    M libc/src/__support/RPC/CMakeLists.txt
    M libc/src/math/CMakeLists.txt
    M libc/src/math/gpu/vendor/CMakeLists.txt
    M libc/src/stdio/CMakeLists.txt
    M libc/src/stdlib/CMakeLists.txt
    M libc/src/string/CMakeLists.txt
    M libc/startup/gpu/CMakeLists.txt
    M libc/startup/gpu/amdgpu/CMakeLists.txt
    M libc/startup/gpu/nvptx/CMakeLists.txt
    M libc/test/CMakeLists.txt
    M libc/test/IntegrationTest/CMakeLists.txt
    M libc/test/UnitTest/CMakeLists.txt
    M libc/test/src/__support/CMakeLists.txt
    M libc/test/src/__support/CPP/CMakeLists.txt
    M libc/test/src/__support/File/CMakeLists.txt
    M libc/test/src/errno/CMakeLists.txt
    M libc/test/src/math/CMakeLists.txt
    M libc/test/src/math/smoke/CMakeLists.txt
    M libc/test/src/stdio/CMakeLists.txt
    M libc/test/src/stdlib/CMakeLists.txt
    M libc/test/utils/UnitTest/CMakeLists.txt
    M libc/utils/CMakeLists.txt
    M libc/utils/MPFRWrapper/CMakeLists.txt
    M libc/utils/gpu/CMakeLists.txt
    M libc/utils/gpu/loader/CMakeLists.txt
    M libc/utils/gpu/loader/amdgpu/CMakeLists.txt
    M libc/utils/gpu/loader/nvptx/CMakeLists.txt
    M libc/utils/gpu/server/CMakeLists.txt
    M llvm/CMakeLists.txt
    M llvm/cmake/modules/HandleLLVMOptions.cmake
    M llvm/runtimes/CMakeLists.txt
    M openmp/libomptarget/CMakeLists.txt
    M openmp/libomptarget/plugins-nextgen/common/CMakeLists.txt
    M openmp/libomptarget/plugins-nextgen/common/src/RPC.cpp
    M openmp/libomptarget/test/lit.cfg

  Log Message:
  -----------
  [libc] Rework the GPU build to be a regular target (#81921)

Summary:
This is a massive patch because it reworks the entire build and
everything that depends on it. This is not split up because various bots
would fail otherwise. I will attempt to describe the necessary changes
here.

This patch completely reworks how the GPU build is built and targeted.
Previously, we used a standard runtimes build and handled both NVPTX and
AMDGPU in a single build via multi-targeting. This added a lot of
divergence in the build system and prevented us from doing various
things like building for the CPU / GPU at the same time, or exporting
the startup libraries or running tests without a full rebuild.

The new appraoch is to handle the GPU builds as strict cross-compiling
runtimes. The first step required
https://github.com/llvm/llvm-project/pull/81557 to allow the `LIBC`
target to build for the GPU without touching the other targets. This
means that the GPU uses all the same handling as the other builds in
`libc`.

The new expected way to build the GPU libc is with
`LLVM_LIBC_RUNTIME_TARGETS=amdgcn-amd-amdhsa;nvptx64-nvidia-cuda`.

The second step was reworking how we generated the embedded GPU library
by moving it into the library install step. Where we previously had one
`libcgpu.a` we now have `libcgpu-amdgpu.a` and `libcgpu-nvptx.a`. This
patch includes the necessary clang / OpenMP changes to make that not
break the bots when this lands.

We unfortunately still require that the NVPTX target has an `internal`
target for tests. This is because the NVPTX target needs to do LTO for
the provided version (The offloading toolchain can handle it) but cannot
use it for the native toolchain which is used for making tests.

This approach is vastly superior in every way, allowing us to treat the
GPU as a standard cross-compiling target. We can now install the GPU
utilities to do things like use the offload tests and other fun things.

Some certain utilities need to be built with 
`--target=${LLVM_HOST_TRIPLE}` as well. I think this is a fine
workaround as we
will always assume that the GPU `libc` is a cross-build with a
functioning host.

Depends on https://github.com/llvm/llvm-project/pull/81557


  Commit: 3ed4b95bcf2039e7293f45e3b3fdf26b81dc319f
      https://github.com/llvm/llvm-project/commit/3ed4b95bcf2039e7293f45e3b3fdf26b81dc319f
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M flang/test/Driver/omp-driver-offload.f90

  Log Message:
  -----------
  [Flang] Fix test not updated after 'clang' case change

Summary:
The shared 'clang' code changed this slightly but did not update the
flang test.


  Commit: 72763521c34287bce68402eb2a9d71dcb4eed5a0
      https://github.com/llvm/llvm-project/commit/72763521c34287bce68402eb2a9d71dcb4eed5a0
  Author: Nikita Popov <nikita.ppv at gmail.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
    A llvm/test/Transforms/LoopStrengthReduce/RISCV/term-fold-crash.ll

  Log Message:
  -----------
  [LSR] Clear SCEVExpander before calling DeleteDeadPHIs

To avoid an assertion failure when an AssertingVH is removed,
as reported in:
https://github.com/llvm/llvm-project/pull/82362#issuecomment-1960067147

Also remove an unnecessary use of SCEVExpanderCleaner.


  Commit: d4bfca3b2e673789f7c278d46a199ae8910ddd37
      https://github.com/llvm/llvm-project/commit/d4bfca3b2e673789f7c278d46a199ae8910ddd37
  Author: Wentao Zhang <35722712+whentojump at users.noreply.github.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/lib/CodeGen/CodeGenPGO.cpp

  Log Message:
  -----------
  [clang][CodeGen] Keep processing the rest of AST after encountering unsupported MC/DC expressions (#82464)

Currently, upon seeing unsupported decisions (more than 6 conditions, or
split nesting), the post-visitor hook dataTraverseStmtPost() returns a
false. As a result, in the rest of tree even supported decisions will
be skipped as well. Like in the below code:

{ // CompoundStmt
  a && b;           // 1: BinaryOperator (supported)
  a && foo(b && c); // 2: BinaryOperator (not yet supported due to split
                    //                    nesting)
  a && b;           // 3: BinaryOperator (supported)
}

Decision 3 will not be processed at all. And only one "Decision" region
will be emitted. Compiler explorer example:
https://godbolt.org/z/Px61sesoo

We hope to process such cases and emit two "Decision" regions (1 and 3)
in the above example.


  Commit: ae3e14276b7181ae51e9ef731f44f813a1a3f123
      https://github.com/llvm/llvm-project/commit/ae3e14276b7181ae51e9ef731f44f813a1a3f123
  Author: Diego Caballero <diegocaballero at google.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M mlir/test/Dialect/Vector/vector-transfer-flatten.mlir

  Log Message:
  -----------
  Fix test/Dialect/Vector/vector-transfer-flatten.mlir


  Commit: e2f08268304dc972440391c43bf1d47e28fad93e
      https://github.com/llvm/llvm-project/commit/e2f08268304dc972440391c43bf1d47e28fad93e
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td

  Log Message:
  -----------
  [MLIR] Fix LLVM dialect specification to use AnySignlessInteger instead of AnyInteger (#82694)

LLVM IR does not support signed integer, the LLVM dialect was
underspecified (likely unintentionally) and the AnyInteger constraint
was overly lax.

The arithmetic dialect is already consistently using AnySignlessInteger.


  Commit: e314622f204a01ffeda59cbe046dd403b01f8b74
      https://github.com/llvm/llvm-project/commit/e314622f204a01ffeda59cbe046dd403b01f8b74
  Author: Paul Kirth <paulkirth at google.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/Driver/ToolChains/Arch/ARM.cpp
    M clang/test/Driver/arm-alignment.c

  Log Message:
  -----------
  [clang][driver] Allow unaligned access on ARMv7 and higher by default (#82400)

ARM's Clang and GCC embedded compilers default to allowing unaligned
access for ARMv7+. This patch changes the Clang driver default to match.
Users can opt out with `-mno-unaligned-access`.

Fixes #59560


  Commit: d5a15f3116f8c3ec32df1f13a2fc521a98b03d96
      https://github.com/llvm/llvm-project/commit/d5a15f3116f8c3ec32df1f13a2fc521a98b03d96
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/lib/Driver/ToolChains/Cuda.cpp
    M clang/test/Driver/cuda-cross-compiling.c
    M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp

  Log Message:
  -----------
  [Clang][NVPTX] Allow passing arguments to the linker while standalone (#73030)

Summary:
We support standalone compilation for the NVPTX architecture using
'nvlink' as our linker. Because of the special handling required to
transform input files to cubins, as nvlink expects for some reason, we
didn't use the standard AddLinkerInput method. However, this also meant
that we weren't forwarding options passed with -Wl to the linker. Add
this support in for the standalone toolchain path.

Revived from https://reviews.llvm.org/D149978


  Commit: 018c992879248ad28a04fc7d061922f5ccee4e08
      https://github.com/llvm/llvm-project/commit/018c992879248ad28a04fc7d061922f5ccee4e08
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M flang/test/Driver/omp-driver-offload.f90

  Log Message:
  -----------
  [Flang] Fix the test ordering of the GPU libraries

Summary:
Turns out these are out of order


  Commit: bc5aba9dd63f919037aded04405f3e05092c9039
      https://github.com/llvm/llvm-project/commit/bc5aba9dd63f919037aded04405f3e05092c9039
  Author: Michael Liao <michael.hliao at gmail.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/unittests/MIR/CMakeLists.txt

  Log Message:
  -----------
  [CodeGen][MIR][UnitTests] Fix shared build. NFC


  Commit: 87b410821148402d74ac7a14bed233078a49cb7b
      https://github.com/llvm/llvm-project/commit/87b410821148402d74ac7a14bed233078a49cb7b
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M openmp/libomptarget/include/PluginManager.h
    M openmp/libomptarget/include/Shared/PluginAPI.inc
    M openmp/libomptarget/src/PluginManager.cpp

  Log Message:
  -----------
  [Libomptarget][NFC] Remove concept of optional plugin functions (#82681)

Summary:
Ever since the introduction of the new plugins we haven't exercised the
concept of "optional" plugin functions. This is done in perparation for
making the plugins use a static interface as it will greatly simplify
the implementation if we assert that every function has the entrypoints.
Currently some unsupported functions will just return failure or some
other default value, so this shouldn't change anything.


  Commit: e3cab8fe82eb71fadb251d11fec7df9fa0dbdd27
      https://github.com/llvm/llvm-project/commit/e3cab8fe82eb71fadb251d11fec7df9fa0dbdd27
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/test/Driver/linker-wrapper.c

  Log Message:
  -----------
  [LinkerWrapper] Fix test after permitting NVPTX linker arguments

Summary:
Forgot to change this after a previous patch altered its behaviour.


  Commit: 4ebee956455caa0da7783280f8515040eac89d08
      https://github.com/llvm/llvm-project/commit/4ebee956455caa0da7783280f8515040eac89d08
  Author: Jie Fu <jiefu at tencent.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/unittests/MIR/PassBuilderCallbacksTest.cpp

  Log Message:
  -----------
  [mlir][test] Fix -Wunused-variable in PassBuilderCallbacksTest.cpp (NFC)

llvm-project/llvm/unittests/MIR/PassBuilderCallbacksTest.cpp:333:10:
error: unused variable 'Ret' [-Werror,-Wunused-variable]
    bool Ret = MIR->parseMachineFunctions(*Mod, MMI);
         ^
1 error generated.


  Commit: e8740d4eb1c88e968b155f73ac745f80b4681589
      https://github.com/llvm/llvm-project/commit/e8740d4eb1c88e968b155f73ac745f80b4681589
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/test/Driver/cuda-cross-compiling.c

  Log Message:
  -----------
  [Clang] Fix missing architecture on CUDA test

Summary:
Sorry about the churn here, my local git tree got corrupted so a few
broken tests slipped by while trying to fix it.


  Commit: 5bd0c44bd0b944230ba05c87c19292304b84e980
      https://github.com/llvm/llvm-project/commit/5bd0c44bd0b944230ba05c87c19292304b84e980
  Author: Petr Hosek <phosek at google.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M libc/include/llvm-libc-macros/sys-queue-macros.h

  Log Message:
  -----------
  [libc] Match the names of BSD sys/queue.h member names (#82696)

While these names are technically internal implemenetation detail,
there's an existing code which relies on these details and using
different names makes LLVM libc implementation incompatible. Since our
goal is for LLVM libc to be a drop in replacement, use the same name as
BSD sys/queue.h version.


  Commit: aaf2d078b62251b867f37eaa94621dbbbfa0e5b0
      https://github.com/llvm/llvm-project/commit/aaf2d078b62251b867f37eaa94621dbbbfa0e5b0
  Author: Sumanth Gundapaneni <sgundapa at quicinc.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/Hexagon/CMakeLists.txt
    M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
    A llvm/lib/Target/Hexagon/HexagonTfrCleanup.cpp
    M llvm/test/CodeGen/Hexagon/atomicrmw-uinc-udec-wrap.ll
    M llvm/test/CodeGen/Hexagon/isel/select-vec.ll
    M llvm/test/CodeGen/Hexagon/reg-by-name.ll
    A llvm/test/CodeGen/Hexagon/tfr-slotindex.ll

  Log Message:
  -----------
  [Hexagon] Clean up redundant transfer instructions. (#82663)

This patch adds a Hexagon specific backend pass that cleans up redundant
transfers after register allocation.


  Commit: 568babab7e769a7793c28aee4f889898bf0bd8ba
      https://github.com/llvm/llvm-project/commit/568babab7e769a7793c28aee4f889898bf0bd8ba
  Author: Pavel Iliin <Pavel.Iliin at arm.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M clang/lib/Basic/Targets/AArch64.cpp
    M clang/lib/Basic/Targets/AArch64.h
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/lib/CodeGen/CodeGenFunction.h
    A clang/test/CodeGen/aarch64-cpu-supports-target.c
    A clang/test/CodeGen/aarch64-cpu-supports.c
    M clang/test/Preprocessor/has_builtin_cpuid.c
    A clang/test/Sema/aarch64-cpu-supports.c
    M clang/test/Sema/builtin-cpu-supports.c
    A compiler-rt/test/builtins/Unit/aarch64_cpu_features_test.c
    M compiler-rt/test/builtins/Unit/cpu_model_test.c

  Log Message:
  -----------
  [AArch64] Implement __builtin_cpu_supports, compiler-rt tests. (#82378)

The patch complements https://github.com/llvm/llvm-project/pull/68919
and adds AArch64 support for builtin
`__builtin_cpu_supports("feature1+...+featureN")`
which return true if all specified CPU features in argument are
detected. Also compiler-rt aarch64 native run tests for features
detection mechanism were added and 'cpu_model' check was fixed after its
refactor merged https://github.com/llvm/llvm-project/pull/75635 Original
RFC was https://reviews.llvm.org/D153153


  Commit: 2b0f5667e2b40729f714459093eb16cc53fc9e9a
      https://github.com/llvm/llvm-project/commit/2b0f5667e2b40729f714459093eb16cc53fc9e9a
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/BUILD.gn

  Log Message:
  -----------
  [gn build] Port aaf2d078b622


  Commit: d57f158a9546746219e3b01398886e104d8a0fdb
      https://github.com/llvm/llvm-project/commit/d57f158a9546746219e3b01398886e104d8a0fdb
  Author: Jerry-Ge <jerry.ge at arm.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
    M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
    M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
    M mlir/test/Dialect/Tosa/ops.mlir

  Log Message:
  -----------
  [Tosa] Add Tosa Sin and Cos operators (#82510)

- Add Tosa Sin and Cos operators to the MLIR dialect
- Define the new Tosa_FloatTensor type

---------

Signed-off-by: Jerry Ge <jerry.ge at arm.com>


  Commit: f37c6d55c6a0c695418932a55bac6a517be4a53a
      https://github.com/llvm/llvm-project/commit/f37c6d55c6a0c695418932a55bac6a517be4a53a
  Author: vangthao95 <vang.thao at amd.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h

  Log Message:
  -----------
  [AMDGPU][NFC] Refactor SIInsertWaitcnts zero waitcnt generation (#82575)

Move the allZero* waitcnt generation methods into WaitcntGenerator
class.


  Commit: cd1d4d8dd31f527615de26f5b62d687c6b2982a6
      https://github.com/llvm/llvm-project/commit/cd1d4d8dd31f527615de26f5b62d687c6b2982a6
  Author: Diego Caballero <diegocaballero at google.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M mlir/test/Dialect/Vector/vector-transfer-flatten.mlir

  Log Message:
  -----------
  [mlir][Vector] Add missing CHECK rules to vector-transfer-flatten.mlir (#82698)

This test failed after landing #81964 due to a bad merge. I provided a quick fix and this PR is adding the rest of CHECK rules that were not merged properly.


  Commit: ac518c7c9916a6fde1d898b8c53b74298fd00d5f
      https://github.com/llvm/llvm-project/commit/ac518c7c9916a6fde1d898b8c53b74298fd00d5f
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsubu.ll

  Log Message:
  -----------
  [RISCV] Vector sub (zext, zext) -> sext (sub (zext, zext)) (#82455)

This is legal as long as the inner zext retains at least one bit of
increase so that the sub overflow case (0 - UINT_MAX) can be
represented. Alive2 proof: https://alive2.llvm.org/ce/z/BKeV3W

For RVV, restrict this to power of two sizes with the operation type
being at least e8 to stick to legal extends. We could arguably handle i1
source types with some care if we wanted to.

This is likely profitable because it may allow us to perform the sub
instruction in a narrow LMUL (equivalently, in fewer DLEN-sized pieces)
before widening for the user. We could arguably avoid narrowing below
DLEN, but the transform should at worst introduce one extra extend and
one extra vsetvli toggle if the source could previously be handled via
loads explicit w/EEW.


  Commit: 9e84a22e6989494709d30a03ce9b304956fc0ae2
      https://github.com/llvm/llvm-project/commit/9e84a22e6989494709d30a03ce9b304956fc0ae2
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
    M libc/cmake/modules/LLVMLibCTestRules.cmake

  Log Message:
  -----------
  [libc] Silence warnings when building GPU tests (#82701)

Summary:
This patch silences two warnings that may occur during the building of
GPU tests. These are not informative or helpful and just make the test
output longer.


  Commit: 7a5c01dbca3ddfc6dd87775ec90346783c8e2c73
      https://github.com/llvm/llvm-project/commit/7a5c01dbca3ddfc6dd87775ec90346783c8e2c73
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M libc/cmake/modules/prepare_libc_gpu_build.cmake

  Log Message:
  -----------
  [libc] Search the compiler's path for GPU utility tools (#82712)

Summary:
We need some extra tools for the GPU build. Normally we search for these
from the build itself, but in the case of a `LLVM_PROJECTS_BUILD` or
some other kind of external build, this directory will not be populated.
However, the GPU build already requires that the compiler is an
up-to-date clang, which should always have these present next to the
binary. Simply add this as a fallback search path. Generally we want it
to be the second, because it would pick up someone install and then
become stale.


  Commit: 590c968e7943e51bb00ff75d312435f24d983b2a
      https://github.com/llvm/llvm-project/commit/590c968e7943e51bb00ff75d312435f24d983b2a
  Author: Alex MacLean <amaclean at nvidia.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
    M llvm/test/CodeGen/NVPTX/param-load-store.ll
    A llvm/test/CodeGen/NVPTX/unaligned-param-load-store.ll

  Log Message:
  -----------
  [NVPTX] fixup support for unaligned parameters and returns (#82562)

Add support for unaligned parameters and return values. These must be
loaded and stored one byte at a time and then bit manipulation is used
to assemble the correct final result.


  Commit: 19e518d2623c0e87a87ebf30405e74448bd1ee70
      https://github.com/llvm/llvm-project/commit/19e518d2623c0e87a87ebf30405e74448bd1ee70
  Author: Younan Zhang <zyn7109 at gmail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/Parse/ParseExprCXX.cpp
    M clang/test/Parser/cxx-concepts-requires-clause.cpp

  Log Message:
  -----------
  [Clang][Parser] Have the depth of the abbreviated generic lambdas inside a requires clause differ from the surrounding generic lambda (#80656)

A one-line fix, again : )

This fixes https://github.com/llvm/llvm-project/issues/78524 and the
similar example at
https://github.com/llvm/llvm-project/issues/78524#issuecomment-1899886951.

We previously increased the template depth by one after parsing the
attaching requires-clause on a lambda expression. This led to a problem
where the 'auto' parameters of nested abbreviated generic lambdas,
inside of a requires-expression, had the same depth as the template
parameters of the surrounding lambda. Consequently, during the
concept-checking stage, we ended up substituting these parameters with
the wrong template arguments because they were at different levels.


  Commit: 5ccf54640a2bdb6f36f65c574feb312da7f75243
      https://github.com/llvm/llvm-project/commit/5ccf54640a2bdb6f36f65c574feb312da7f75243
  Author: huaatian <142874007+huaatian at users.noreply.github.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/cmake/modules/HandleLLVMOptions.cmake

  Log Message:
  -----------
  [llvm][cmake] Performing expensive checks requires enabling assert. (#80821)

LLVM will intercept errors using assert() when
LLVM_ENABLE_EXPENSIVE_CHECKS is ON. So an explicit check is added.

---------

Co-authored-by: Hua Tian <akiratian at tencent.com>


  Commit: 2e5af56b05c2d39ab2c829bf4c13190523b67ddd
      https://github.com/llvm/llvm-project/commit/2e5af56b05c2d39ab2c829bf4c13190523b67ddd
  Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/include/clang/Frontend/ASTUnit.h
    M clang/include/clang/Frontend/CompilerInstance.h
    M clang/include/clang/Frontend/CompilerInvocation.h
    M clang/lib/Frontend/ASTUnit.cpp
    M clang/lib/Frontend/FrontendAction.cpp
    A clang/test/Modules/compile-pcm-with-pic.cppm
    M clang/tools/c-index-test/core_main.cpp
    M clang/tools/libclang/CIndex.cpp

  Log Message:
  -----------
  [C++20] [Modules] Allow to compile a pcm with and without -fPIC
seperately

We can compile a module unit in 2 phase compilaton:

```
clang++ -std=c++20 a.cppm --precompile -o a.pcm
clang++ -std=c++20 a.pcm -c -o a.o
```

And it is a general requirement that we need to compile a translation
unit with and without -fPIC for static and shared libraries.

But for C++20 modules with 2 phase compilation, it may be waste of time
to compile them 2 times completely. It may be fine to generate one BMI
and compile it with and without -fPIC seperately.

e.g.,

```
clang++ -std=c++20 a.cppm --precompile -o a.pcm
clang++ -std=c++20 a.pcm -c -o a.o
clang++ -std=c++20 a.pcm -c -fPIC -o a-PIC.o
```

Then we can save the time to parse a.cppm repeatedly.


  Commit: 6e6bf9f81756ba6655b4eea8dc45469a47f89b39
      https://github.com/llvm/llvm-project/commit/6e6bf9f81756ba6655b4eea8dc45469a47f89b39
  Author: Heejin Ahn <aheejin at gmail.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
    M llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-multi-return.ll
    M llvm/test/CodeGen/WebAssembly/multivalue-dont-move-def-past-use.mir
    M llvm/test/CodeGen/WebAssembly/multivalue-stackify.ll
    M llvm/test/CodeGen/WebAssembly/multivalue.ll
    M llvm/test/CodeGen/WebAssembly/multivalue_libcall.ll

  Log Message:
  -----------
  [WebAssembly] Disable multivalue emission temporarily (#82714)

We plan to enable multivalue in the features section soon (#80923) for
other reasons, such as the feature having been standardized for many
years and other features being developed (e.g. EH) depending on it. This
is separate from enabling Clang experimental multivalue ABI (`-Xclang
-target-abi -Xclang experimental-mv`), but it turned out we generate
some multivalue code in the backend as well if it is enabled in the
features section.

Given that our backend multivalue generation still has not been much
used nor tested, and enabling the feature in the features section can be
a separate decision from how much multialue (including none) we decide
to generate for now, I'd like to temporarily disable the actual
generation of multivalue in our backend. To do that, this adds an
internal flag `-wasm-emit-multivalue` that defaults to false. All our
existing multivalue tests can use this to test multivalue code. This
flag can be removed later when we are confident the multivalue
generation is well tested.


  Commit: ca09e08239008759f92f4aff39c7640da3e1bfa9
      https://github.com/llvm/llvm-project/commit/ca09e08239008759f92f4aff39c7640da3e1bfa9
  Author: Derek Schuff <dschuff at chromium.org>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Object/SymbolSize.cpp
    M llvm/test/tools/llvm-symbolizer/wasm-basic.s

  Log Message:
  -----------
  [Symbolizer][WebAssembly] Use wasm-specific getSymbolSize (#82083)

getSymbolSize was recently added to WasmObjectFile and has correct sizes 
for most symbol types. This makes llvm-symbolizer correctly symbolize
addresses in the middle of the symbol.

When reworking the test I also noticed that the DWARF info seems to be
wrong for the first instruction in each function. I noted that in the test
comments but didn't attempt to fix here.


  Commit: de41eae41f0dc2a844b439e0246e29c1bcbb2d03
      https://github.com/llvm/llvm-project/commit/de41eae41f0dc2a844b439e0246e29c1bcbb2d03
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp

  Log Message:
  -----------
  [SelectionDAG][RISCV] Use FP type for legality query for LRINT/LLRINT in LegalizeVectorOps. (#82728)

This matches how LRINT/LLRINT is queried for scalar types in
LegalizeDAG.

It's confusing if they do different things since a "Legal" vector
LRINT/LLRINT would get through to LegalizeDAG which would then consider
it illegal. This doesn't happen currently because RISC-V uses Custom.


  Commit: 2d50703ddd4fcf7826e4b62cba38e3151314ca60
      https://github.com/llvm/llvm-project/commit/2d50703ddd4fcf7826e4b62cba38e3151314ca60
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp

  Log Message:
  -----------
  [RISCV] Use RISCVSubtarget::getRealVLen() in more places. NFC

Catching a couple of more places where we can use the new query added in
8603a7b2.


  Commit: 0d72fe9777e7c131dfb50c172b944d64437e2ece
      https://github.com/llvm/llvm-project/commit/0d72fe9777e7c131dfb50c172b944d64437e2ece
  Author: shkoo <nils at risczero.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M mlir/include/mlir/Interfaces/FunctionInterfaces.td

  Log Message:
  -----------
  [mlir] Fix FunctionOpInterface extraSharedClassDeclaration to be fully namespace qualified (#82682)

`extraSharedClassDeclaration` of `FunctionOpInterface` can be inherited
by other `OpInterfaces` into foreign namespaces, thus types must be
fully qualified to prevent compiler errors, for example:

    def MyFunc : OpInterface<"MyFunc", [FunctionOpInterface]> {
        let cppNamespace = "::MyNamespace";
    }


  Commit: afd469023aad10786eaea3d444047a558ad8d5c1
      https://github.com/llvm/llvm-project/commit/afd469023aad10786eaea3d444047a558ad8d5c1
  Author: Jonas Devlieghere <jonas at devlieghere.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M lldb/include/lldb/Interpreter/OptionValueSInt64.h
    M lldb/include/lldb/Interpreter/OptionValueUInt64.h
    M lldb/source/Core/CoreProperties.td
    M lldb/source/Core/Debugger.cpp
    M lldb/source/Interpreter/OptionValueUInt64.cpp
    M lldb/test/API/commands/settings/TestSettings.py
    M lldb/test/API/functionalities/progress_reporting/TestTrimmedProgressReporting.py

  Log Message:
  -----------
  [lldb] Fix term-width setting (#82736)

I noticed that the term-width setting would always report its default
value (80) despite the driver correctly setting the value with
SBDebugger::SetTerminalWidth.

```
(lldb) settings show term-width
term-width (int) = 80
```

The issue is that the setting was defined as a SInt64 instead of a
UInt64 while the getter returned an unsigned value. There's no reason
the terminal width should be a signed value. My best guess it that it
was using SInt64 because UInt64 didn't support min and max values. I
fixed that and correct the type and now lldb reports the correct
terminal width:

```
(lldb) settings show term-width
term-width (unsigned) = 189
```

rdar://123488999


  Commit: 850dde063b7f70bb592723064385e9f9ad39c96e
      https://github.com/llvm/llvm-project/commit/850dde063b7f70bb592723064385e9f9ad39c96e
  Author: Yeting Kuo <46629943+yetingk at users.noreply.github.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/docs/LangRef.rst
    M llvm/include/llvm/IR/Intrinsics.td
    M llvm/include/llvm/IR/VPIntrinsics.def
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    A llvm/lib/CodeGen/SelectionDAG/MatchContext.h
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
    M llvm/unittests/IR/VPIntrinsicTest.cpp

  Log Message:
  -----------
  [RISCV][VP] Introduce vp saturating addition/subtraction and RISC-V support. (#82370)

This patch also pick the MatchContext framework from DAGCombiner to an
indiviual header file to make the framework be used from other files in
llvm/lib/CodeGen/SelectionDAG/.


  Commit: d7a28f7ad77504694ad8bdc6b2aaa8938f08fbdd
      https://github.com/llvm/llvm-project/commit/d7a28f7ad77504694ad8bdc6b2aaa8938f08fbdd
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

  Log Message:
  -----------
  [RISCV] Add asserts for insert/extract_subvector invariants. NFC

We can currently select insert_subvector and extract_subvector nodes in
RISCVISelDAGToDAG (this is after custom legalizing in RISCVISelLowering)
with fixed subvector types.

However decomposeSubvectorInsertExtractToSubRegs is based off of
scalable subvectors where the indices are scaled by vscale, so any index
other than 0 will be wrong.

For insert_subvector the vector being inserted into needs to be undef as
well, because it assumes we can replace a whole subregister which isn't
always the case for fixed subvectors (e.g. insert <2 x i32> into <4 x
i32> at index 0 with vlen=128).

We currently maintain these invariants in RISCVISelLowering, so this
adds asserts in RISCVISelDAGToDAG so we don't break them.


  Commit: 1fe6be8794964c011aeba7a66bd2dcd891d21ab0
      https://github.com/llvm/llvm-project/commit/1fe6be8794964c011aeba7a66bd2dcd891d21ab0
  Author: Freddy Ye <freddy.ye at intel.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/lib/Headers/cpuid.h
    M clang/test/CodeGen/target-builtin-noerror.c
    M compiler-rt/lib/builtins/cpu_model/x86.c
    M llvm/include/llvm/TargetParser/X86TargetParser.def
    M llvm/lib/TargetParser/Host.cpp

  Log Message:
  -----------
  [X86] Support APXF to enable __builtin_cpu_supports. (#80636)

For referring, APX's spec:
https://cdrdv2.intel.com/v1/dl/getContent/784266
APX's index in libgcc:
https://github.com/gcc-mirror/gcc/blob/master/gcc/common/config/i386/i386-cpuinfo.h#L267


  Commit: 354401f8d3dc08ed41895d03a12a122e9cc0482c
      https://github.com/llvm/llvm-project/commit/354401f8d3dc08ed41895d03a12a122e9cc0482c
  Author: Jonas Devlieghere <jonas at devlieghere.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M lldb/source/Core/Debugger.cpp

  Log Message:
  -----------
  [lldb] Fix GetTerminalWidth after afd469023aad

afd469023aad fixed the type of the term-width setting but the getter
(Debugger::GetTerminalWidth) was still trying to get the terminal width
as an unsigned. This fixes TestXMLRegisterFlags.py.


  Commit: 531e8c26b3f2626e7f1a997e0e8b61d67d10aded
      https://github.com/llvm/llvm-project/commit/531e8c26b3f2626e7f1a997e0e8b61d67d10aded
  Author: Dani <DanielKristofKiss at users.noreply.github.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/include/llvm/IR/AutoUpgrade.h
    M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
    M llvm/lib/IR/AutoUpgrade.cpp
    M llvm/lib/Linker/IRMover.cpp
    M llvm/test/Bitcode/upgrade-arc-runtime-calls.ll
    M llvm/test/LTO/AArch64/link-branch-target-enforcement.ll
    A llvm/test/LTO/AArch64/link-sign-return-address.ll
    M llvm/test/Linker/link-arm-and-thumb.ll

  Log Message:
  -----------
  [llvm][AArch64] Autoupgrade function attributes from Module attributes. (#80640)

`sign-return-address` and similar module attributes should be propagated
to the function level before modules got merged because module flags may
contradict and this information is not recoverable.
Generated code will match with the normal linking flow.


  Commit: 6fae3e784472751002570f367c378cb2dbd82c26
      https://github.com/llvm/llvm-project/commit/6fae3e784472751002570f367c378cb2dbd82c26
  Author: Dani <DanielKristofKiss at users.noreply.github.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/include/llvm/IR/Attributes.td
    M llvm/lib/IR/Attributes.cpp
    A llvm/test/Transforms/Inline/inline-sign-return-address.ll
    M llvm/utils/TableGen/Attributes.cpp

  Log Message:
  -----------
  [llvm][AArch64] Do not inline a function with different signing scheme. (#80642)

If the signing scheme is different that maybe the functions assumes
different behaviours and dangerous to inline them without analysing
them. This should be a rare case.


  Commit: 5ca877591e65acf18b5a8d3234ff88b215b4f369
      https://github.com/llvm/llvm-project/commit/5ca877591e65acf18b5a8d3234ff88b215b4f369
  Author: Balázs Kéri <balazs.keri at ericsson.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
    A clang/test/Analysis/stream-invalidate.c

  Log Message:
  -----------
  [clang][analyzer] Fix argument invalidations in StreamChecker. (#79470)

Specific arguments passed to stream handling functions are changed by
the function, this means these should be invalidated ("escaped") by the
analyzer. This change adds the argument invalidation (in specific cases)
to the checker.


  Commit: d68d29516102252f6bf6dc23fb22cef144ca1cb3
      https://github.com/llvm/llvm-project/commit/d68d29516102252f6bf6dc23fb22cef144ca1cb3
  Author: Matthias Springer <me at m-sp.org>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M mlir/lib/Transforms/Utils/DialectConversion.cpp

  Log Message:
  -----------
  [mlir][Transforms][NFC] Turn op/block arg replacements into `IRRewrite`s (#81757)

This commit is a refactoring of the dialect conversion. The dialect
conversion maintains a list of "IR rewrites" that can be committed (upon
success) or rolled back (upon failure).

Until now, op replacements and block argument replacements were kept
track in separate data structures inside the dialect conversion. This
commit turns them into `IRRewrite`s, so that they can be committed or
rolled back just like any other rewrite. This simplifies the internal
state of the dialect conversion.

Overview of changes:
* Add two new rewrite classes: `ReplaceBlockArgRewrite` and
`ReplaceOperationRewrite`. Remove the `OpReplacement` helper class; it
is now part of `ReplaceOperationRewrite`.
* Simplify `RewriterState`: `numReplacements` and `numArgReplacements`
are no longer needed. (Now being kept track of by `numRewrites`.)
* Add `IRRewrite::cleanup`. Operations should not be erased in `commit`
because they may still be referenced in other internal state of the
dialect conversion (`mapping`). Detaching operations is fine.
* `trackedOps` are now updated during the "commit" phase instead of
after applying all rewrites.


  Commit: b014944e47ba6e2031e968268b15fba43a9e1dbf
      https://github.com/llvm/llvm-project/commit/b014944e47ba6e2031e968268b15fba43a9e1dbf
  Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/docs/StandardCPlusPlusModules.rst

  Log Message:
  -----------
  [NFC] [doc] Mentioning to include the guard headers from imported modules


  Commit: ace83da316fbd2196fa35e8fd90218dcf84a020c
      https://github.com/llvm/llvm-project/commit/ace83da316fbd2196fa35e8fd90218dcf84a020c
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/lib/AST/Interp/Descriptor.h
    M clang/lib/AST/Interp/Disasm.cpp
    M clang/lib/AST/Interp/Program.h

  Log Message:
  -----------
  [clang][Interp][NFC] Improve Program dump()ing

Add colors as well as more details for global variables.


  Commit: 9ca70d72f4f217ff4f6ab337ad4a8e6666860791
      https://github.com/llvm/llvm-project/commit/9ca70d72f4f217ff4f6ab337ad4a8e6666860791
  Author: Matthias Springer <me at m-sp.org>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M mlir/lib/Transforms/Utils/DialectConversion.cpp

  Log Message:
  -----------
  [mlir][Transforms][NFC] Turn op creation into `IRRewrite` (#81759)

This commit is a refactoring of the dialect conversion. The dialect
conversion maintains a list of "IR rewrites" that can be committed (upon
success) or rolled back (upon failure).

Until now, the dialect conversion kept track of "op creation" in
separate internal data structures. This commit turns "op creation" into
an `IRRewrite` that can be committed and rolled back just like any other
rewrite. This commit simplifies the internal state of the dialect
conversion.


  Commit: 59ff4d131c7d6b3bfcbe8e96cac99c9d8a65bf4e
      https://github.com/llvm/llvm-project/commit/59ff4d131c7d6b3bfcbe8e96cac99c9d8a65bf4e
  Author: Matthias Springer <me at m-sp.org>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M mlir/lib/Transforms/Utils/DialectConversion.cpp

  Log Message:
  -----------
  [mlir][Transforms][NFC] Turn unresolved materializations into `IRRewrite`s (#81761)

This commit is a refactoring of the dialect conversion. The dialect
conversion maintains a list of "IR rewrites" that can be committed (upon
success) or rolled back (upon failure).

This commit turns the creation of unresolved materializations
(`unrealized_conversion_cast`) into `IRRewrite` objects. After this
commit, all steps in `applyRewrites` and `discardRewrites` are calls to
`IRRewrite::commit` and `IRRewrite::rollback`.


  Commit: b13c8e5099ec7886fcd198b1f6aec14f928c963c
      https://github.com/llvm/llvm-project/commit/b13c8e5099ec7886fcd198b1f6aec14f928c963c
  Author: Daniel Kiss <daniel.kiss at arm.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/include/llvm/IR/AutoUpgrade.h
    M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
    M llvm/lib/IR/AutoUpgrade.cpp
    M llvm/lib/Linker/IRMover.cpp
    M llvm/test/Bitcode/upgrade-arc-runtime-calls.ll
    M llvm/test/LTO/AArch64/link-branch-target-enforcement.ll
    R llvm/test/LTO/AArch64/link-sign-return-address.ll
    M llvm/test/Linker/link-arm-and-thumb.ll

  Log Message:
  -----------
  Revert "[llvm][AArch64] Autoupgrade function attributes from Module attributes. (#80640)"

This reverts commit 531e8c26b3f2626e7f1a997e0e8b61d67d10aded.


  Commit: 2ae8bee8f11f8d5cc26cf6b4bb71001706ca0104
      https://github.com/llvm/llvm-project/commit/2ae8bee8f11f8d5cc26cf6b4bb71001706ca0104
  Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Target/ARM/ARMLegalizerInfo.cpp

  Log Message:
  -----------
  [ARM][GlobalISel] Remove legacy legalizer rules (#82619)

I've been looking at LegacyLegalizerInfo and what its place in GISel is.
It seems like it's very close to being deleted so I'm checking if we can
remove the last remaining uses of it.

Looks like we can do a drop-in replacement with the new legalizer for
ARM.


  Commit: bbdc62e7180168effd0c480979bdaf933d0615d1
      https://github.com/llvm/llvm-project/commit/bbdc62e7180168effd0c480979bdaf933d0615d1
  Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/AArch64/arith-fp-frem.ll
    M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll

  Log Message:
  -----------
  [AArch64][CostModel] Improve scalar frem cost (#80423)

In AArch64 the cost of scalar frem is the cost of a call to 'fmod'.


  Commit: 335d34d9eae8c943e2164373c7eab1e450eaf435
      https://github.com/llvm/llvm-project/commit/335d34d9eae8c943e2164373c7eab1e450eaf435
  Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
    M mlir/lib/Target/LLVMIR/DebugImporter.cpp
    M mlir/lib/Target/LLVMIR/ModuleImport.cpp
    M mlir/test/Target/LLVMIR/Import/import-failure.ll

  Log Message:
  -----------
  [MLIR][LLVM] Fix debug intrinsic import (#82637)

This revision handles the case that the translation of a scope fails due
to cyclic metadata. This mainly affects the import of debug intrinsics
that indirectly take such a scope as metadata argument (e.g. via local
variable or label metadata). This commit ensures we drop intrinsics with
such a dependency on cyclic metadata.


  Commit: a622b21f4607ee787c6fe63032a849c24374882b
      https://github.com/llvm/llvm-project/commit/a622b21f4607ee787c6fe63032a849c24374882b
  Author: Matthias Springer <me at m-sp.org>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M flang/lib/Frontend/FrontendActions.cpp
    M mlir/include/mlir/Transforms/DialectConversion.h
    M mlir/lib/Transforms/Utils/DialectConversion.cpp

  Log Message:
  -----------
  [mlir][Transforms] Make `ConversionPatternRewriter` constructor private (#82244)

`ConversionPatternRewriter` objects should not be constructed outside of
dialect conversions. Some IR modifications performed through a
`ConversionPatternRewriter` are reflected in the IR in a delayed fashion
(e.g., only when the dialect conversion is guaranteed to succeed). Using
a `ConversionPatternRewriter` outside of the dialect conversion is
incorrect API usage and can bring the IR in an inconsistent state.

Migration guide: Use `IRRewriter` instead of
`ConversionPatternRewriter`.


  Commit: b39f5660a408b47307e57a0882eb8af85d72e283
      https://github.com/llvm/llvm-project/commit/b39f5660a408b47307e57a0882eb8af85d72e283
  Author: Cullen Rhodes <cullen.rhodes at arm.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/fill-2d.mlir
    M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul-transpose-a.mlir
    M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul.mlir
    M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul.mlir
    M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/use-too-many-tiles.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-store-128-bit-tile.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f16f16f32.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-i8i8i32.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir
    A mlir/test/lib/Dialect/ArmSME/CMakeLists.txt
    A mlir/test/lib/Dialect/ArmSME/TestLowerToArmSME.cpp
    M mlir/test/lib/Dialect/CMakeLists.txt
    M mlir/tools/mlir-opt/CMakeLists.txt
    M mlir/tools/mlir-opt/mlir-opt.cpp

  Log Message:
  -----------
  [mlir][ArmSME] Add test-lower-to-arm-sme pipeline (#81732)

The ArmSME compilation pipeline has evolved significantly and is now
sufficiently complex enough that it warrants a proper lowering pipeline
that encapsulates the various passes and orderings. Currently the
pipeline is loosely defined in our integration tests, but these have
diverged and are not using the same passes or ordering everywhere.

This patch introduces a test-lower-to-arm-sme pipeline mirroring
test-lower-to-llvm that provides some sanity when running e2e examples
and can be used a reference for targeting ArmSME in MLIR.

All the integration tests are updated to use this pipeline. The
intention is to productize the pipeline once it becomes more mature.


  Commit: 78890904c41cc4221839dafb7ae906971a9db51a
      https://github.com/llvm/llvm-project/commit/78890904c41cc4221839dafb7ae906971a9db51a
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M mlir/lib/Conversion/MathToLLVM/MathToLLVM.cpp
    M mlir/test/Conversion/MathToLLVM/math-to-llvm.mlir

  Log Message:
  -----------
  [mlir][math] Propagate scalability in `convert-math-to-llvm` (#82635)

This also generally increases the coverage of scalable vector types in
the math-to-llvm tests.


  Commit: 13acb3af5ad48e850cf37dcf02270ede3f267bd4
      https://github.com/llvm/llvm-project/commit/13acb3af5ad48e850cf37dcf02270ede3f267bd4
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/lib/AST/Interp/Interp.cpp
    M clang/test/SemaCXX/PR68542.cpp

  Log Message:
  -----------
  [clang][Interp] Don't diagnose alread invalid function decls

They have already been diagnosed before. Also improve that test case.


  Commit: 5f1319bb385342c7ef4124b05b83b89ef8588ee8
      https://github.com/llvm/llvm-project/commit/5f1319bb385342c7ef4124b05b83b89ef8588ee8
  Author: Matthias Springer <me at m-sp.org>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M mlir/include/mlir/Transforms/DialectConversion.h
    M mlir/lib/Transforms/Utils/DialectConversion.cpp
    M mlir/test/lib/Dialect/Test/TestPatterns.cpp

  Log Message:
  -----------
  [mlir][Transforms] Encapsulate dialect conversion options in `ConversionConfig` (#82250)

This commit adds a new `ConversionConfig` struct that allows users to
customize the dialect conversion. This configuration is similar to
`GreedyRewriteConfig` for the greedy pattern rewrite driver.

A few existing options are moved to this objects, simplifying the
dialect conversion API.


  Commit: 5cb2ebc08f6fa42341409b88466c5c266e5839cc
      https://github.com/llvm/llvm-project/commit/5cb2ebc08f6fa42341409b88466c5c266e5839cc
  Author: kadir çetinkaya <kadircet at google.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
    M clang/include/clang/Sema/Sema.h
    M clang/lib/Sema/SemaTemplate.cpp
    M clang/test/AST/ast-dump-using.cpp

  Log Message:
  -----------
  Reland "[clang] Preserve found-decl when constructing VarTemplateIds" (#82612)

Update include-cleaner tests. Now that we have proper found-decls set up
for VarTemplates, in case of instationtations we point to primary
templates and not specializations. To be changed in a follow-up patch.


  Commit: 4419b2c27fa45a08bc3892ad0c8c5eb95d96d608
      https://github.com/llvm/llvm-project/commit/4419b2c27fa45a08bc3892ad0c8c5eb95d96d608
  Author: Kadir Cetinkaya <kadircet at google.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang-tools-extra/clangd/unittests/ClangdLSPServerTests.cpp

  Log Message:
  -----------
  [clangd] Make tidy-rename tests conditional


  Commit: de04b7d44edbfe8c2357cc291f8806575e6e93f2
      https://github.com/llvm/llvm-project/commit/de04b7d44edbfe8c2357cc291f8806575e6e93f2
  Author: Daniel Krupp <daniel.krupp at ericsson.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/docs/analyzer/checkers.rst
    M clang/lib/StaticAnalyzer/Checkers/VLASizeChecker.cpp
    M clang/test/Analysis/taint-diagnostic-visitor.c
    M clang/test/Analysis/taint-generic.c

  Log Message:
  -----------
  [analyzer] Fix core.VLASize checker false positive taint reports (#68140)

The checker reported a false positive on this code 

void testTaintedSanitizedVLASize(void) {
  int x;
  scanf("%d", &x);
  if (x<1)
    return;
  int vla[x]; // no-warning
}

After the fix, the checker only emits tainted warning if the vla size is
coming from a tainted source and it cannot prove that it is positive.


  Commit: 9dfb8430509619a4e9d36fd00a11b83a2d5d0c3c
      https://github.com/llvm/llvm-project/commit/9dfb8430509619a4e9d36fd00a11b83a2d5d0c3c
  Author: kadir çetinkaya <kadircet at google.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang-tools-extra/include-cleaner/lib/WalkAST.cpp
    M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp

  Log Message:
  -----------
  [include-cleaner] Use FoundDecl only for using-shadow-decls (#82615)


  Commit: 7bb08ee8260c825eb5af4824bc62f73155b4b592
      https://github.com/llvm/llvm-project/commit/7bb08ee8260c825eb5af4824bc62f73155b4b592
  Author: Matthias Springer <me at m-sp.org>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M mlir/lib/Transforms/Utils/DialectConversion.cpp

  Log Message:
  -----------
  [mlir][Transforms][NFC] Decouple `ConversionPatternRewriterImpl` from `ConversionPatternRewriter` (#82333)

`ConversionPatternRewriterImpl` no longer maintains a reference to the
respective `ConversionPatternRewriter`. An `MLIRContext` is sufficient.
This commit simplifies the internal state of
`ConversionPatternRewriterImpl`.


  Commit: 404854ee2018489c15c3454857d92e3bab7c1672
      https://github.com/llvm/llvm-project/commit/404854ee2018489c15c3454857d92e3bab7c1672
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/lib/AST/Interp/Disasm.cpp
    M clang/lib/AST/Interp/Program.cpp
    M clang/lib/AST/Interp/Program.h

  Log Message:
  -----------
  [clang][Interp][NFC] Print global variable initialization state


  Commit: e7c60915e61912fb24707dc67e6c4fc919515796
      https://github.com/llvm/llvm-project/commit/e7c60915e61912fb24707dc67e6c4fc919515796
  Author: Benjamin Kramer <benny.kra at googlemail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll

  Log Message:
  -----------
  Remove duplicated REQUIRES: asserts


  Commit: 790bcecce6c135476d2551805c09ed670b9f8418
      https://github.com/llvm/llvm-project/commit/790bcecce6c135476d2551805c09ed670b9f8418
  Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
    A llvm/test/CodeGen/X86/GlobalISel/calllowering-tailcall.ll

  Log Message:
  -----------
  [GlobalISel] Fix a check that aligned tail call is lowered (#82016)

Despite of a valid tail call opportunity, backends still may not
generate a tail call or such lowering is not implemented yet.

Check that lowering has happened instead of its possibility when
generating G_ASSERT_ALIGN.


  Commit: 22734e15d8f2c437e8543f19632299d2e09b31f3
      https://github.com/llvm/llvm-project/commit/22734e15d8f2c437e8543f19632299d2e09b31f3
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/include/clang/Basic/arm_sme.td
    A clang/test/Sema/aarch64-sme-intrinsics/acle_sme_zero.c

  Log Message:
  -----------
  [Clang][AArch64] Fix 'svzero_za' intrinsic to take no arguments. (#82648)

We previously defined svzero_za as:

  void svzero_za();

rather than:

  void svzero_za(void);

Which meant that Clang accepted arguments. Compiling for example
`svzero_za(<non-constant integer>)` ended up with incorrect IR and a
compiler crash because it couldn't select an instruction for it.


  Commit: 3c90fce4504e22953ec5586599afaecfb2923a9e
      https://github.com/llvm/llvm-project/commit/3c90fce4504e22953ec5586599afaecfb2923a9e
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_funs.c
    M clang/utils/TableGen/SveEmitter.cpp

  Log Message:
  -----------
  [Clang][AArch64] Add missing prototypes for streaming-compatible routines (#82649)


  Commit: 8a164220207b579c31d6aa6552944441c83e9465
      https://github.com/llvm/llvm-project/commit/8a164220207b579c31d6aa6552944441c83e9465
  Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/include/llvm/IR/DebugProgramInstruction.h
    M llvm/include/llvm/IR/IntrinsicInst.h
    M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/IR/AsmWriter.cpp
    M llvm/lib/Transforms/Scalar/SpeculativeExecution.cpp
    M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
    M llvm/lib/Transforms/Utils/CodeExtractor.cpp
    M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
    M llvm/lib/Transforms/Utils/ValueMapper.cpp
    M llvm/test/Transforms/SpeculativeExecution/PR46267.ll

  Log Message:
  -----------
  [RemoveDIs] Add DPLabels support [3a/3] (#82633)

Patch 2 of 3 to add llvm.dbg.label support to the RemoveDIs project. The
patch stack adds the DPLabel class, which is the RemoveDIs llvm.dbg.label
equivalent.

   1. Add DbgRecord base class for DPValue and the not-yet-added
       DPLabel class.
   2. Add the DPLabel class.
-> 3. Add support to passes.

The next patch, #82639, will enable conversion between dbg.labels and DPLabels.

AssignemntTrackingAnalysis support could have gone two ways:

1. Have the analysis store a DPLabel representation in its results -
   SelectionDAGBuilder reads the analysis results and ignores all DbgRecord
   kinds.
2. Ignore DPLabels in the analysis - SelectionDAGBuilder reads the analysis
   results but still needs to iterate over DPLabels from the IR.

I went with option 2 because it's less work and is no less correct than 1. It's
worth noting that causes labels to sink to the bottom of packs of debug records.
e.g., [value, label, value] becomes [value, value, label]. This shouldn't be a
problem because labels and variable locations don't have an ordering requirement.
The ordering between variable locations is maintained and the label movement is
deterministic


  Commit: cdf19d13bf39f0679c3636eada87a5645f9a4c84
      https://github.com/llvm/llvm-project/commit/cdf19d13bf39f0679c3636eada87a5645f9a4c84
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/test/Sema/aarch64-sme-intrinsics/acle_sme_zero.c

  Log Message:
  -----------
  [Clang] Fix acle_sme_zero.c (missing aarch64-registered-target)

This test was added in #82648


  Commit: e1326434742980b03433464dd9435ea66ad5be47
      https://github.com/llvm/llvm-project/commit/e1326434742980b03433464dd9435ea66ad5be47
  Author: tsitdikov <tsitdikov at google.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel

  Log Message:
  -----------
  Add build rule for MLIRArmSMETestPasses

MLIRArmSMETestPasses was added in https://github.com/llvm/llvm-project/commit/b39f5660a408b47307e57a0882eb8af85d72e283, we need to add a build rule for it as well.


  Commit: 3dfca24dda1b3596685d02109185ea2885cc0124
      https://github.com/llvm/llvm-project/commit/3dfca24dda1b3596685d02109185ea2885cc0124
  Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
    M llvm/lib/Target/AMDGPU/VOPInstructions.td
    M llvm/test/MC/AMDGPU/gfx11-promotions.s
    M llvm/test/MC/AMDGPU/gfx11_asm_vop3p_dpp16.s
    M llvm/test/MC/AMDGPU/gfx11_asm_vop3p_dpp8.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3p_dpp16.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3p_dpp8.s
    M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p_dpp16.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p_dpp8.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3p_dpp16.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3p_dpp8.txt

  Log Message:
  -----------
  [AMDGPU] Fix encoding of VOP3P dpp on GFX11 and GFX12 (#82710)

The bug affects dpp forms of v_dot2_f32_f16. The encoding does not match
SP3 and does not set op_sel_hi bits properly.


  Commit: d9e4309b451c1b24d4e0a6304057663b877e5266
      https://github.com/llvm/llvm-project/commit/d9e4309b451c1b24d4e0a6304057663b877e5266
  Author: Markus Böck <markus.boeck02 at gmail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M mlir/test/CAPI/llvm.c

  Log Message:
  -----------
  [mlir][NFC] Fix format specifier warning on Windows

`%ld` specifier is defined to work on values of type `long`. The parameter given to `fprintf` is of type `intptr_t` whose actual underlying integer type is unspecified. On Unix systems it happens to commonly be `long` but on 64-bit Windows it is defined as `long long`.

The cross-platform way to print a `intptr_t` is to use `PRIdPTR` which expands to the correct format specifier for `intptr_t`. This avoids any undefined behaviour and compiler warnings.


  Commit: 6ac2c0488f0e06036fc2bd7a94bea71fb930b363
      https://github.com/llvm/llvm-project/commit/6ac2c0488f0e06036fc2bd7a94bea71fb930b363
  Author: tsitdikov <tsitdikov at google.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  Add TestArmSME dependency to mlir-opt library.

TestArmSME was added in https://github.com/llvm/llvm-project/commit/e1326434742980b03433464dd9435ea66ad5be47, now we need to add dependency on it.


  Commit: f1e0392b822e06f39c49df3ba594f4c98f608ba0
      https://github.com/llvm/llvm-project/commit/f1e0392b822e06f39c49df3ba594f4c98f608ba0
  Author: Garvit Gupta <152526799+quic-garvgupt at users.noreply.github.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/lib/Driver/ToolChains/RISCVToolchain.cpp
    M clang/lib/Driver/ToolChains/RISCVToolchain.h
    M clang/test/Driver/riscv-features.c

  Log Message:
  -----------
  [RISCV] Disable generation of asynchronous unwind tables for RISCV baremetal (#81727)

The below culprit patch enabled the generation of asynchronous unwind
tables (-funwind-tables=2) by default for RISCV for both linux and
RISCVToolChain baremetal object. However, since there are 2 baremetal
toolchain objects for RISCV, this created a discrepancy between their
behavior. Moreover, enabling the generation of asynchronous unwind
tables based on whether `-gcc-toolchain` option is present or not
doesn't seem to be the best criteria to decide on the same. This patch
make the behavior consistent by disabling the unwind tables in
RISCVToolChain Baremetal object.

Culprit Patch - https://reviews.llvm.org/D145164


  Commit: 3b3d0978c334702114131e4dab549aa25b9f0ad4
      https://github.com/llvm/llvm-project/commit/3b3d0978c334702114131e4dab549aa25b9f0ad4
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/test/Sema/aarch64-sme-intrinsics/acle_sme_zero.c

  Log Message:
  -----------
  [Clang] Fix acle_sme_zero.c once more.


  Commit: bcf9826a5392f40063869c3d2b72a5cd1b87d14b
      https://github.com/llvm/llvm-project/commit/bcf9826a5392f40063869c3d2b72a5cd1b87d14b
  Author: Johannes Reifferscheid <jreiffers at google.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/Math/Transforms/Passes.h
    M mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp

  Log Message:
  -----------
  [MLIR] Expose approximation patterns for tanh/erf. (#82750)

These patterns can already be used via
populateMathPolynomialApproximationPatterns, but that includes a number
of other patterns that may not be needed.

There are already similar functions for expansion.

For now only adding tanh and erf since I have a concrete use case for
these two.


  Commit: ddb4450a468072b5c066c29f4821edec4689d500
      https://github.com/llvm/llvm-project/commit/ddb4450a468072b5c066c29f4821edec4689d500
  Author: r4nt <klimek at google.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/lib/Format/MacroCallReconstructor.cpp
    M clang/lib/Format/Macros.h
    M clang/lib/Format/UnwrappedLineParser.cpp
    M clang/lib/Format/UnwrappedLineParser.h
    M clang/unittests/Format/FormatTestMacroExpansion.cpp
    M clang/unittests/Format/MacroCallReconstructorTest.cpp

  Log Message:
  -----------
  [ClangFormat] Fix indent in child lines within a macro argument. (#82523)

When reconstructing lines from a macro expansion, make sure that lines
at different levels in the expanded code get indented correctly as part
of the macro argument.


  Commit: e09e0d52a03c7141a7d62fb4adf4d9fee32bebb8
      https://github.com/llvm/llvm-project/commit/e09e0d52a03c7141a7d62fb4adf4d9fee32bebb8
  Author: tsitdikov <tsitdikov at google.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M mlir/test/lib/Dialect/ArmSME/CMakeLists.txt
    M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel

  Log Message:
  -----------
  Users/tsitdikov (#82757)

Fix Test ARM SME library and build rule.


  Commit: 3b70387c5486a057fe0b7d52c79f9decf9c9c95f
      https://github.com/llvm/llvm-project/commit/3b70387c5486a057fe0b7d52c79f9decf9c9c95f
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/test/Analysis/ScalarEvolution/exit-count-select-safe.ll
    M llvm/unittests/Analysis/ValueTrackingTest.cpp

  Log Message:
  -----------
  [ValueTracking] Handle more integer intrinsics in `propagatesPoison` (#82749)

This patch extends `propagatesPoison` to handle more integer intrinsics.
It will turn more logical ands/ors into bitwise ands/ors.

See also https://reviews.llvm.org/D99671.


  Commit: 1197fcabc4b5f39dbe8a94b1ab6e92354f3f0dd2
      https://github.com/llvm/llvm-project/commit/1197fcabc4b5f39dbe8a94b1ab6e92354f3f0dd2
  Author: Abhina Sree <69635948+abhina-sree at users.noreply.github.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M libcxx/test/libcxx/input.output/filesystems/class.directory_entry/directory_entry.mods/last_write_time.pass.cpp
    M libcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp
    M libcxx/test/libcxx/language.support/support.dynamic/new_faligned_allocation.pass.cpp
    M libcxx/test/libcxx/thread/thread.condition/PR30202_notify_from_pthread_created_thread.pass.cpp
    M libcxx/test/libcxx/thread/thread.threads/thread.thread.this/sleep_for.pass.cpp
    M libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.remove_all/toctou.pass.cpp
    M libcxx/test/std/language.support/cmp/cmp.alg/strong_order_long_double.verify.cpp
    M libcxx/test/std/language.support/support.dynamic/align_val_t.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/delete_align_val_t_replace.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align.replace.indirect.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align.replace.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align_nothrow.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align_nothrow.replace.indirect.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align_nothrow.replace.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/nodiscard.verify.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/delete_align_val_t_replace.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align.replace.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align_nothrow.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align_nothrow.replace.indirect.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align_nothrow.replace.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/nodiscard.verify.cpp
    M libcxx/test/std/language.support/support.rtti/type.info/type_info.equal.pass.cpp
    M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_in.pass.cpp
    M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_length.pass.cpp
    M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_out.pass.cpp
    M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_in.pass.cpp
    M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_length.pass.cpp
    M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_out.pass.cpp
    M libcxx/test/std/utilities/format/format.functions/escaped_output.unicode.pass.cpp
    M libcxx/test/std/utilities/format/format.range/format.range.fmtstr/format.pass.cpp
    M libcxx/test/std/utilities/format/format.range/format.range.fmtstr/parse.pass.cpp
    M libcxx/test/std/utilities/memory/temporary.buffer/overaligned.pass.cpp

  Log Message:
  -----------
  [libcxx][test] Change UNSUPPORTED to XFAIL for target-related failures (#81513)

This is a followup from this discussion
https://github.com/llvm/llvm-project/pull/80735#discussion_r1486586017
to mark targets that were initially marked as UNSUPPORTED with an XFAIL
instead.


  Commit: ad49fe3e89c3b3950956548f14cdb5c159ba0aec
      https://github.com/llvm/llvm-project/commit/ad49fe3e89c3b3950956548f14cdb5c159ba0aec
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/lib/AST/Interp/ByteCodeExprGen.cpp
    M clang/test/SemaCXX/PR20334-std_initializer_list_diagnosis_assertion.cpp

  Log Message:
  -----------
  [clang][Interp] Don't return success for already failed global variables

We might be visiting them more than once. We used to return true for
second and subsequent cases, just because we had already visited it
before.


  Commit: 492e8ba0384b038596e6b4a97313b7bdced5e868
      https://github.com/llvm/llvm-project/commit/492e8ba0384b038596e6b4a97313b7bdced5e868
  Author: Matthias Springer <me at m-sp.org>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
    M mlir/lib/Dialect/SCF/IR/SCF.cpp

  Log Message:
  -----------
  [mlir] Fix memory leaks after #81759 (#82762)

This commit fixes memory leaks that were introduced by #81759. The way
ops and blocks are erased changed slightly.

The leaks were caused by an incorrect implementation of op builders:
blocks must be created with the supplied builder object. Otherwise, they
are not properly tracked by the dialect conversion and can leak during
rollback.


  Commit: b8a7d8131e5ad2c21238e192e6f9c5b69512abe3
      https://github.com/llvm/llvm-project/commit/b8a7d8131e5ad2c21238e192e6f9c5b69512abe3
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/cmake/modules/HandleLLVMOptions.cmake

  Log Message:
  -----------
  [LLVM] Fix incorrect GPU triple detection for runtimes builds

Summary:
This block of code is used to prevent a GPU-based cross compiling build
from taking incompatible arguments. However this incorrectly used the
LLVM default triple instead of the runtimes target. Fix that so the bots
can continue to default the triple to NVPTX.


  Commit: c747b24262205aeaa112e5c0de3f786d960427ae
      https://github.com/llvm/llvm-project/commit/c747b24262205aeaa112e5c0de3f786d960427ae
  Author: hev <wangrui at loongson.cn>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    A llvm/test/CodeGen/LoongArch/intrinsic-memcpy.ll

  Log Message:
  -----------
  [NFC] Precommit a memcpy test for isOrEquivalentToAdd (#82758)


  Commit: 71d47a0b00e9f48dc740556d7f452ffadf308731
      https://github.com/llvm/llvm-project/commit/71d47a0b00e9f48dc740556d7f452ffadf308731
  Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/include/llvm/IR/DebugProgramInstruction.h
    M llvm/lib/IR/BasicBlock.cpp
    M llvm/lib/IR/DebugProgramInstruction.cpp

  Log Message:
  -----------
  [RemoveDIs] Enable DPLabels conversion [3b/3] (#82639)

Enables conversion between llvm.dbg.label and DPLabel.


  Commit: 52ada07ef5df2829e90ca2dd48305465a55e8121
      https://github.com/llvm/llvm-project/commit/52ada07ef5df2829e90ca2dd48305465a55e8121
  Author: Benoît Amiaux <benoit.amiaux at gmail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/utils/release/build_llvm_release.bat

  Log Message:
  -----------
  build_llvm_release.bat: add tarball export to x64 release (#79840)

Like linux releases, export a tar.xz files containing most llvm tools,
including non toolchain utilities, llvm-config, llvm-link and others.

We do this by reconfiguring cmake one last time at the last step,
running the install target so we do not need to recompile anything.

Fix #51192
Fix #53052


  Commit: be083dba95dfbbb0286d798cc06fbe021715bc03
      https://github.com/llvm/llvm-project/commit/be083dba95dfbbb0286d798cc06fbe021715bc03
  Author: Michael Maitland <michaeltmaitland at gmail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/include/llvm/Target/TargetSchedule.td
    M llvm/lib/Target/RISCV/RISCVScheduleV.td

  Log Message:
  -----------
  [RISCV][NFC] Allow SchedVar to be a def inside our scheduler model files. (#82634)

All SchedModel files have a line that looks like:

```
def SomeModel : SchedMachineModel;
let SchedModel = SomeModel in {
  ...
}
```

TableGen requires that all records defined within the top level `let`
must have a field `SchedModel` somewhere in their nested record
hierarchy (i.e. the record has a field `SchedModel : SchedMachineModel`
or recursively, one of its members has a field `SchedModel :
SchedMachineModel`).

Classes such as `SchedPredicate` have added a field `SchedModel :
SchedMachineModel`, even though the field is never used, just to supress
**errors** (not warnings) caused from having the top level let in the
model files. This decision was made to avoid having hundreds of the same
`let` statement littered in every scheduler model file.

The reason we have never seen an error for `SchedVar` before is because
`SchedVar` is never instantiated with a `def`. Instead, it is only
created as a value that is consumed by `SchedWriteVariant`:

```
... : SchedWriteVariant<[SchedVar<...>, SchedVar<...>]>;
```

There is a problem with this style of instantiation. In particular, the
problem arises as we try to take a class based approach to building
scheduler models. I will describe the problem from the bottom up.

The `LMULWriteResMXVariant` multiclass takes in a `SchedPredicateBase
Pred`. Today, the RISCVSchedSiFive7.td file defines `VLDSX0Pred` outside
the scope of any class. That means that `VLDSX0Pred` exists before
`LMULWriteResMXVariant` multiclass is instantiated. With this approach,
there is no error since the predicate is instantated in entirety before
the variant multiclass is instantiated. However, I have the intention to
move the definition of both the predicate and the variant multiclass
records inside a multiclass to factor out common parts between multiple
scheduler models.

I plan to have something like:

```
multiclass SiFive7Base<SiFive7BaseConfig c> {
  def VLDSX0Pred : ...;
  // Need defvar since record is prefixed with NAME.
  defvar VLDSX0Pred = !cast<...>(NAME # VLDSX0Pred);
  defm SiFive7 : LMULWriteResMXVariant<VLDSX0Pred>;
}

defm "SiFive7Version1" : SiFive7Base<SiFive7BaseConfig<...>>;
defm "SiFive7Version2" : SiFive7Base<SiFive7BaseConfig<...>>;
```

In this scheme, VLDSX0Pred is defined within the same multiclass
transaction that the `LMULWriteResMXVariant` is defined in. For some
reason, TableGen does not allow `Values` to reference records that were
created in the same parent record construction. If the `SchedVar` is not
a `def`, then it will not be able to find the record `NAME #
VLDSX0Pred`. Making it a def, allows TableGen to find `NAME #
VLDSX0Pred` in scope.

The simplest example of this is:

```
class A {}
class B<A a> { A x = a;}
class C<B b> { B y = b;}
multiclass D {
  def MyA : A;
  defvar aa = !cast<A>(NAME # MyA);
  // This works
  def : B<aa>;
  // This does not work because constructing B by value cannot find `NAME # MyA`
  // error: Undefined reference to record: 'MyA'
  def : C<B<aa>>;
  // To fix it, define it like such:
  def MyB : B<aa>;
  defvar bb = !cast<B>(NAME # MyB);
  def : C<bb>;
}
defm "" : D;
```

In summary, in order to use a class based approach to creating scheduler
resources to promote resusability, `SchedVar`s must be created using
defs instead of being instantiated by value so that it can resolve
records that were part of the instantiation of the parent record being
created. In order to do this without refactoring the top level `let`
statement that all scheduler model files use, we add an unused field
`SchedModel : SchedMachineModel` to `SchedVar`, similiar to what has
been done in `SchedPredicate`.


  Commit: 3b232f066d40a3e91ac27e421a3baeaca0cd59ec
      https://github.com/llvm/llvm-project/commit/3b232f066d40a3e91ac27e421a3baeaca0cd59ec
  Author: Matthias Springer <me at m-sp.org>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
    M mlir/test/Dialect/Linalg/canonicalize.mlir
    M mlir/test/Dialect/Linalg/fusion-elementwise-ops.mlir
    M mlir/test/Dialect/Linalg/invalid.mlir

  Log Message:
  -----------
  [mlir][linalg] `LinalgOp`: Disallow mixed tensor/buffer semantics (#80660)

Related discussion:
https://github.com/llvm/llvm-project/pull/73908/files#r1414913030.

This change fixes #73547.


  Commit: 08cb1a62f6f401d66513a20e8689c1ef9059fc63
      https://github.com/llvm/llvm-project/commit/08cb1a62f6f401d66513a20e8689c1ef9059fc63
  Author: Lukacma <Marian.Lukac at arm.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-pmov-to-pred.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-pmov-to-vector.ll

  Log Message:
  -----------
  [AArch64][SVE] Add intrinsincs to assembly mapping for svpmov (#81861)

This patch enables translation of svpmov intrinsic to the correct
assembly instruction, instead of function call.


  Commit: 55bc0488af077acb47be70542718d1bc17f3de4f
      https://github.com/llvm/llvm-project/commit/55bc0488af077acb47be70542718d1bc17f3de4f
  Author: Adrian Prantl <adrian-prantl at users.noreply.github.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M lldb/source/Target/Process.cpp

  Log Message:
  -----------
  Improve and modernize logging for Process::CompleteAttach() (#82717)

Target::SetArchitecture() does not necessarily set the triple that is
being passed in, and will unconditionally log the real architecture to
the log channel. By flipping the order between the log outputs, the
resulting combined log makes a lot more sense to read.


  Commit: 5840aa95e3c2d93f400e638e7cbf167a693c75f5
      https://github.com/llvm/llvm-project/commit/5840aa95e3c2d93f400e638e7cbf167a693c75f5
  Author: Matthias Springer <me at m-sp.org>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M mlir/lib/Transforms/Utils/DialectConversion.cpp

  Log Message:
  -----------
  [mlir][Transforms] Fix crash in dialect conversion (#82783)

This is a follow-up to #82333. It is possible that the target block of a
`BlockTypeConversionRewrite` is detached, so the `MLIRContext` cannot be
taken from the block.


  Commit: 0b01320d28235ff54a98681414c7dd6024d348a7
      https://github.com/llvm/llvm-project/commit/0b01320d28235ff54a98681414c7dd6024d348a7
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlan.h

  Log Message:
  -----------
  [VPlan] Remove unused VPTransformState::CanonicalIV (NFCI).

Clean up unused member variable.


  Commit: 1408667fdd890edf7507ae2052360de20d81c19f
      https://github.com/llvm/llvm-project/commit/1408667fdd890edf7507ae2052360de20d81c19f
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp

  Log Message:
  -----------
  [mlir][ArmSME] Follow MLIR constant style in VectorLegalization.cpp (NFC)


  Commit: 24e7be426efe142c49bfab5cb278ffa313424176
      https://github.com/llvm/llvm-project/commit/24e7be426efe142c49bfab5cb278ffa313424176
  Author: Florian Mayer <fmayer at google.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64StackTagging.cpp

  Log Message:
  -----------
  [NFC] clean up memtag-stack code (#80906)

we would replace the alloca with tagp for debug instructions, then
replace it back with the original alloca. it's easier to just skip the
replacement.


  Commit: dfa1d9b027e677cf1379dffee0059261a34f3481
      https://github.com/llvm/llvm-project/commit/dfa1d9b027e677cf1379dffee0059261a34f3481
  Author: Ivan Kosarev <ivan.kosarev at amd.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
    M llvm/lib/Target/AMDGPU/SIDefines.h
    M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIModeRegister.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h

  Log Message:
  -----------
  [AMDGPU][NFC] Have helpers to deal with encoding fields. (#82772)

These are hoped to provide more convenient and less error prone
facilities to encode and decode fields than manually defined constants
and functions.


  Commit: 0673fb6e773b0a37802208be4f666cef1f6b3470
      https://github.com/llvm/llvm-project/commit/0673fb6e773b0a37802208be4f666cef1f6b3470
  Author: Thurston Dang <thurston.dang at gmail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M compiler-rt/lib/hwasan/hwasan.cpp

  Log Message:
  -----------
  [hwasan] Add missing printf parameter in __hwasan_handle_longjmp (#82559)

The diagnostic message had four format specifiers but only three
parameters. This patch adds what I assume to be the missing
parameter.


  Commit: 0352d5eee06c214681696395a0442006e6d16656
      https://github.com/llvm/llvm-project/commit/0352d5eee06c214681696395a0442006e6d16656
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M libc/startup/gpu/amdgpu/start.cpp

  Log Message:
  -----------
  [libc][NFC] Remove redundant external clock symbol for AMDGPU (#82794)

Summary:
The AMDGPU target needs an external clock symbol so the driver can set
the frequency with the correct value. This was left over from the
previous implementation and I forgot to remove it when actually
implementing the timing utilities.


  Commit: 640ba3f8d1dcf25d8b34ce463fb6a7d58e7dc998
      https://github.com/llvm/llvm-project/commit/640ba3f8d1dcf25d8b34ce463fb6a7d58e7dc998
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M libc/cmake/modules/LLVMLibCTestRules.cmake
    M libc/cmake/modules/prepare_libc_gpu_build.cmake

  Log Message:
  -----------
  [libc] Fix standard cross build targeting the GPU (#82724)

Summary:
The GPU target has recently been changed to support standard `libc`
build rules. This means we should be able to build for it both in
`LLVM_ENABLE_PROJECTS` mode, or targeting the runtimes directory
directly as in the LLVM `libc` documentation. Previously this failed
because the version check on the compiler was too strict and the
`--target=` options were not being set on the link jobs unless in CMake
cross compiliation mode. This patch fixes those so the following config
should work now to build the GPU target directly if using NVPTX.

```
cmake ../runtimes -DCMAKE_BUILD_TYPE=Release \
  -DCMAKE_CXX_COMPILER=clang++ -DCMAKE_C_COMPILER=clang \
  -DLLVM_ENABLE_RUNTIMES=libc -DLLVM_RUNTIMES_TARGET=nvptx64-nvidia-cuda \
  -DLLVM_DEFAULT_TARGET_TRIPLE=nvptx64-nvidia-cuda \
  -DLIBC_HDRGEN_EXE=/path/to/hdrgen/libc-hdrgen \
  -DLLVM_LIBC_FULL_BUILD=ON -GNinja
```


  Commit: 3e9e5e277129041fe781f1f2bb04f69269d3fa1f
      https://github.com/llvm/llvm-project/commit/3e9e5e277129041fe781f1f2bb04f69269d3fa1f
  Author: Kevin P. Neal <kevin.neal at sas.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/test/CodeGen/SystemZ/fp-strict-conv-17.ll

  Log Message:
  -----------
  [FPEnv][SystemZ] Correct strictfp test.

Correct llvm-reduce strictfp test to follow the rules documented in the
LangRef:
https://llvm.org/docs/LangRef.html#constrained-floating-point-intrinsics

This test needed the strictfp attribute added to function definitions.

Test changes verified with D146845.


  Commit: 8fe4487e23e543568745ef461660b1d288805b81
      https://github.com/llvm/llvm-project/commit/8fe4487e23e543568745ef461660b1d288805b81
  Author: erichkeane <ekeane at nvidia.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/test/SemaOpenACC/no-branch-in-out.c

  Log Message:
  -----------
  [OpenACC] Fix branch-in/out to not refer to a 'region'

'region' is not a term of art in OpenACC, so switch it to refer to
'Compute Construct', which is accurate/reflects the standard.


  Commit: 962a6970f2827bcdda574426701c7c57f79a1ccf
      https://github.com/llvm/llvm-project/commit/962a6970f2827bcdda574426701c7c57f79a1ccf
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/SelectionDAG.h
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

  Log Message:
  -----------
  [SelectionDAG] Remove unused VP strided load/store creation functions that build an MMO. (#82676)

The base case of these call InferPtrInfo. This is dangerous due to
#82657, but it turns out none of these are used.

It seemed best to reduce the surface area until these are needed.


  Commit: 42f6f95e084a9157a5801dba5e32a7af0616360a
      https://github.com/llvm/llvm-project/commit/42f6f95e084a9157a5801dba5e32a7af0616360a
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h

  Log Message:
  -----------
  [AMDGPU] Simplify AMDGPUDisassembler::getInstruction by removing Res. (#82775)

Remove all the code that set and tested Res. Change all convert*
functions to return void since none of them can fail. getInstruction
only has one main point of failure, after all calls to tryDecodeInst
have failed.


  Commit: a24421fef713e5b3c0a885cf36a62cc3257be1f3
      https://github.com/llvm/llvm-project/commit/a24421fef713e5b3c0a885cf36a62cc3257be1f3
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M flang/tools/bbc/bbc.cpp

  Log Message:
  -----------
  [flang][bbc] Fix dangling reference to `envDefaults` (#82800)

The lowering bridge stores the evvironment defaults (passed to the
constructor) as a reference. In the call to the constructor in bbc, the
defaults were passed as `{}`, which creates a temporary whose lifetime
ends immediately after the call.

The flang driver passes a member of the compilation instance to the
constructor, which presumably remains alive long enough, so storing the
reference in the bridge is justified. To avoid the dangling reference,
create an actual object `envDefaults` in bbc.


  Commit: f8ce460e48ccc774354df75520d00a67ddbf84c0
      https://github.com/llvm/llvm-project/commit/f8ce460e48ccc774354df75520d00a67ddbf84c0
  Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/SparseTensor/IR/Enums.h
    M mlir/include/mlir/ExecutionEngine/SparseTensor/Storage.h
    M mlir/include/mlir/ExecutionEngine/SparseTensorRuntime.h
    M mlir/lib/ExecutionEngine/SparseTensor/Storage.cpp
    M mlir/lib/ExecutionEngine/SparseTensorRuntime.cpp

  Log Message:
  -----------
  [mlir][sparse] cleanup sparse runtime library (#82807)

remove some obsoleted APIs from the library that have been fully
replaced with actual direct IR codegen


  Commit: 5874874c24720dc24fde12327f81369ef4af4e0b
      https://github.com/llvm/llvm-project/commit/5874874c24720dc24fde12327f81369ef4af4e0b
  Author: Min-Yih Hsu <min.hsu at sifive.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    A llvm/include/llvm/CodeGen/SDPatternMatch.h
    M llvm/unittests/CodeGen/CMakeLists.txt
    A llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp

  Log Message:
  -----------
  [SelectionDAG] Introducing the SelectionDAG pattern matching framework (#78654)

Akin to `llvm::PatternMatch` and `llvm::MIPatternMatch`, the
`llvm::SDPatternMatch` introduced in this patch provides a DSL-alike
framework to match SDValue / SDNode with a more succinct syntax.


  Commit: 07fd5ca3a8bd270b26b21ea28501f5edcb519709
      https://github.com/llvm/llvm-project/commit/07fd5ca3a8bd270b26b21ea28501f5edcb519709
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn

  Log Message:
  -----------
  [gn build] Port 5874874c2472


  Commit: 59e5519c81c57a66424d657864ce69cb0efdc7d8
      https://github.com/llvm/llvm-project/commit/59e5519c81c57a66424d657864ce69cb0efdc7d8
  Author: David Goldman <dallasftball at gmail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang-tools-extra/clangd/refactor/Rename.cpp
    M clang-tools-extra/clangd/unittests/RenameTests.cpp

  Log Message:
  -----------
  [clangd] Fix renaming single argument ObjC methods (#82396)

Use the legacy non-ObjC rename logic when dealing with selectors that
have zero or one arguments. In addition, make sure we don't add an extra
`:` during the rename.

Add a few more tests to verify this works (thanks to @ahoppen for the
tests and finding this bug).


  Commit: a64ff9630ccd305a63fca3ea9cc4bc4b49098495
      https://github.com/llvm/llvm-project/commit/a64ff9630ccd305a63fca3ea9cc4bc4b49098495
  Author: Michael Halkenhäuser <MichaelGerald.Halkenhauser at amd.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/tools/llvm-link/llvm-link.cpp

  Log Message:
  -----------
  [llvm-link] Improve missing file error message (#82514)

Add error messages showing the missing filenames.

Currently, we only get 'No such file or directory' without any(!)
further info. This patch will (only upon ENOENT error) iterate over all
requested files and print which ones are actually missing.


  Commit: 6dd6d487d012a9000fe975133b7935c1f8c658eb
      https://github.com/llvm/llvm-project/commit/6dd6d487d012a9000fe975133b7935c1f8c658eb
  Author: Florian Mayer <fmayer at google.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M compiler-rt/lib/scudo/standalone/combined.h

  Log Message:
  -----------
  [NFC] Make RingBuffer an atomic pointer (#82547)

This will allow us to atomically swap out RingBuffer and StackDepot.

Patched into AOSP and ran debuggerd_tests.


  Commit: a3a316e2875258929f062fbffb81e2a9d5b4ce48
      https://github.com/llvm/llvm-project/commit/a3a316e2875258929f062fbffb81e2a9d5b4ce48
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M libc/src/stdlib/atexit.cpp

  Log Message:
  -----------
  [libc] Remove use of BlockStore for GPU atexit (#82823)

Summary:
The GPU backends have restrictions on the kinds of initializers they can
produce. The use of BlockStore here currently breaks the backends
through the use of recursive initializers. This prevents it from
actually being included in any builds. This patchs changes it to just
use a fixed size of 64 slots .The chances of someone exceeding the 64
slots in practice is very, very low.

However, this is primarily a bandaid solution as a real solution will
need to use a lock free data structure to push work in parallel.
Currently the mutexes on the GPU build do nothing, so they only work if
the user guards the use themselves.


  Commit: 1a2ecbb3980a3005c2027eb5b69bbbe32c9c8294
      https://github.com/llvm/llvm-project/commit/1a2ecbb3980a3005c2027eb5b69bbbe32c9c8294
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M libc/docs/gpu/rpc.rst
    M libc/utils/gpu/loader/Loader.h
    M libc/utils/gpu/server/CMakeLists.txt
    A libc/utils/gpu/server/llvmlibc_rpc_server.h
    M libc/utils/gpu/server/rpc_server.cpp
    R libc/utils/gpu/server/rpc_server.h
    M openmp/libomptarget/plugins-nextgen/common/src/RPC.cpp

  Log Message:
  -----------
  [libc] Remove 'llvm-gpu-none' directory from build (#82816)

Summary:
This directory is leftover from when we handled both AMDGPU and NVPTX in
the same build and merged them into a pseudo triple. Now the only thing
it contains is the RPC server header. This gets rid of it, but now that
it's in the base install directory we should make it clear that it's an
LLVM libc header.


  Commit: b43dd08aa31f37cb9517a80f394631a7d8ff6b90
      https://github.com/llvm/llvm-project/commit/b43dd08aa31f37cb9517a80f394631a7d8ff6b90
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M libc/cmake/modules/LLVMLibCLibraryRules.cmake
    M libc/cmake/modules/prepare_libc_gpu_build.cmake
    M libc/lib/CMakeLists.txt

  Log Message:
  -----------
  [libc] Install a single LLVM-IR version of the GPU library (#82791)

Summary:
Recent patches have allowed us to treat these libraries as direct
builds. This makes it easier to simply build them to a single LLVM-IR
file. This matches the way these files are presented by the ROCm and
CUDA toolchains and makes it easier to work with.


  Commit: 99660082cb387c9bf7974fef558c5f73d8b5a198
      https://github.com/llvm/llvm-project/commit/99660082cb387c9bf7974fef558c5f73d8b5a198
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/lib/Driver/ToolChains/AMDGPU.cpp
    M clang/lib/Driver/ToolChains/Clang.cpp
    M clang/lib/Driver/ToolChains/Cuda.cpp
    M clang/test/Driver/gpu-libc-headers.c

  Log Message:
  -----------
  [Clang] Append target search paths for direct offloading compilation (#82699)

Summary:
Recent changes to the `libc` project caused the headers to be installed
to `include/<triple>` for the GPU and the libraries to be in
`lib/<triple>`. This means we should automatically append these search
paths so they can be found by default. This allows the following to work
targeting AMDGPU.

```shell
$ clang foo.c -flto -mcpu=native --target=amdgcn-amd-amdhsa -lc <install>/lib/amdgcn-amd-amdhsa/crt1.o
$ amdhsa-loader a.out
```


  Commit: 1c2456d6593cea317a00627889b5c35766a732e0
      https://github.com/llvm/llvm-project/commit/1c2456d6593cea317a00627889b5c35766a732e0
  Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    R mlir/include/mlir/ExecutionEngine/SparseTensor/ErrorHandling.h
    M mlir/include/mlir/ExecutionEngine/SparseTensor/File.h
    M mlir/include/mlir/ExecutionEngine/SparseTensor/Storage.h
    M mlir/lib/ExecutionEngine/SparseTensor/File.cpp
    M mlir/lib/ExecutionEngine/SparseTensor/Storage.cpp
    M mlir/lib/ExecutionEngine/SparseTensorRuntime.cpp
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  [mlir][sparse] remove very thin header file from sparse runtime support (#82820)


  Commit: ae91a427ac8f9fc7368ec052995cec6a6aeb8ea8
      https://github.com/llvm/llvm-project/commit/ae91a427ac8f9fc7368ec052995cec6a6aeb8ea8
  Author: Timothy Herchen <timothy.herchen at gmail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
    M llvm/test/MC/Disassembler/X86/x86-64-err.txt

  Log Message:
  -----------
  [X86][MC] Reject out-of-range control and debug registers encoded with APX (#82584)

Fixes #82557. APX specification states that the high bits found in REX2
used to encode GPRs can also be used to encode control and debug
registers, although all of them will #UD. Therefore, when disassembling
we reject attempts to create control or debug registers with a value of
16 or more.

See page 22 of the
[specification](https://www.intel.com/content/www/us/en/developer/articles/technical/advanced-performance-extensions-apx.html):

> Note that the R, X and B register identifiers can also address non-GPR
register types, such as vector registers, control registers and debug
registers. When any of them does, the highest-order bits REX2.R4,
REX2.X4 or REX2.B4 are generally ignored, except when the register being
addressed is a control or debug register. [...] The exception is that
REX2.R4 and REX2.R3 [*sic*] are not ignored when the R register
identifier addresses a control or debug register. Furthermore, if any
attempt is made to access a non-existent control register (CR*) or debug
register (DR*) using the REX2 prefix and one of the following
instructions:
“MOV CR*, r64”, “MOV r64, CR*”, “MOV DR*, r64”, “MOV r64, DR*”. #UD is
raised.

The invalid encodings are 64-bit only because `0xd5` is a valid
instruction in 32-bit mode.


  Commit: 99f31bab86c53ed5094f57ff8a05a6ea2c8e0c38
      https://github.com/llvm/llvm-project/commit/99f31bab86c53ed5094f57ff8a05a6ea2c8e0c38
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M flang/lib/Semantics/check-declarations.cpp
    M flang/test/Lower/CUDA/cuda-data-attribute.cuf
    M flang/test/Semantics/cuf03.cuf

  Log Message:
  -----------
  [flang][cuda] Fix semantic for the CONSTANT attribute (#82821)

Object with the CONSTANT attribute cannot be declared in the host
subprogram.

It can be declared in a module or a device subprogram.

Adapt the semantic check to trigger the error in host subprogram.


  Commit: 5c90527b436d1c7d753c187aff1b45e6c8da1af6
      https://github.com/llvm/llvm-project/commit/5c90527b436d1c7d753c187aff1b45e6c8da1af6
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M flang/lib/Semantics/definable.cpp
    M flang/test/Semantics/cuf03.cuf

  Log Message:
  -----------
  [flang][cuda] Allow object with SHARED attribute as definable (#82822)

A semantic error was raised in device subprogram like: 

```
attributes(global) subroutine devsubr2()
   real, shared :: rs
   rs = 1
end subroutine
```

Object with the SHARED attribute can be can be read or written by all
threads in the block.


https://docs.nvidia.com/hpc-sdk/archive/24.1/compilers/cuda-fortran-prog-guide/index.html#cfpg-var-qual-attr-shared


  Commit: 47aee8b56d65e2bac5c7128424ff06134e454d83
      https://github.com/llvm/llvm-project/commit/47aee8b56d65e2bac5c7128424ff06134e454d83
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M flang/tools/bbc/bbc.cpp

  Log Message:
  -----------
  [flang][OpenMP] Set OpenMP attributes in MLIR module in bbc before lo… (#82774)

…wering

Right now attributes like OpenMP version or target attributes for
offload are set after lowering in bbc. The flang frontend sets them
before lowering, making them available in the lowering process.

This change sets them before lowering in bbc as well.


  Commit: dcf4ca558ce5c323ce9b0af93acc0c832024eb3c
      https://github.com/llvm/llvm-project/commit/dcf4ca558ce5c323ce9b0af93acc0c832024eb3c
  Author: agozillon <Andrew.Gozillon at amd.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
    M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
    M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
    A mlir/test/Target/LLVMIR/omptarget-constant-alloca-raise.mlir

  Log Message:
  -----------
  [OpenMP][MLIR][OMPIRBuilder] Add a small optional constant alloca raise function pass to finalize, utilised in convertTarget (#78818)

This patch seeks to add a mechanism to raise constant (not ConstantExpr
or runtime/dynamic) sized allocations into the entry block for select
functions that have been inserted into a list for processing. This
processing occurs during the finalize call, after OutlinedInfo regions
have completed. This currently has only been utilised for
createOutlinedFunction, which is triggered for TargetOp generation in
the OpenMP MLIR dialect lowering to LLVM-IR.

This currently is required for Target kernels generated by
createOutlinedFunction to avoid subsequent optimization passes doing
some unintentional malformed optimizations for AMD kernels (unsure if it
occurs for other vendors). If the allocas are generated inside of the
kernel and are not in the entry block and are subsequently passed to a
function this can lead to required instructions being erased or
manipulated in a way that causes the kernel to run into a HSA access
error.

This fix is related to a series of problems found in:
https://github.com/llvm/llvm-project/issues/74603

This problem primarily presents itself for Flang's HLFIR AssignOp
currently, when utilised with a scalar temporary constant on the RHS and
a descriptor type on the LHS. It will generate a call to a runtime
function, wrap the RHS temporary in a newly allocated descriptor (an
llvm struct), and pass both the LHS and RHS descriptor into the runtime
function call. This will currently be
embedded into the middle of the target region in the user entry block,
which means the allocas are also embedded in the middle, which seems to
pose
issues when later passes are executed. This issue may present itself in
other HLFIR operations or unrelated operations that generate allocas as
a by product, but for the moment, this one test case is the only
scenario I've found this problem.

Perhaps this is not the appropriate fix, I am very open to other
suggestions, I've tried a few others (at varying levels of the
flang/mlir compiler flow), but this one is the smallest and least
intrusive change set. The other two, that come to mind (but I've not
fully looked into, the former I tried a little with blocks but it had a
few issues I'd need to think through):

- Having a proper alloca only block (or region) generated for TargetOps
that we could merge into the entry block that's generated by
convertTarget's createOutlinedFunction.
- Or diverging a little from Clang's current target generation and using
the CodeExtractor to generate the user code as an outlined function
region invoked from the kernel we make, with our kernel arguments passed
into it. Similar to the current parallel generation. I am not sure how
well this would intermingle with the existing parallel generation though
that's layered in.

Both of these methods seem like quite a divergence from the current
status quo, which I am not entirely sure is merited for the small test
this change aims to fix.


  Commit: 25940956e68ec82d841e5748565e7250580e1d36
      https://github.com/llvm/llvm-project/commit/25940956e68ec82d841e5748565e7250580e1d36
  Author: Adrian Prantl <adrian-prantl at users.noreply.github.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M lldb/include/lldb/Utility/ArchSpec.h
    M lldb/source/Target/Target.cpp
    M lldb/source/Utility/ArchSpec.cpp
    A lldb/test/API/macosx/arm64e-attach/Makefile
    A lldb/test/API/macosx/arm64e-attach/TestArm64eAttach.py
    A lldb/test/API/macosx/arm64e-attach/main.c

  Log Message:
  -----------
  Replace ArchSpec::PiecewiseCompare() with Triple::operator==() (#82804)

Looking ast the definition of both functions this is *almost* an NFC
change, except that Triple also looks at the SubArch (important) and
ObjectFormat (less so).

This fixes a bug that only manifests with how Xcode uses the SBAPI to
attach to a process by name: it guesses the architecture based on the
system. If the system is arm64 and the Process is arm64e Target fails to
update the triple because it deemed the two to be equivalent.

rdar://123338218


  Commit: 69c0b2febe01108f50db6e8ed21cd8b2e6088caf
      https://github.com/llvm/llvm-project/commit/69c0b2febe01108f50db6e8ed21cd8b2e6088caf
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M libc/AOR_v20.02/string/arm/memchr.S
    M libc/CMakeLists.txt
    M libc/benchmarks/automemcpy/README.md
    M libc/cmake/modules/CheckCompilerFeatures.cmake
    M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
    M libc/cmake/modules/LLVMLibCLibraryRules.cmake
    M libc/cmake/modules/LLVMLibCObjectRules.cmake
    M libc/cmake/modules/LLVMLibCTestRules.cmake
    M libc/config/darwin/x86_64/entrypoints.txt
    M libc/config/linux/x86_64/exclude.txt
    M libc/config/windows/entrypoints.txt
    M libc/docs/contributing.rst
    M libc/docs/date_and_time.rst
    M libc/docs/dev/clang_tidy_checks.rst
    M libc/docs/dev/config_options.rst
    M libc/docs/dev/printf_behavior.rst
    M libc/docs/full_cross_build.rst
    M libc/docs/gpu/motivation.rst
    M libc/docs/gpu/rpc.rst
    M libc/docs/gpu/testing.rst
    M libc/docs/gpu/using.rst
    M libc/docs/libc_search.rst
    M libc/docs/math/index.rst
    M libc/docs/math/log.rst
    M libc/docs/porting.rst
    M libc/docs/stdio.rst
    M libc/docs/strings.rst
    M libc/include/fcntl.h.def
    M libc/include/sched.h.def
    M libc/include/spawn.h.def
    M libc/spec/bsd_ext.td
    M libc/spec/gnu_ext.td
    M libc/spec/llvm_libc_ext.td
    M libc/spec/posix.td
    M libc/src/__support/HashTable/CMakeLists.txt
    M libc/src/math/generic/CMakeLists.txt
    M libc/src/search/hsearch/CMakeLists.txt
    M libc/src/stdio/printf_core/CMakeLists.txt
    M libc/src/stdio/scanf_core/CMakeLists.txt
    M libc/src/stdlib/CMakeLists.txt
    M libc/src/wchar/CMakeLists.txt
    M libc/startup/linux/CMakeLists.txt
    M libc/test/integration/scudo/CMakeLists.txt
    M libc/test/src/__support/CMakeLists.txt
    M libc/test/src/fenv/CMakeLists.txt
    M libc/test/src/math/differential_testing/CMakeLists.txt
    M libc/test/src/math/smoke/CMakeLists.txt
    M libc/test/utils/UnitTest/CMakeLists.txt
    M libc/utils/MPFRWrapper/CMakeLists.txt
    M libc/utils/gpu/server/CMakeLists.txt
    M libc/utils/mathtools/GenerateHPDConstants.py
    M libc/utils/mathtools/ryu_tablegen.py

  Log Message:
  -----------
  [libc][NFC] Remove all trailing spaces from libc (#82831)

Summary:
There are a lot of random training spaces on various lines. This patch
just got rid of all of them with `sed 's/\ \+$//g'.


  Commit: 87fadb3929163752f650a1fc08d5fb13ee4c1a3f
      https://github.com/llvm/llvm-project/commit/87fadb3929163752f650a1fc08d5fb13ee4c1a3f
  Author: Jason Molenda <jmolenda at apple.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M lldb/include/lldb/Target/Thread.h
    M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp

  Log Message:
  -----------
  [lldb] Correctly annotate threads at a bp site as hitting it (#82709)

This is next in my series of "fix the racey tests that fail on
greendragon" addressing the failure of TestConcurrentManyBreakpoints.py
where we set a breakpoint in a function that 100 threads execute, and we
check that we hit the breakpoint 100 times. But sometimes it is only hit
99 times, and the test fails.

When we hit a software breakpoint, the pc value for the thread is the
address of the breakpoint instruction - as if it had not been hit yet.
And because a user might ADD a breakpoint for the current pc from the
commandline, when we go to resume execution, any thread that is sitting
at a breakpoint site will be silently advanced past the breakpoint
instruction (disable bp, instruction step that thread, re-enable bp)
before resuming -- whether that thread has hit its breakpoint or not.

What this test is exposing is that there is another corner case, a
thread that is sitting at a breakpoint site but has not yet executed the
breakpoint instruction. The thread will have no stop reason, no mach
exception, so it will not be recorded as having hit the breakpoint
(because it hasn't yet). But when we resume execution, because it is
sitting at a breakpoint site, we advance past it and miss the breakpoint
hit.

In 2016 Abhishek Aggarwal handled a similar issue with a patch in
`ProcessGDBRemote::SetThreadStopInfo()`, adding a breakpoint StopInfo
for a thread sitting at a breakpoint site that has no stop reason.
debugserver's `jThreadsInfo` would not correctly execute Abhishek's code
though because it would respond with `"reason":"none"` for a thread with
no stop reason, and `SetThreadStopInfo()` expected an empty reason here.
The first part of my patch is to clear the `reason` if it is `"none"` so
we flow through the code correctly.

On Darwin, though, our stop reply packet (Txx...) includes the
`threads`, `thread-pcs`, and `jstopinfo` keys, which give us the tids
for all current threads, the pc values for those threads, and
`jstopinfo` has a JSON dictionary with the mach exceptions for all
threads that have a mach exception. In
`ProcessGDBRemote::CalculateThreadStopInfo()` we set the StopInfo for
each thread for a private stop and if we have `jstopinfo` it is the
source of all the StopInfos. I have to add the same logic here, to give
the thread a breakpoint StopInfo even though it hasn't executed the
breakpoint yet. In this case we are very early in thread construction
and I only have the information in the Txx stop reply packet -- tids,
pcs, and jstopinfo, so I can't use the normal general mechanisms of
going through the RegisterContext to get the pc, it's a bit different.

If I hack debugserver to not issue `jstopinfo`,
`CalculateThreadStopInfo` will fall back to sending `qThreadStopInfo`
for each thread and going through
`ProcessGDBRemote::SetThreadStopInfo()` to set the stop infos (and with
the `reason:none` fix, use Abhishek's code).

rdar://110549165


  Commit: 3f91bdfdd50aa4eaf1d3e49cf797220cfeccaf16
      https://github.com/llvm/llvm-project/commit/3f91bdfdd50aa4eaf1d3e49cf797220cfeccaf16
  Author: Adrian Prantl <aprantl at apple.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M lldb/include/lldb/Utility/ArchSpec.h
    M lldb/source/Target/Target.cpp
    M lldb/source/Utility/ArchSpec.cpp
    R lldb/test/API/macosx/arm64e-attach/Makefile
    R lldb/test/API/macosx/arm64e-attach/TestArm64eAttach.py
    R lldb/test/API/macosx/arm64e-attach/main.c

  Log Message:
  -----------
  Revert "Replace ArchSpec::PiecewiseCompare() with Triple::operator==()"

This reverts commit 5e6bed8c0ea2f7fe380127763c8f753adae0fc1b while investigating the bots.


  Commit: 775bd60363353b78657967c80f0f109cdb65cf8f
      https://github.com/llvm/llvm-project/commit/775bd60363353b78657967c80f0f109cdb65cf8f
  Author: Visoiu Mistrih Francis <890283+francisvm at users.noreply.github.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
    A llvm/test/CodeGen/RISCV/cm_mvas_mvsa.mir

  Log Message:
  -----------
  [RISCV] Add scheduling info for Zcmp (#82719)

The order of the entries in the list is:

outs, ins, Defs, Uses, implicit-defs, implicit uses, where the last two
are added programatically during codegen depending on the registers
saved/restored and are not described in the TD files.


  Commit: 10c48a772742b7afe665a815b7eba2047f17dc4b
      https://github.com/llvm/llvm-project/commit/10c48a772742b7afe665a815b7eba2047f17dc4b
  Author: Tom Stellard <tstellar at redhat.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/cmake/modules/AddLLVM.cmake
    M llvm/tools/llvm-shlib/CMakeLists.txt

  Log Message:
  -----------
  [llvm-shlib] Change libLLVM-$MAJOR.so symlink to point to versioned SO (#82660)

This symlink was added in 91a384621e5b762d9c173ffd247cfeadd5f436a2 to
maintain backwards compatibility, but it needs to point to
libLLVM.so.$MAJOR.$MINOR rather than libLLVM.so. This works better for
distros that ship libLLVM.so and libLLVM.so.$MAJOR.$MINOR in separate
packages and also prevents mistakes like
libLLVM-19.so -> libLLVM.so -> libLLVM.so.18.1

Fixes #82647


  Commit: c862e612068c9c33995a2e2d289ced44b8eba810
      https://github.com/llvm/llvm-project/commit/c862e612068c9c33995a2e2d289ced44b8eba810
  Author: Jorge Gorbe Moya <jgorbe at google.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/include/llvm/IR/DebugProgramInstruction.h
    M llvm/lib/IR/BasicBlock.cpp
    M llvm/lib/IR/DebugProgramInstruction.cpp

  Log Message:
  -----------
  Revert "[RemoveDIs] Enable DPLabels conversion [3b/3] (#82639)"

This reverts commit 71d47a0b00e9f48dc740556d7f452ffadf308731 because
it causes clang to crash in some cases. See repro posted at
https://github.com/llvm/llvm-project/commit/71d47a0b00e9f48dc740556d7f452ffadf308731


  Commit: 8f2bd8ae68883592a333f4bdbed9798d66e68630
      https://github.com/llvm/llvm-project/commit/8f2bd8ae68883592a333f4bdbed9798d66e68630
  Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir

  Log Message:
  -----------
  [AMDGPU] Introduce iglp_opt(2): Generalized exp/mfma interleaving for select kernels (#81342)

This implements the basic pipelining structure of exp/mfma interleaving
for better extensibility. While it does have improved extensibility,
there are controls which only enable it for DAGs with certain
characteristics (matching the DAGs it has been designed against).


  Commit: d42de86eb37b08b3007a67650b3ca73b9ae174b1
      https://github.com/llvm/llvm-project/commit/d42de86eb37b08b3007a67650b3ca73b9ae174b1
  Author: Michael Spencer <bigcheesegs at gmail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/include/clang/Tooling/DependencyScanning/DependencyScanningService.h
    M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
    A clang/test/ClangScanDeps/optimize-canonicalize-macros.m
    M clang/tools/clang-scan-deps/ClangScanDeps.cpp

  Log Message:
  -----------
  reland: [clang][ScanDeps] Canonicalize -D and -U flags (#82568)

Canonicalize `-D` and `-U` flags by sorting them and only keeping the
last instance of a given name.

This optimization will only fire if all `-D` and `-U` flags start with a
simple identifier that we can guarantee a simple analysis of can
determine if two flags refer to the same identifier or not. See the
comment on `getSimpleMacroName()` for details of what the issues are.

Previous version of this had issues with sed differences between macOS,
Linux, and Windows. This test doesn't check paths, so just don't run
sed.
Other tests should use `sed -E 's:\\\\?:/:g'` to get portable behavior.

Windows has different command line parsing behavior than Linux for
compilation databases, so the test has been adjusted to ignore that
difference.


  Commit: de3b2c293b8bf336f8e1380148cf16b54a794c0c
      https://github.com/llvm/llvm-project/commit/de3b2c293b8bf336f8e1380148cf16b54a794c0c
  Author: Michael Spencer <bigcheesegs at gmail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/include/clang/Basic/DiagnosticSerializationKinds.td
    M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
    M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
    M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
    M clang/test/ClangScanDeps/optimize-vfs-pch.m
    M llvm/include/llvm/ADT/StringSet.h

  Log Message:
  -----------
  [clang][ScanDeps] Allow PCHs to have different VFS overlays (#82294)

It turns out it's not that uncommon for real code to pass a different
set of VFSs while building a PCH than while using the PCH. This can
cause problems as seen in `test/ClangScanDeps/optimize-vfs-pch.m`. If
you scan `compile-commands-tu-no-vfs-error.json` without -Werror and run
the resulting commands, Clang will emit a fatal error while trying to
emit a note saying that it can't find a remapped header.

This also adds textual tracking of VFSs for prebuilt modules that are
part of an included PCH, as the same issue can occur in a module we are
building if we drop VFSs. This has to be textual because we have no
guarantee the PCH had the same list of VFSs as the current TU.

This uses the `PrebuiltModuleListener` to collect `VFSOverlayFiles`
instead of trying to extract it out of a `serialization::ModuleFile`
each time it's needed. There's not a great way to just store a pointer
to the list of strings in the serialized AST.


  Commit: bfcf7a0707592ccc7fd9e805aeb36c4da3f315a6
      https://github.com/llvm/llvm-project/commit/bfcf7a0707592ccc7fd9e805aeb36c4da3f315a6
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h

  Log Message:
  -----------
  [AMDGPU] Remove `hasAtomicFaddRtnForTy` as it is not used anywhere (#82841)


  Commit: 31ab2c4f616d686c06e9b573c8f1a4ae7ad2d8c3
      https://github.com/llvm/llvm-project/commit/31ab2c4f616d686c06e9b573c8f1a4ae7ad2d8c3
  Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M flang/lib/Semantics/resolve-names.cpp
    M flang/test/Semantics/namelist01.f90

  Log Message:
  -----------
  [flang] Ensure USE-associated objects can be in NAMELIST (#82846)

The name resolution for NAMELIST objects didn't allow for symbols that
are not ObjectEntityDetails symbols.

Fixes https://github.com/llvm/llvm-project/issues/82574.


  Commit: b0d2a52c87b36afab4734e1810fb9266aec1128f
      https://github.com/llvm/llvm-project/commit/b0d2a52c87b36afab4734e1810fb9266aec1128f
  Author: Owen Pan <owenpiano at gmail.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M clang/lib/Format/Format.cpp
    M clang/lib/Format/FormatToken.cpp
    M clang/lib/Format/UnwrappedLineFormatter.cpp
    M clang/unittests/Format/FormatTest.cpp

  Log Message:
  -----------
  [clang-format][NFC] Enable RemoveSemicolon for clang-format style (#82735)

Also insert separators for decimal integers longer than 4 digits.


  Commit: 330af6ed6194ca5365bc576517c247f545aee1f4
      https://github.com/llvm/llvm-project/commit/330af6ed6194ca5365bc576517c247f545aee1f4
  Author: MalaySanghiIntel <148750629+MalaySanghiIntel at users.noreply.github.com>
  Date:   2024-02-24 (Sat, 24 Feb 2024)

  Changed paths:
    M llvm/lib/CodeGen/ReplaceWithVeclib.cpp

  Log Message:
  -----------
  Convert argument to reference. (#82741)

Avoid copy of large object


  Commit: 96abee5eef31274415681018553e1d4a16dc16c9
      https://github.com/llvm/llvm-project/commit/96abee5eef31274415681018553e1d4a16dc16c9
  Author: yingopq <115543042+yingopq at users.noreply.github.com>
  Date:   2024-02-24 (Sat, 24 Feb 2024)

  Changed paths:
    M lld/test/ELF/mips-pc-relocs.s
    M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
    A llvm/test/CodeGen/Mips/llvm-ir/forbidden-slot-ir.ll
    A llvm/test/MC/Mips/forbidden-slot.s
    M llvm/test/MC/Mips/mips32r6/relocations.s
    M llvm/test/MC/Mips/mips64r6/relocations.s
    M llvm/test/MC/Mips/relocation.s

  Log Message:
  -----------
  [Mips] Fix unable to handle inline assembly ends with compat-branch o… (#77291)

…n MIPS

Modify:
Add a global variable 'CurForbiddenSlotAttr' to save current
instruction's forbidden slot and whether set reorder. This is the
judgment condition for whether to add nop. We would add a couple of
'.set noreorder' and '.set reorder' to wrap the current instruction and
the next instruction.
Then we can get previous instruction`s forbidden slot attribute and
whether set reorder by 'CurForbiddenSlotAttr'.
If previous instruction has forbidden slot and .set reorder is active
and current instruction is CTI. Then emit a NOP after it.

Fix https://github.com/llvm/llvm-project/issues/61045.

Because https://reviews.llvm.org/D158589 was 'Needs Review' state, not
ending, so we commit pull request again.


  Commit: 91d5653e3ae9742f7fb847f809b534ee128501b0
      https://github.com/llvm/llvm-project/commit/91d5653e3ae9742f7fb847f809b534ee128501b0
  Author: Matthias Springer <me at m-sp.org>
  Date:   2024-02-24 (Sat, 24 Feb 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
    M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
    M mlir/include/mlir/Interfaces/FunctionInterfaces.td
    M mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp
    M mlir/lib/Conversion/ControlFlowToSCF/ControlFlowToSCF.cpp
    M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
    M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
    M mlir/lib/Conversion/SCFToSPIRV/SCFToSPIRV.cpp
    M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
    M mlir/lib/Dialect/Async/IR/Async.cpp
    M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
    M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
    M mlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
    M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
    M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
    M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
    M mlir/lib/Dialect/SPIRV/IR/ControlFlowOps.cpp
    M mlir/lib/Dialect/Shape/IR/Shape.cpp
    M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
    M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp

  Log Message:
  -----------
  [mlir] Use `OpBuilder::createBlock` in op builders and patterns (#82770)

When creating a new block in (conversion) rewrite patterns,
`OpBuilder::createBlock` must be used. Otherwise, no
`notifyBlockInserted` notification is sent to the listener.

Note: The dialect conversion relies on listener notifications to keep
track of IR modifications. Creating blocks without the builder API can
lead to memory leaks during rollback.


  Commit: 60a904b2ad9842b93cc5fa0ad5bda5e22c550b7e
      https://github.com/llvm/llvm-project/commit/60a904b2ad9842b93cc5fa0ad5bda5e22c550b7e
  Author: Aiden Grossman <agrossman154 at yahoo.com>
  Date:   2024-02-24 (Sat, 24 Feb 2024)

  Changed paths:
    M llvm/tools/llvm-exegesis/README.md

  Log Message:
  -----------
  [llvm-exegesis] Fix typos in README


  Commit: 00c0638b5613912a7d1b65c8789bbb8ad1003115
      https://github.com/llvm/llvm-project/commit/00c0638b5613912a7d1b65c8789bbb8ad1003115
  Author: Serge Pavlov <sepavloff at gmail.com>
  Date:   2024-02-24 (Sat, 24 Feb 2024)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
    A llvm/test/CodeGen/AArch64/arm64-fpenv.ll
    M llvm/test/CodeGen/AArch64/preserve.ll

  Log Message:
  -----------
  [AArch64] Intrinsics aarch64_{get,set}_fpsr (#81867)

Two new intrinsics are introduced to read/write FPSR. They are similar
to the existing intrinsics aarch64_{get,set}_fpcr.


  Commit: 1901f442ca6374787e6810adb573d138f80893dd
      https://github.com/llvm/llvm-project/commit/1901f442ca6374787e6810adb573d138f80893dd
  Author: Artem Tyurin <artem.tyurin at gmail.com>
  Date:   2024-02-24 (Sat, 24 Feb 2024)

  Changed paths:
    M llvm/include/llvm/Analysis/TargetLibraryInfo.def
    M llvm/include/llvm/Transforms/Utils/SimplifyLibCalls.h
    M llvm/lib/Analysis/TargetLibraryInfo.cpp
    M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
    M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
    A llvm/test/Transforms/InstCombine/math-odd-even-parity.ll
    M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
    M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp

  Log Message:
  -----------
  [InstCombine] Handle more even/odd math functions (#81324)

At the moment this PR adds support only for `erf` function.

Fixes #77220.


  Commit: d877ab1b99496feb48db1158963abd130e2aee5c
      https://github.com/llvm/llvm-project/commit/d877ab1b99496feb48db1158963abd130e2aee5c
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-02-24 (Sat, 24 Feb 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineInstr.h

  Log Message:
  -----------
  MachineInstr - update TargetRegisterInfo arguments comments. NFC.

"TargetRegisterInfo is passed" -> "TargetRegisterInfo is non-null" - matches the term in the rest of the header.


  Commit: cf9201cfdbc10f4606fc4ca22bf1ccaf5ee841b3
      https://github.com/llvm/llvm-project/commit/cf9201cfdbc10f4606fc4ca22bf1ccaf5ee841b3
  Author: Jacek Caban <jacek at codeweavers.com>
  Date:   2024-02-24 (Sat, 24 Feb 2024)

  Changed paths:
    M llvm/include/llvm/Object/Archive.h
    M llvm/lib/Object/Archive.cpp
    M llvm/lib/Object/ArchiveWriter.cpp
    A llvm/test/tools/llvm-ar/coff-symtab.test
    M llvm/tools/llvm-ar/llvm-ar.cpp

  Log Message:
  -----------
  [llvm-ar] Use COFF archive format for COFF targets. (#82642)

Detect COFF files by default and allow specifying it with --format
argument.

This is important for ARM64EC, which uses a separated symbol map for EC
symbols. Since K_COFF is mostly compatible with K_GNU, this shouldn't
really make a difference for other targets.


  Commit: 8a5aa103c52265337b43330e55e05567046f3ede
      https://github.com/llvm/llvm-project/commit/8a5aa103c52265337b43330e55e05567046f3ede
  Author: Jacek Caban <jacek at codeweavers.com>
  Date:   2024-02-24 (Sat, 24 Feb 2024)

  Changed paths:
    M llvm/include/llvm/Object/Archive.h
    M llvm/lib/Object/Archive.cpp
    M llvm/lib/Object/ArchiveWriter.cpp
    R llvm/test/tools/llvm-ar/coff-symtab.test
    M llvm/tools/llvm-ar/llvm-ar.cpp

  Log Message:
  -----------
  Revert "[llvm-ar] Use COFF archive format for COFF targets." (#82889)

Reverts llvm/llvm-project#82642 for
lld/test/ELF/invalid/Output/data-encoding.test.tmp.a failures on
Windows.


  Commit: 8e22fffc85b36784146041499b716cec74285660
      https://github.com/llvm/llvm-project/commit/8e22fffc85b36784146041499b716cec74285660
  Author: Nathan Sidwell <nathan at acm.org>
  Date:   2024-02-24 (Sat, 24 Feb 2024)

  Changed paths:
    M clang/docs/HLSL/ExpectedDifferences.rst

  Log Message:
  -----------
  [clang] Remove trailing whitespace

Fix commit 66f6929fec3ae


  Commit: 1e98d4883d78ac2c65b87e24694e8b2f1dc9f02d
      https://github.com/llvm/llvm-project/commit/1e98d4883d78ac2c65b87e24694e8b2f1dc9f02d
  Author: Quinn Dawkins <quinn.dawkins at gmail.com>
  Date:   2024-02-24 (Sat, 24 Feb 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/Linalg/Passes.h
    M mlir/include/mlir/Dialect/Linalg/Passes.td
    M mlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp
    M mlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp
    M mlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
    M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
    M mlir/lib/Dialect/Linalg/Transforms/ElementwiseToLinalg.cpp
    M mlir/lib/Dialect/Linalg/Transforms/Generalization.cpp
    M mlir/lib/Dialect/Linalg/Transforms/InlineScalarOperands.cpp
    M mlir/lib/Dialect/Linalg/Transforms/Loops.cpp
    M mlir/lib/Dialect/Linalg/Transforms/NamedOpConversions.cpp
    M mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp

  Log Message:
  -----------
  [mlir][linalg] NFC: Use tablegen macro for pass constructors (#82892)

This uses the tablegen macros for generating pass constructors, exposing
pass options for fold-unit-extent-dims and linalg-detensorize.

Additionally aligns some of the pass namings to their text counterpart.
This includes an API change:

createLinalgGeneralizationPass -> createLinalgGeneralizeNamedOpsPass


  Commit: 7b9504fc012e8b96c2bca9d641e16f719696d723
      https://github.com/llvm/llvm-project/commit/7b9504fc012e8b96c2bca9d641e16f719696d723
  Author: NAKAMURA Takumi <geek4civic at gmail.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M llvm/test/Instrumentation/InstrProfiling/mcdc.ll

  Log Message:
  -----------
  test: Refine InstrProfiling/mcdc.ll


  Commit: cc53707a5c104eb7789829ecdb2e3ae2be1a42da
      https://github.com/llvm/llvm-project/commit/cc53707a5c104eb7789829ecdb2e3ae2be1a42da
  Author: NAKAMURA Takumi <geek4civic at gmail.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M clang/test/Profile/c-mcdc-class.cpp
    M clang/test/Profile/c-mcdc-logicalop-ternary.c
    M clang/test/Profile/c-mcdc-nested-ternary.c
    M clang/test/Profile/c-mcdc-not.c
    M clang/test/Profile/c-mcdc.c
    M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
    M llvm/test/Instrumentation/InstrProfiling/mcdc.ll

  Log Message:
  -----------
  LLVMInstrumentation: Simplify mcdc.tvbitmap.update with GEP.


  Commit: a4096eaeb63e7086a2e0a32bd69523c1fa72db3e
      https://github.com/llvm/llvm-project/commit/a4096eaeb63e7086a2e0a32bd69523c1fa72db3e
  Author: Serge Pavlov <sepavloff at gmail.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp

  Log Message:
  -----------
  [AArch64] Add FPSR to reserved registers (#82907)

This is follow-up of #81867. FPSR was not added to reserved registers,
this resulted in machine verifier fails.


  Commit: a8c3b3e20db01d2947dbe87d0c557150ed777865
      https://github.com/llvm/llvm-project/commit/a8c3b3e20db01d2947dbe87d0c557150ed777865
  Author: Mingming Liu <mingmingl at google.com>
  Date:   2024-02-24 (Sat, 24 Feb 2024)

  Changed paths:
    M compiler-rt/include/profile/InstrProfData.inc
    M llvm/include/llvm/ProfileData/InstrProfData.inc

  Log Message:
  -----------
  [nfc][compiler-rt]Replace Type::getInt8PtrTy with PointerType::getUnqual as a clean-up (#82434)

This is a follow up of
https://github.com/llvm/llvm-project/commit/7b9d73c2f90c0ed8497339a16fc39785349d9610
and
https://github.com/llvm/llvm-project/commit/5ef9ba74120dcc2da70ec25571d459f81ab8a705
* The definition of `Type::getInt8PtrTy` is deleted. This doesn't cause
a compile error because the `Initializer` part of the macro doesn't run.


  Commit: 3b27cc2ceec265d751c909c431ed62c0d7ed9b51
      https://github.com/llvm/llvm-project/commit/3b27cc2ceec265d751c909c431ed62c0d7ed9b51
  Author: NAKAMURA Takumi <geek4civic at gmail.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M llvm/test/tools/llvm-cov/Inputs/mcdc-const.o
    M llvm/test/tools/llvm-cov/Inputs/mcdc-general.o
    M llvm/test/tools/llvm-cov/Inputs/mcdc-macro.o
    M llvm/test/tools/llvm-cov/Inputs/mcdc-maxbs.o
    M llvm/test/tools/llvm-cov/mcdc-macro.test
    M llvm/test/tools/llvm-cov/mcdc-maxbs.test

  Log Message:
  -----------
  Regenerate llvm-cov tests


  Commit: 1f6a347c8abf8868fb4630c404480226c2efc2c2
      https://github.com/llvm/llvm-project/commit/1f6a347c8abf8868fb4630c404480226c2efc2c2
  Author: NAKAMURA Takumi <geek4civic at gmail.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M clang/lib/CodeGen/CodeGenPGO.cpp
    M clang/lib/CodeGen/CodeGenPGO.h
    M clang/lib/CodeGen/CoverageMappingGen.cpp
    M clang/lib/CodeGen/MCDCState.h
    M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp

  Log Message:
  -----------
  Refactor: Let MCDC::State have DecisionByStmt and BranchByStmt

- Prune `RegionMCDCBitmapMap` and `RegionCondIDMap`. They are handled
  by `MCDCState`.
- Rename `s/BitmapMap/DecisionByStmt/`. It can handle Decision stuff.
- Rename `s/CondIDMap/BranchByStmt/`. It can be handle Branch stuff.
- `MCDCRecordProcessor`: Use `DecisionParams.BitmapIdx` directly.


  Commit: 12d29cd171fdf20ab8a516998ad6be0d24a9c050
      https://github.com/llvm/llvm-project/commit/12d29cd171fdf20ab8a516998ad6be0d24a9c050
  Author: Thorsten Schütt <schuett at gmail.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    A llvm/test/CodeGen/AArch64/overflow.ll

  Log Message:
  -----------
  test overflow intrinsics


  Commit: 85da9f80b89be7b96bc1b22909062286fab9dc31
      https://github.com/llvm/llvm-project/commit/85da9f80b89be7b96bc1b22909062286fab9dc31
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlan.cpp
    M llvm/lib/Transforms/Vectorize/VPlan.h

  Log Message:
  -----------
  [VPlan] Remove unused VPTransformState::VPValue2Value (NFCI).

Clean up unused member variable.


  Commit: 4bf06c16fcddcfcea332069bdde5cbf1401513cf
      https://github.com/llvm/llvm-project/commit/4bf06c16fcddcfcea332069bdde5cbf1401513cf
  Author: Martin Wehking <martin.wehking at codeplay.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

  Log Message:
  -----------
  Initialize unsigned integer when declared (#81894)

Initialize ModOpcode directly before the loop execution to silence
static analyzer warnings about the usage of an uninitialized variable.

This leads to a redundant assignment of ElV2F16 inside the first loop
execution, but also avoids superfluous emptiness checks of EltsV2F16
after the first execution of the loop.


  Commit: fe42e72db29e48aa81eac2aa922afd90a7f01517
      https://github.com/llvm/llvm-project/commit/fe42e72db29e48aa81eac2aa922afd90a7f01517
  Author: Rishabh Bali <rishabhsbali at gmail.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    A llvm/include/llvm/CodeGen/AtomicExpand.h
    M llvm/include/llvm/CodeGen/Passes.h
    M llvm/include/llvm/InitializePasses.h
    M llvm/include/llvm/LinkAllPasses.h
    M llvm/lib/CodeGen/AtomicExpandPass.cpp
    M llvm/lib/CodeGen/CodeGen.cpp
    M llvm/lib/Passes/PassBuilder.cpp
    M llvm/lib/Passes/PassRegistry.def
    M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/ARC/ARCTargetMachine.cpp
    M llvm/lib/Target/ARM/ARMTargetMachine.cpp
    M llvm/lib/Target/BPF/BPFTargetMachine.cpp
    M llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
    M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
    M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
    M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
    M llvm/lib/Target/M68k/M68kTargetMachine.cpp
    M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
    M llvm/lib/Target/Mips/MipsTargetMachine.cpp
    M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
    M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
    M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
    M llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
    M llvm/lib/Target/VE/VETargetMachine.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
    M llvm/lib/Target/X86/X86TargetMachine.cpp
    M llvm/lib/Target/XCore/XCoreTargetMachine.cpp
    M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
    M llvm/test/CodeGen/AMDGPU/private-memory-atomics.ll
    M llvm/test/Transforms/AtomicExpand/AArch64/atomicrmw-fp.ll
    M llvm/test/Transforms/AtomicExpand/AArch64/expand-atomicrmw-xchg-fp.ll
    M llvm/test/Transforms/AtomicExpand/AArch64/pcsections.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16-system.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i8-system.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i8.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd-flat-specialization.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fmax.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fmin.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fsub.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-nand.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-simplify-cfg-CAS-block.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/unaligned-atomic.ll
    M llvm/test/Transforms/AtomicExpand/ARM/atomic-expansion-v7.ll
    M llvm/test/Transforms/AtomicExpand/ARM/atomic-expansion-v8.ll
    M llvm/test/Transforms/AtomicExpand/ARM/atomicrmw-fp.ll
    M llvm/test/Transforms/AtomicExpand/ARM/cmpxchg-weak.ll
    M llvm/test/Transforms/AtomicExpand/Hexagon/atomicrmw-fp.ll
    M llvm/test/Transforms/AtomicExpand/LoongArch/atomicrmw-fp.ll
    M llvm/test/Transforms/AtomicExpand/LoongArch/load-store-atomic.ll
    M llvm/test/Transforms/AtomicExpand/Mips/atomicrmw-fp.ll
    M llvm/test/Transforms/AtomicExpand/PowerPC/atomicrmw-fp.ll
    M llvm/test/Transforms/AtomicExpand/PowerPC/cfence-double.ll
    M llvm/test/Transforms/AtomicExpand/PowerPC/cfence-float.ll
    M llvm/test/Transforms/AtomicExpand/PowerPC/cmpxchg.ll
    M llvm/test/Transforms/AtomicExpand/PowerPC/issue55983.ll
    M llvm/test/Transforms/AtomicExpand/RISCV/atomicrmw-fp.ll
    M llvm/test/Transforms/AtomicExpand/SPARC/libcalls.ll
    M llvm/test/Transforms/AtomicExpand/SPARC/partword.ll
    M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-libcall.ll
    M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-non-integer.ll
    M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-rmw-fp.ll
    M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-rmw-initial-load.ll
    M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-xchg-fp.ll
    M llvm/tools/opt/optdriver.cpp

  Log Message:
  -----------
  [CodeGen] Port AtomicExpand to new Pass Manager (#71220)

Port the `atomicexpand` pass to the new Pass Manager. 
Fixes #64559


  Commit: 711014714716753f791291ed6a152e00899469a3
      https://github.com/llvm/llvm-project/commit/711014714716753f791291ed6a152e00899469a3
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M clang/test/CodeGen/tbaa-struct.cpp

  Log Message:
  -----------
  [TBAA] Test for tbaa.struct creation for struct with named bitfields.

Add test for tbaa.struct metadata creation for copies of a struct with
named bitfields.

Test for https://github.com/llvm/llvm-project/issues/82586.


  Commit: f920b746ea818f1d21f317116cbb105e3e85979a
      https://github.com/llvm/llvm-project/commit/f920b746ea818f1d21f317116cbb105e3e85979a
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M llvm/lib/Transforms/Utils/FlattenCFG.cpp
    M llvm/test/Transforms/Util/flatten-cfg.ll

  Log Message:
  -----------
  [FlattenCFG] Fix the miscompilation where phi nodes exist in the merge point (#81987)

When there are phi nodes in the merge point of the if-region, we cannot
do the merge.
Alive2: https://alive2.llvm.org/ce/z/DbgEan
Fixes #70900.


  Commit: 9e7c0b1385baa1acffb62e0589ff100dd972cc0d
      https://github.com/llvm/llvm-project/commit/9e7c0b1385baa1acffb62e0589ff100dd972cc0d
  Author: David CARLIER <devnexen at gmail.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M openmp/runtime/cmake/LibompHandleFlags.cmake
    M openmp/runtime/src/z_Linux_util.cpp

  Log Message:
  -----------
  [OpenMP] Implement __kmp_is_address_mapped on DragonFlyBSD. (#82895)

implement internal __kmp_is_address_mapped.


  Commit: 8eb6757564ccea8f9fc3bb75480f1c1d1784415a
      https://github.com/llvm/llvm-project/commit/8eb6757564ccea8f9fc3bb75480f1c1d1784415a
  Author: Dani <daniel.kiss at arm.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M llvm/include/llvm/IR/Attributes.td
    M llvm/lib/IR/Attributes.cpp
    M llvm/lib/Transforms/Utils/InlineFunction.cpp

  Log Message:
  -----------
  [NFC] Turn the StrictFP attribute check to a CompatRule. (#82600)


  Commit: 2c5a68858b046c8a2ca3ba07ecd82771a5a9b884
      https://github.com/llvm/llvm-project/commit/2c5a68858b046c8a2ca3ba07ecd82771a5a9b884
  Author: Owen Anderson <resistor at mac.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll

  Log Message:
  -----------
  Fix non-splat vector SREM expansion when one of the divisors is a power of two. (#82706)

The expansion previously used, derived from Hacker's Delight,
does not work correctly when the dividend is INT_MIN and the
divisor is a power of two. We now use an alternate derivation
of the A and Q constants specifically for the power-of-two divisor
case to avoid this problem. Credit to Fabian Giesen for the
new derivation.

Fixes https://github.com/llvm/llvm-project/issues/77169


  Commit: d6ded91121fa02837ef6c8c7f06d98ccf4a0fe16
      https://github.com/llvm/llvm-project/commit/d6ded91121fa02837ef6c8c7f06d98ccf4a0fe16
  Author: David Green <david.green at arm.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineInstr.h
    M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
    M llvm/lib/CodeGen/MachineInstr.cpp

  Log Message:
  -----------
  [Codegen] Change getSpillSize/getReloadSize to LocationSize. NFC (#82636)

This is a small part of #70452, attempting to take a small simpler part
of it in isolation to simplify what remains. It changes the getSpillSize,
getFoldedSpillSize, getRestoreSize and getFoldedRestoreSize methods to return
optional<LocationSize> instead of unsigned. The code is intended to be the
same, keeping the optional<> to specify when there was no size found, with some
minor adjustments to make sure that unknown (~UINT64_C(0)) sizes are handled
sensibly.  Hopefully as more unsigned's are converted to LocationSize's the use
of ~UINT64_C(0) can be cleaned up too.


  Commit: 411c5dde59fa4c427941143ca0ec8cd8fdaee407
      https://github.com/llvm/llvm-project/commit/411c5dde59fa4c427941143ca0ec8cd8fdaee407
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M clang/lib/AST/Interp/FunctionPointer.h
    M clang/lib/AST/Interp/Interp.h
    M clang/test/AST/Interp/functions.cpp

  Log Message:
  -----------
  [clang][Interp] Handle null function pointers

We were instead asserting that they are non-null before.


  Commit: 8dfc023e80c35aded33b3e5e4739d3a487b95a7a
      https://github.com/llvm/llvm-project/commit/8dfc023e80c35aded33b3e5e4739d3a487b95a7a
  Author: Alexander Scholz <duddel at users.noreply.github.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M clang-tools-extra/clang-tidy/tool/run-clang-tidy.py
    M clang-tools-extra/docs/ReleaseNotes.rst

  Log Message:
  -----------
  [run-clang-tidy.py] Add option to ignore source files from compilation database (#82416)

I added the option -source-filter to the
`run-clang-tidy.py` script in the clang-tools-extra.

This option allows for handing over a regex, to filter out source files
from the compilation database (not run `clang-tidy` on them).


  Commit: cb4f94db83d9c4373b485493ef079e318f63bf13
      https://github.com/llvm/llvm-project/commit/cb4f94db83d9c4373b485493ef079e318f63bf13
  Author: SingleAccretion <62474226+SingleAccretion at users.noreply.github.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M lld/docs/WebAssembly.rst
    M lld/test/wasm/data-layout.s
    M lld/wasm/Config.h
    M lld/wasm/Driver.cpp
    M lld/wasm/Options.td
    M lld/wasm/Writer.cpp

  Log Message:
  -----------
  [lld][WebAssembly] Add `--no-growable-memory` (#82890)

We recently added `--initial-heap` - an option that allows one to up the
initial memory size without the burden of having to know exactly how
much is needed.

However, in the process of implementing support for this in Emscripten
(https://github.com/emscripten-core/emscripten/pull/21071), we have
realized that `--initial-heap` cannot support the use-case of
non-growable memories by itself, since with it we don't know what to set
`--max-memory` to.

We have thus agreed to move the above work forward by introducing
another option to the linker (see
https://github.com/emscripten-core/emscripten/pull/21071#discussion_r1491755616),
one that would allow users to explicitly specify they want a
non-growable memory.

This change does this by introducing `--no-growable-memory`: an option
that is mutally exclusive with `--max-memory` (for simplicity - we can
also decide that it should override or be overridable by `--max-memory`.
In Emscripten a similar mix of options results in `--no-growable-memory`
taking precedence). The option specifies that the maximum memory size
should be set to the initial memory size, effectively disallowing memory
growth.

Closes #81932.


  Commit: d99b1481770e4f8454c7f238dcd40c8e977e6b70
      https://github.com/llvm/llvm-project/commit/d99b1481770e4f8454c7f238dcd40c8e977e6b70
  Author: FruitClover <m.kashkarov at samsung.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M llvm/test/TableGen/directive1.td
    M llvm/test/TableGen/directive2.td
    M llvm/utils/TableGen/DirectiveEmitter.cpp

  Log Message:
  -----------
  [TableGen] Fix __CLAUSE_NO_CLASS macro leak in directive emitter (#82912)

`__CLAUSE_NO_CLASS` was not undefined inside the
`GEN_CLANG_CLAUSE_CLASS` block, resulting in macro redifinition warnings
when several generated directives are used simultaneously.


  Commit: ac9e67756e0157793d565c2cceaf82e4403f58ba
      https://github.com/llvm/llvm-project/commit/ac9e67756e0157793d565c2cceaf82e4403f58ba
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/lib/Analysis/ValueTracking.cpp

  Log Message:
  -----------
  [ValueTracking][NFC] Early exit when enumerating guaranteed well-defined/non-poison operands. (#82812)

According to the [coverage
result](https://dtcxzyw.github.io/llvm-opt-benchmark/coverage/home/dtcxzyw/llvm-project/llvm/lib/Analysis/ValueTracking.cpp.html#L7193)
on my benchmark, `llvm::mustTriggerUB` returns true with an average of
35.0M/12.3M=2.85 matches. I think we can stop enumerating when one of
the matches succeeds to avoid filling the temporary buffer
`NonPoisonOps`.

This patch introduces two template functions
`handleGuaranteedWellDefinedOps/handleGuaranteedNonPoisonOps`. They will
pass well-defined/non-poison operands to inlinable callbacks `Handle`.
If the callback returns true, stop processing and return true.
Otherwise, return false.

Compile-time improvement:
https://llvm-compile-time-tracker.com/compare.php?from=13acb3af5ad48e850cf37dcf02270ede3f267bd4&to=2b55f513c1b6dd2732cb79a25f3eaf6c5e4d6619&stat=instructions:u

|stage1-O3|stage1-ReleaseThinLTO|stage1-ReleaseLTO-g|stage1-O0-g|stage2-O3|stage2-O0-g|stage2-clang|
|--|--|--|--|--|--|--|
|-0.03%|-0.04%|-0.06%|-0.03%|-0.05%|+0.03%|-0.02%|


  Commit: eca0bd171e6ab0f1c60e3950f5fa5fa1eaf1fa32
      https://github.com/llvm/llvm-project/commit/eca0bd171e6ab0f1c60e3950f5fa5fa1eaf1fa32
  Author: Noah Goldstein <goldstein.w.n at gmail.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M llvm/test/Transforms/InstCombine/known-bits.ll

  Log Message:
  -----------
  [ValueTracking] Add tests for tracking `(and/or cond0, cond1)` on both sides of branch; NFC


  Commit: 6f9b0a7095cbb7781e1f387f99d5725c950ce79b
      https://github.com/llvm/llvm-project/commit/6f9b0a7095cbb7781e1f387f99d5725c950ce79b
  Author: Noah Goldstein <goldstein.w.n at gmail.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M llvm/lib/Analysis/DomConditionCache.cpp
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/test/Transforms/InstCombine/known-bits.ll

  Log Message:
  -----------
  [ValueTracking] Compute knownbits for `(and/or cond0, cond1)` on both sides of branch

The false branch for `and` and true branch for `or` provide less
information (intersection as opposed to union), but still can give
some useful information.

Closes #82818


  Commit: 641d160ad236fb7a472a9eedbda2d62541e7dd0c
      https://github.com/llvm/llvm-project/commit/641d160ad236fb7a472a9eedbda2d62541e7dd0c
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    M llvm/test/Transforms/InstCombine/minmax-fold.ll
    M llvm/test/Transforms/InstCombine/select_meta.ll

  Log Message:
  -----------
  [InstCombine] Fold umax(smax)/smin(umin) with non-negative constants (#82929)

This patch extends `reassociateMinMaxWithConstants` to fold the
following patterns:
```
umax (smax X, nneg C0), nneg C1 --> smax X, (umax C0, C1)
smin (umin X, nneg C0), nneg C1 --> umin X, (smin/umin C0, C1)
```
Alive2: https://alive2.llvm.org/ce/z/wfEj-e

Address the comment
https://github.com/llvm/llvm-project/pull/82472#pullrequestreview-1896922897.


  Commit: 529b5705db2ccefeee2c9b8cb5144e1f5a6420de
      https://github.com/llvm/llvm-project/commit/529b5705db2ccefeee2c9b8cb5144e1f5a6420de
  Author: David CARLIER <devnexen at gmail.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M compiler-rt/lib/sanitizer_common/sanitizer_getauxval.h
    M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp

  Log Message:
  -----------
  Revert "[compiler-rt] simplifying ::ReExec for freebsd. (#79711)" (#82933)

This reverts commit 691b12a2dcc12fa43517d23f2a9b6039616eebc8.


  Commit: 085f9b0d146fc99bbb0e193593aad696fc50a056
      https://github.com/llvm/llvm-project/commit/085f9b0d146fc99bbb0e193593aad696fc50a056
  Author: Owen Pan <owenpiano at gmail.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M clang/docs/ClangFormatStyleOptions.rst
    M clang/include/clang/Format/Format.h

  Log Message:
  -----------
  [clang-format][doc] Update documentation for RemoveSemicolon


  Commit: da092e8808319b572fa9fea7eb74e55e7434a8b2
      https://github.com/llvm/llvm-project/commit/da092e8808319b572fa9fea7eb74e55e7434a8b2
  Author: Matteo Franciolini <mfranciolini at tesla.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M mlir/lib/Bytecode/Reader/BytecodeReader.cpp

  Log Message:
  -----------
  Fix bytecode roundtrip of unregistered ops (#82932)

When roundtripping to bytecode an unregistered operation name that does
not contain any '.' separator, the bytecode writer will emit an op
encoding without a proper opName. In this case, the string just becomes
a possibly unknown dialect name. At parsing, this dialect name is
used as a proper operation name.

However, when the unregistered operation name coincidentally matches
that of a dialect, the parser would fail. That means we can't roundtrip
an unregistered op with a name that matches one of the registered
dialect names. For example,

```
"index"() : () -> ()
```

can be emitted but cannot be parsed, because its name is coincidentally
the same as that of the Index dialect. The patch removes such
inconsistency.

This patch specifically fixes the bytecode roundtrip of
`mlir/test/IR/parser.mlir`.


  Commit: bc6b5be6a298ab094d1bb41f393ca422feddd298
      https://github.com/llvm/llvm-project/commit/bc6b5be6a298ab094d1bb41f393ca422feddd298
  Author: Matteo Franciolini <mfranciolini at tesla.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M mlir/test/lib/Dialect/Test/TestAttributes.cpp

  Log Message:
  -----------
  Fix TestI64ElementsAttr printer (#82931)

This enables to correctly roundtrip the attribute to text or bytecode.


  Commit: 1d5e3b2d6559a853c544099e4cf1d46f44f83368
      https://github.com/llvm/llvm-project/commit/1d5e3b2d6559a853c544099e4cf1d46f44f83368
  Author: tw-ilson <63574793+tw-ilson at users.noreply.github.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M mlir/lib/Dialect/SPIRV/IR/AtomicOps.cpp
    M mlir/lib/Dialect/SPIRV/IR/ControlFlowOps.cpp
    M mlir/lib/Dialect/SPIRV/IR/GroupOps.cpp
    M mlir/lib/Dialect/SPIRV/IR/IntegerDotProductOps.cpp
    M mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp
    M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
    M mlir/lib/Dialect/SPIRV/IR/SPIRVParsingUtils.cpp
    M mlir/lib/Dialect/SPIRV/IR/SPIRVParsingUtils.h

  Log Message:
  -----------
  [mlir][spirv] Use ODS generated attribute names for op definitions (#81552)

Since ODS generates getters functions for SPIRV operations' attribute
names, we replace instances of these hardcoded strings in the SPIR-V
dialect's op parser/printer with function calls for consistency.

Fixes https://github.com/llvm/llvm-project/issues/77627

---------

Co-authored-by: Lei Zhang <antiagainst at gmail.com>


  Commit: 44b096682791518a36a4b59bd0f3538b1aa0f666
      https://github.com/llvm/llvm-project/commit/44b096682791518a36a4b59bd0f3538b1aa0f666
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M mlir/unittests/Target/LLVM/SerializeROCDLTarget.cpp

  Log Message:
  -----------
  Apply clang-tidy fixes for modernize-use-override in SerializeROCDLTarget.cpp (NFC)


  Commit: 97678078442adbd6c12cc54f7a36152f8873afb4
      https://github.com/llvm/llvm-project/commit/97678078442adbd6c12cc54f7a36152f8873afb4
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M mlir/unittests/Target/LLVM/SerializeROCDLTarget.cpp

  Log Message:
  -----------
  Apply clang-tidy fixes for readability-container-size-empty in SerializeROCDLTarget.cpp (NFC)


  Commit: b1d1f5786fc24fa538b064e7b27f07a1765fce35
      https://github.com/llvm/llvm-project/commit/b1d1f5786fc24fa538b064e7b27f07a1765fce35
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M mlir/unittests/Target/LLVM/SerializeToLLVMBitcode.cpp

  Log Message:
  -----------
  Apply clang-tidy fixes for modernize-use-override in SerializeToLLVMBitcode.cpp (NFC)


  Commit: c67a4ae47c86f1f390db7ba0ea9c021abff130f8
      https://github.com/llvm/llvm-project/commit/c67a4ae47c86f1f390db7ba0ea9c021abff130f8
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M mlir/unittests/Target/LLVM/SerializeToLLVMBitcode.cpp

  Log Message:
  -----------
  Apply clang-tidy fixes for readability-container-size-empty in SerializeToLLVMBitcode.cpp (NFC)


  Commit: 0f02431273faa2cd001c59fd5de767659bc0c976
      https://github.com/llvm/llvm-project/commit/0f02431273faa2cd001c59fd5de767659bc0c976
  Author: Kai Luo <lkail at cn.ibm.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
    A llvm/test/Transforms/InstCombine/sub-xor-cmp.ll

  Log Message:
  -----------
  [InstCombine] Fold (sub (xor X, (sext C)), (sext C)) => (select C (neg X), X) (#79417)

This is useful when computing absdiff.

Correctness prove: https://alive2.llvm.org/ce/z/eMbxps,
https://alive2.llvm.org/ce/z/SNCWJe.

---------

Co-authored-by: Yingwei Zheng <dtcxzyw at qq.com>


  Commit: 8be39b3901e3326ceebeaf0381f8cc57fdc0d464
      https://github.com/llvm/llvm-project/commit/8be39b3901e3326ceebeaf0381f8cc57fdc0d464
  Author: hev <wangrui at loongson.cn>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
    M llvm/test/CodeGen/LoongArch/intrinsic-memcpy.ll

  Log Message:
  -----------
  [LoongArch] Improve pattern matching for AddLike predicate (#82767)

This commit updates the pattern matching logic for the `AddLike`
predicate in `LoongArchInstrInfo.td` to use the
`isBaseWithConstantOffset` function provided by `CurDAG`. This
optimization aims to improve the efficiency of pattern matching by
identifying cases where the operation can be represented as a base
address plus a constant offset, which can lead to more efficient code
generation.


  Commit: c087bebb02ef35021547c6ddf0a3fdf1cbc8ad17
      https://github.com/llvm/llvm-project/commit/c087bebb02ef35021547c6ddf0a3fdf1cbc8ad17
  Author: NAKAMURA Takumi <geek4civic at gmail.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
    M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
    M llvm/unittests/ProfileData/CoverageMappingTest.cpp

  Log Message:
  -----------
  Introduce mcdc::TVIdxBuilder (LLVM side, NFC) (#80676)

This is a preparation of incoming Clang changes (#82448) and just checks
`TVIdx` is calculated correctly. NFC.

`TVIdxBuilder` calculates deterministic Indices for each Condition Node.
It is used for `clang` to emit `TestVector` indices (aka ID) and for
`llvm-cov` to reconstruct `TestVectors`.

This includes the unittest `CoverageMappingTest.TVIdxBuilder`.

See also
https://discourse.llvm.org/t/rfc-coverage-new-algorithm-and-file-format-for-mc-dc/76798


  Commit: ce4da0c4ee6e414ddb771d45b68bc7e31b12970e
      https://github.com/llvm/llvm-project/commit/ce4da0c4ee6e414ddb771d45b68bc7e31b12970e
  Author: Matteo Franciolini <mfranciolini at tesla.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp

  Log Message:
  -----------
  Enables textual IR roundtripping through `--verifyRoundtrip` (#82946)

The patch enables roundtrip to textual file when running
`--verifyRoundtrip`. The verification is successful if both textual and
bytecode formats can roundtrip successfully.


  Commit: e5332482c6009699d7b66393617a389d8ae62710
      https://github.com/llvm/llvm-project/commit/e5332482c6009699d7b66393617a389d8ae62710
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAttributes.td
    M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
    M mlir/test/Dialect/SPIRV/IR/function-decorations.mlir
    M mlir/test/Dialect/SPIRV/IR/structure-ops.mlir
    M mlir/test/Target/SPIRV/decorations.mlir
    M mlir/test/Target/SPIRV/function-decorations.mlir
    M mlir/test/Target/SPIRV/global-variable.mlir

  Log Message:
  -----------
  [MLIR][Spirv] Use StringAttr for linkage_name (NFC) (#82953)

std::string was used here, likely by mistake. The usual convention for
attributes is to use StringAttr.


  Commit: f75c6ed93e785c09884a317ce2bfd440e7f8f573
      https://github.com/llvm/llvm-project/commit/f75c6ed93e785c09884a317ce2bfd440e7f8f573
  Author: Jason Eckhardt <jeckhardt at nvidia.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/utils/TableGen/CodeGenHwModes.h
    M llvm/utils/TableGen/DecoderEmitter.cpp

  Log Message:
  -----------
  [TableGen] Efficiency improvements for encoding HwMode collection. (#82902)

Currently the DecoderEmitter spends a fair amount of cycles performing
repeated linear walks over the entire instruction list. This patch
eliminates one such walk during HwMode collection for EncodingInfos.

The eliminated traversal visits every instruction and then every
EncodingInfos entry for that instruction merely to collect all
referenced HwModes. That information already happens to be present in
the HwModeSelects created during the one-time construction of
CodeGenHwModes. We instead traverse the HwModeSelects, collecting each
one referenced as an encoding select. This set is a small constant in
size and does not generally grow with the size of the instruction set.


  Commit: 8c5e9cf737138aba22a4a8f64ef2c5efc80dd7f9
      https://github.com/llvm/llvm-project/commit/8c5e9cf737138aba22a4a8f64ef2c5efc80dd7f9
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/lib/AST/CMakeLists.txt
    M clang/lib/AST/Interp/ByteCodeExprGen.cpp
    M clang/lib/AST/Interp/Function.h
    M clang/lib/AST/Interp/Interp.cpp
    M clang/lib/AST/Interp/Interp.h
    A clang/lib/AST/Interp/InterpShared.cpp
    A clang/lib/AST/Interp/InterpShared.h
    M clang/lib/AST/Interp/Opcodes.td
    A clang/test/AST/Interp/nullable.cpp
    M clang/test/Sema/attr-nonnull.c
    M clang/test/SemaCXX/attr-nonnull.cpp

  Log Message:
  -----------
  [clang][Interp] Implement nullability argument checking

Implement constexpr checking for null pointers being passed to
arguments annotated as nonnull.


  Commit: 16d0592dda89495afdbefa5c57eb006559a59465
      https://github.com/llvm/llvm-project/commit/16d0592dda89495afdbefa5c57eb006559a59465
  Author: Aiden Grossman <agrossman154 at yahoo.com>
  Date:   2024-02-25 (Sun, 25 Feb 2024)

  Changed paths:
    M llvm/tools/llvm-exegesis/llvm-exegesis.cpp

  Log Message:
  -----------
  [llvm-exegesis] Remove exegesis prefix in exegesis namespace (#82871)

This patch removes the exegesis:: prefix within the exegesis namespace
in llvm-exegesis.cpp as it isn't necessary due to the code already being
wrapped in the namespace.


  Commit: cace477c0b6c3d9494ead66eb725c6e72f27b767
      https://github.com/llvm/llvm-project/commit/cace477c0b6c3d9494ead66eb725c6e72f27b767
  Author: Dominik Wójt <dominik.wojt at arm.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/lib/Driver/ToolChain.cpp
    M clang/test/Driver/print-multi-selection-flags.c

  Log Message:
  -----------
  [clang][AArch64] multilib: fix deduction of "-march=" option (#81474)

The deduced "-march=" option always started with aarch64, which is not a
valid value. There was also no way to distinguish between armv8-r and
armv8-a. After this commit, the deduced "-march=" option will start with
greatest available "armv*-a" value or "armv8-r".


  Commit: 0c7a605ada6cb392e6e8c16dbccf2b7e59017399
      https://github.com/llvm/llvm-project/commit/0c7a605ada6cb392e6e8c16dbccf2b7e59017399
  Author: NAKAMURA Takumi <geek4civic at gmail.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/lib/CodeGen/CoverageMappingGen.cpp

  Log Message:
  -----------
  clangCodeGen: [MC/DC] Refactor CoverageGen.

- Introduce `createDecision(E)` for the root node of `VisitBin`.
- Handle `mcdc::DecisionParameters` for each Decision method.


  Commit: 892b4beeac50920e630f10905b2916295e2eb6d8
      https://github.com/llvm/llvm-project/commit/892b4beeac50920e630f10905b2916295e2eb6d8
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/lib/Transforms/Utils/Local.cpp
    A llvm/test/Transforms/GVN/pr82884.ll

  Log Message:
  -----------
  [GVN] Drop nsw/nuw flags when replacing the result of a with.overflow intrinsic with a overflowing binary operator (#82935)

Alive2: https://alive2.llvm.org/ce/z/gyL7mn
Fixes https://github.com/llvm/llvm-project/issues/82884.


  Commit: 15426017bda54fb8d9a62cb887edae754e8b7733
      https://github.com/llvm/llvm-project/commit/15426017bda54fb8d9a62cb887edae754e8b7733
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/lib/AST/Interp/ByteCodeExprGen.cpp
    M clang/test/AST/Interp/complex.cpp

  Log Message:
  -----------
  [clang][Interp] Handle non-complex operands in complex bin ops

Either LHS or RHS might be non-complex, but not both.


  Commit: 4216a300e324d58bb6f0efcc8b2490e6c6983ae8
      https://github.com/llvm/llvm-project/commit/4216a300e324d58bb6f0efcc8b2490e6c6983ae8
  Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.td

  Log Message:
  -----------
  [RISCV][NFC] Use sub to construct RVV registers without V0 (#82962)

This reduces some lines.


  Commit: e510fc77539022c195cc83b5dceb1c0b493dafcb
      https://github.com/llvm/llvm-project/commit/e510fc77539022c195cc83b5dceb1c0b493dafcb
  Author: Yeting Kuo <46629943+yetingk at users.noreply.github.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/docs/LangRef.rst
    M llvm/include/llvm/IR/Intrinsics.td
    M llvm/include/llvm/IR/VPIntrinsics.def
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/lib/IR/IntrinsicInst.cpp
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/llrint-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/lrint-vp.ll
    M llvm/unittests/IR/VPIntrinsicTest.cpp

  Log Message:
  -----------
  [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (#82627)

RISC-V implements vector lrint/llrint by vfcvt.x.f.v.


  Commit: 56b63e0886ba369a53df5e1d429cde2e4a2d4a34
      https://github.com/llvm/llvm-project/commit/56b63e0886ba369a53df5e1d429cde2e4a2d4a34
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/lib/AST/Interp/Interp.h
    M clang/test/SemaCXX/compare-modules-cxx2a.cpp

  Log Message:
  -----------
  [clang][Interp] Get <=> value info from weak result

This is also what the current interpreter does and a couple of
test cases expect that.


  Commit: 94ca854d3c874322b1d4b5606c5762adcd3b8e05
      https://github.com/llvm/llvm-project/commit/94ca854d3c874322b1d4b5606c5762adcd3b8e05
  Author: Clement Courbet <courbet at google.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.cpp
    M clang-tools-extra/clang-tidy/utils/DeclRefExprUtils.cpp
    M clang-tools-extra/clang-tidy/utils/DeclRefExprUtils.h
    M clang-tools-extra/docs/ReleaseNotes.rst
    M clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-copy-initialization.cpp
    M clang-tools-extra/unittests/clang-tidy/DeclRefExprUtilsTest.cpp

  Log Message:
  -----------
  [clang-tidy] Add support for determining constness of more expressions. (#82617)

This uses a more systematic approach for determining whcich
`DeclRefExpr`s mutate the underlying object: Instead of using a few
matchers, we walk up the AST until we find a parent that we can prove
cannot change the underlying object.

This allows us to handle most address taking and dereference, bindings
to value and const& variables, and track constness of pointee (see
changes in DeclRefExprUtilsTest.cpp).

This allows supporting more patterns in
`performance-unnecessary-copy-initialization`.

Those two patterns are relatively common:

```
const auto e = (*vector_ptr)[i]
```

and

```
const auto e = vector_ptr->at(i);
```

In our codebase, we have around 25% additional findings from
`performance-unnecessary-copy-initialization` with this change. I did
not see any additional false positives.


  Commit: 60677110a2e0b7ba9f5bf2fcfc1b3f8888eb7f58
      https://github.com/llvm/llvm-project/commit/60677110a2e0b7ba9f5bf2fcfc1b3f8888eb7f58
  Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/include/llvm/IR/DebugInfo.h
    M llvm/lib/IR/DebugInfo.cpp

  Log Message:
  -----------
  [RemoveDIs] Fix DPLabel crash reported in #82854


  Commit: 3356818eed3224c50012f8ed2bfa046f2bc8e154
      https://github.com/llvm/llvm-project/commit/3356818eed3224c50012f8ed2bfa046f2bc8e154
  Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/include/llvm/IR/DebugProgramInstruction.h
    M llvm/lib/IR/BasicBlock.cpp
    M llvm/lib/IR/DebugProgramInstruction.cpp

  Log Message:
  -----------
  Reapply [RemoveDIs] Enable DPLabels conversion [3b/3] (#82639)

Enables conversion between llvm.dbg.label and DPLabel.


  Commit: cb2dd0282cf2f5dfc58d5a060dd2aa73c3b4c08e
      https://github.com/llvm/llvm-project/commit/cb2dd0282cf2f5dfc58d5a060dd2aa73c3b4c08e
  Author: Nathan Sidwell <nathan at acm.org>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/lib/CodeGen/CGRecordLayoutBuilder.cpp

  Log Message:
  -----------
  [clang][NFC] constify or staticify some CGRecordLowering fns (#82874)

Some CGRecordLowering functions either do not need the object or do not mutate it.  Thus marking static or const as appropriate.


  Commit: 8cfb71613c452dd45a84a74affe8464bfd33de02
      https://github.com/llvm/llvm-project/commit/8cfb71613c452dd45a84a74affe8464bfd33de02
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp
    M mlir/test/Dialect/ArmSME/vector-legalization.mlir

  Log Message:
  -----------
  [mlir][ArmSME] Replace use of `isa` with `isa_and_present` (#82798)

`op` can be null here, in which case this should just return a null
value back.


  Commit: e521752c04a479e3751003645a728667f3199d24
      https://github.com/llvm/llvm-project/commit/e521752c04a479e3751003645a728667f3199d24
  Author: Michael Halkenhäuser <MichaelGerald.Halkenhauser at amd.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M openmp/libomptarget/include/OpenMP/OMPT/Interface.h
    M openmp/libomptarget/src/OpenMP/OMPT/Callback.cpp
    M openmp/libomptarget/src/device.cpp
    M openmp/libomptarget/test/ompt/callbacks.h
    M openmp/libomptarget/test/ompt/target_memcpy.c
    A openmp/libomptarget/test/ompt/target_memcpy_emi.c

  Log Message:
  -----------
  [OpenMP][OMPT] Add OMPT callback for device data exchange 'Device-to-Device' (#81991)

Since there's no `ompt_target_data_transfer_tofrom_device` (within
ompt_target_data_op_t enum) or something other that conveys the meaning
of inter-device data exchange we decided to indicate a Device-to-Device
transfer by using: optype == ompt_target_data_transfer_from_device (=3)

Hence, a device transfer may be identified e.g. by checking for: (optype
== 3) &&
(src_device_num < omp_get_num_devices()) &&
(dest_device_num < omp_get_num_devices())

Fixes: #66478


  Commit: a5ccf8522b96c56fc6bda54cf68a64c5d65b75cb
      https://github.com/llvm/llvm-project/commit/a5ccf8522b96c56fc6bda54cf68a64c5d65b75cb
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/lib/AST/Interp/ByteCodeExprGen.cpp
    M clang/test/AST/Interp/complex.cpp

  Log Message:
  -----------
  [clang][Interp] Not all RVO call expressions are initializing

We do not necessarily prepare storage for the return value when
we are returning a complex value.


  Commit: 73f11f9579a3206608ad9a07b5793ba451676087
      https://github.com/llvm/llvm-project/commit/73f11f9579a3206608ad9a07b5793ba451676087
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M lldb/test/API/lldbtest.py

  Log Message:
  -----------
  [lldb][test] Correct results regex for Windows

On Windows the line has \r\n at the end.


  Commit: 53697a5dcdc4d83cbe0cb6d88e33c3f1bb3ea487
      https://github.com/llvm/llvm-project/commit/53697a5dcdc4d83cbe0cb6d88e33c3f1bb3ea487
  Author: Diana Picus <Diana-Magda.Picus at amd.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.cpp

  Log Message:
  -----------
  [AMDGPU] Refactor unit test. NFC (#82976)

I'm about to add more tests here (downstream for now).

Change-Id: Ibd5edb398f544c90e6e8b5e49b1777a407f0594a


  Commit: d0c99f4b1ddc55f3af2ee2d084bc8c97a2ab1acf
      https://github.com/llvm/llvm-project/commit/d0c99f4b1ddc55f3af2ee2d084bc8c97a2ab1acf
  Author: Nikolas Klauser <nikolasklauser at berlin.de>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M libcxx/include/__type_traits/invoke.h

  Log Message:
  -----------
  [libc++] Remove __member_pointer_traits_imp (#82081)

They aren't ever used, so they can be removed.


  Commit: d0b1fec9e1510d01dad2c9c429573eaa75f0963c
      https://github.com/llvm/llvm-project/commit/d0b1fec9e1510d01dad2c9c429573eaa75f0963c
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M lldb/test/API/functionalities/thread/state/TestThreadStates.py

  Log Message:
  -----------
  [lldb][test][Windows] Remove expected fail for a thread state test

No idea why but this is now passing (though if it randomly fails
I won't be surprised).

See https://github.com/llvm/llvm-project/issues/25034 for background
on the original expected fail.


  Commit: bb87c914fec6526fbda81991ce0d35e60040ab9f
      https://github.com/llvm/llvm-project/commit/bb87c914fec6526fbda81991ce0d35e60040ab9f
  Author: CarolineConcatto <caroline.concatto at arm.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    M llvm/test/MC/AArch64/SVE/cntb-diagnostics.s
    M llvm/test/MC/AArch64/SVE/ptrue-diagnostics.s

  Log Message:
  -----------
  [AArch64][SVE]Add error message in the AsmParser for SVEPattern (#82668)

All assembly instructions that have an operand using sve_pred_enum and
mistakenly use '#' in front of it would fail without an error message.


  Commit: b4b490496ab8994fee41005471d075812bdb3a65
      https://github.com/llvm/llvm-project/commit/b4b490496ab8994fee41005471d075812bdb3a65
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

  Log Message:
  -----------
  [RISCV] Fix insert_subvector with fixed vector type creating invalid node (#82975)

If the vector type is a fixed vector type, we convert it to a container
scalable vector type to compute its reg class. But we need to keep the
old
fixed type so we create a result node with the same type.

This code path is currently dead so I haven't been able to create a test
case
for it. But I have an upcoming patch for insert_subvector lowering that
will
exercise this.


  Commit: 954a048d0d03d874d214cbe9ce0da456a0da35d3
      https://github.com/llvm/llvm-project/commit/954a048d0d03d874d214cbe9ce0da456a0da35d3
  Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
    M llvm/test/Transforms/SimplifyCFG/branch-fold-dbg.ll

  Log Message:
  -----------
  [RemoveDIs] Fix SimplifyCFG behaviour to match existing behaviour (#82981)

llvm.dbg.labels are deleted in SpeculativelyExecuteBB so DPLabels should
be too.

Modify existing test to check this (NB I couldn't find a dedicated
debug-info test that checks this behaviour).


  Commit: 3d084e37ab038200df5f5ef371fdea2fcda05680
      https://github.com/llvm/llvm-project/commit/3d084e37ab038200df5f5ef371fdea2fcda05680
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-concat.ll

  Log Message:
  -----------
  [RISCV] Add tests for fixed length concat_vector. NFC

These shufflevector chains will get combined into a n-ary concat_vectors node.


  Commit: 28233408a2c8670d7d94ae1bf18a2bb5f7194c32
      https://github.com/llvm/llvm-project/commit/28233408a2c8670d7d94ae1bf18a2bb5f7194c32
  Author: Jack Styles <99514724+Stylie777 at users.noreply.github.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/Passes.h
    M llvm/include/llvm/CodeGen/TargetInstrInfo.h
    M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
    M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
    M llvm/include/llvm/InitializePasses.h
    M llvm/include/llvm/Passes/CodeGenPassBuilder.h
    M llvm/include/llvm/Passes/MachinePassRegistry.def
    M llvm/lib/CodeGen/CMakeLists.txt
    M llvm/lib/CodeGen/CodeGen.cpp
    A llvm/lib/CodeGen/InitUndef.cpp
    M llvm/lib/CodeGen/TargetPassConfig.cpp
    M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
    M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
    M llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
    M llvm/lib/Target/ARM/ARMInstrInfo.td
    M llvm/lib/Target/ARM/ARMSubtarget.h
    M llvm/lib/Target/RISCV/CMakeLists.txt
    M llvm/lib/Target/RISCV/RISCV.h
    M llvm/lib/Target/RISCV/RISCVInstrInfo.h
    R llvm/lib/Target/RISCV/RISCVRVVInitUndef.cpp
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
    M llvm/test/CodeGen/AArch64/O3-pipeline.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
    M llvm/test/CodeGen/ARM/O3-pipeline.ll
    M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
    M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
    M llvm/test/CodeGen/RISCV/O0-pipeline.ll
    M llvm/test/CodeGen/RISCV/O3-pipeline.ll
    M llvm/test/CodeGen/RISCV/rvv/handle-noreg-with-implicit-def.mir
    M llvm/test/CodeGen/RISCV/rvv/subregister-undef-early-clobber.mir
    M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir
    M llvm/test/CodeGen/Thumb2/mve-intrinsics/vcaddq.ll
    M llvm/test/CodeGen/Thumb2/mve-laneinterleaving-cost.ll
    M llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
    M llvm/test/CodeGen/Thumb2/mve-vmull-splat.ll
    M llvm/test/CodeGen/X86/opt-pipeline.ll
    M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn

  Log Message:
  -----------
  [CodeGen] [ARM] Make RISC-V Init Undef Pass Target Independent and add support for the ARM Architecture.  (#77770)

When using Greedy Register Allocation, there are times where
early-clobber values are ignored, and assigned the same register. This
is illeagal behaviour for these intructions. To get around this, using
Pseudo instructions for early-clobber registers gives them a definition
and allows Greedy to assign them to a different register. This then
meets the ARM Architecture Reference Manual and matches the defined
behaviour.

This patch takes the existing RISC-V patch and makes it target
independent, then adds support for the ARM Architecture. Doing this will
ensure early-clobber restraints are followed when using the ARM
Architecture. Making the pass target independent will also open up
possibility that support other architectures can be added in the future.


  Commit: af971396a9c77a57eb66fcb7eac3f671a7084680
      https://github.com/llvm/llvm-project/commit/af971396a9c77a57eb66fcb7eac3f671a7084680
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/lib/AST/Interp/ByteCodeExprGen.cpp
    M clang/test/SemaCXX/cxx1z-lambda-star-this.cpp

  Log Message:
  -----------
  [clang][Interp] Handle missing Lambda field initializer


  Commit: 8779cf68e80dcc0b15e8034f39e6ce18b08352b6
      https://github.com/llvm/llvm-project/commit/8779cf68e80dcc0b15e8034f39e6ce18b08352b6
  Author: Oliver Stannard <oliver.stannard at arm.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    A llvm/test/CodeGen/ARM/ldst-opt-lr-restored.ll

  Log Message:
  -----------
  Pre-commit test showing bug #80287

This test shows the bug where LR is used as a general-purpose register
on a code path where it is not spilled to the stack.


  Commit: 749384c08e042739342c88b521c8ba5dac1b9276
      https://github.com/llvm/llvm-project/commit/749384c08e042739342c88b521c8ba5dac1b9276
  Author: ostannard <oliver.stannard at arm.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/lib/Target/ARM/ARMFrameLowering.cpp
    M llvm/lib/Target/ARM/ARMFrameLowering.h
    M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
    M llvm/test/CodeGen/ARM/ldst-opt-lr-restored.ll

  Log Message:
  -----------
  [ARM] Update IsRestored for LR based on all returns (#82745)

PR #75527 fixed ARMFrameLowering to set the IsRestored flag for LR based
on all of the return instructions in the function, not just one.
However, there is also code in ARMLoadStoreOptimizer which changes
return instructions, but it set IsRestored based on the one instruction
it changed, not the whole function.

The fix is to factor out the code added in #75527, and also call it from
ARMLoadStoreOptimizer if it made a change to return instructions.

Fixes #80287.


  Commit: 76dd4bc036f4709f7c28e38e5ae12ade8f07e8c5
      https://github.com/llvm/llvm-project/commit/76dd4bc036f4709f7c28e38e5ae12ade8f07e8c5
  Author: Jeremy Morse <jeremy.morse at sony.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/include/llvm/IR/InstrTypes.h
    M llvm/include/llvm/IR/Instruction.h
    M llvm/include/llvm/IR/Instructions.h
    M llvm/lib/IR/Instruction.cpp
    M llvm/lib/IR/Instructions.cpp

  Log Message:
  -----------
  [RemoveDIs] Add iterator-taking constructors and Create methods (#82778)

Part of removing debug-intrinsics from LLVM requires using iterators
whenever we insert an instruction into a block. That means we need all
instruction constructors and factory functions to have an iterator
taking option, which this patch adds.

The whole of this patch should be NFC: it's adding new flavours of
existing constructors, and plumbing those through to the Instruction
constructor that takes iterators. It's almost entirely boilerplate
copy-and-paste too.


  Commit: f290c000d87bfc72a31b151dffa2d190596ebe91
      https://github.com/llvm/llvm-project/commit/f290c000d87bfc72a31b151dffa2d190596ebe91
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/test/CodeGen/tbaa-struct.cpp

  Log Message:
  -----------
  [TBAA] Add additional bitfield tests.

Additional test for https://github.com/llvm/llvm-project/pull/82922/.


  Commit: 433f8e741e7d4a5b7dad3e078dd847efa6afee5e
      https://github.com/llvm/llvm-project/commit/433f8e741e7d4a5b7dad3e078dd847efa6afee5e
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineSSAUpdater.h
    M llvm/lib/CodeGen/MachineSSAUpdater.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll

  Log Message:
  -----------
  MachineSSAUpdater: use all vreg attributes instead of reg class only (#78431)

When initializing MachineSSAUpdater save all attributes of current
virtual register and create new virtual registers with same attributes.
Now new virtual registers have same both register class or bank and LLT.
Previously new virtual registers had same register class but LLT was not
set (LLT was set to default/empty LLT).
Required by GlobalISel for AMDGPU, new 'lane mask' virtual registers
created by MachineSSAUpdater need to have both register class and LLT.

patch 4 from: https://github.com/llvm/llvm-project/pull/73337


  Commit: 58aa995baf66fffb1284ecb289dc9f02c70de4fa
      https://github.com/llvm/llvm-project/commit/58aa995baf66fffb1284ecb289dc9f02c70de4fa
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/lib/AST/Interp/Interp.h

  Log Message:
  -----------
  [clang][Interp][NFC] Fix comment typo


  Commit: a35599b9ae5e7ad924b78c65f6348e0b711bad5d
      https://github.com/llvm/llvm-project/commit/a35599b9ae5e7ad924b78c65f6348e0b711bad5d
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/lib/AST/Interp/Context.cpp
    M clang/lib/AST/Interp/InterpBuiltin.cpp
    M clang/test/AST/Interp/atomic.c

  Log Message:
  -----------
  [clang][Interp] Implement a few _is_lock_free builtins

Implementation looks similar to the one in the current interpreter.
Except for three static assertions, test/Sema/atomic-ops.c works.


  Commit: 60e7ae3f30e99423cf779c9d05513d2ae18df5aa
      https://github.com/llvm/llvm-project/commit/60e7ae3f30e99423cf779c9d05513d2ae18df5aa
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
    M llvm/lib/Target/AMDGPU/MIMGInstructions.td

  Log Message:
  -----------
  [AMDGPU] Only try DecoderTables for the current subtarget. NFCI. (#82992)

Speed up disassembly by only calling tryDecodeInst for DecoderTables
that make sense for the current subtarget.

This gives a 1.3x speed-up on check-llvm-mc-disassembler-amdgpu in my
Release+Asserts build.


  Commit: 96e536ecf5e6202089ee10ca81c38fbce70851d7
      https://github.com/llvm/llvm-project/commit/96e536ecf5e6202089ee10ca81c38fbce70851d7
  Author: Balazs Benics <benicsbalazs at gmail.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/include/clang/Analysis/FlowSensitive/DataflowValues.h

  Log Message:
  -----------
  [clang][NFC] Prefer usings over typedefs (#82920)


  Commit: c4e94633e8a48ee33115d5d3161ee142fc1c9700
      https://github.com/llvm/llvm-project/commit/c4e94633e8a48ee33115d5d3161ee142fc1c9700
  Author: Samira Bazuzi <bazuzi at google.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h
    M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
    M clang/lib/Analysis/FlowSensitive/Transfer.cpp
    M clang/unittests/Analysis/FlowSensitive/TestingSupport.h
    M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp

  Log Message:
  -----------
  Revert "[clang][dataflow] Correctly handle `InitListExpr` of union type." (#82856)

Reverts llvm/llvm-project#82348, which caused crashes when analyzing
empty InitListExprs for unions, e.g.

```cc
union U {
  double double_value;
  int int_value;
};

void target() {
  U value;
  value = {};
}
```

Co-authored-by: Samira Bazuzi <bazuzi at users.noreply.github.com>


  Commit: d41615e91a108bd1ae41361be97c569691ab9ebb
      https://github.com/llvm/llvm-project/commit/d41615e91a108bd1ae41361be97c569691ab9ebb
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/DSInstructions.td

  Log Message:
  -----------
  [AMDGPU] Rename a DS class template argument. NFC.

The name hasGDS better reflects what it is used for.


  Commit: 9c5ca6b0ce2fc91561708542163fae1db88c59e8
      https://github.com/llvm/llvm-project/commit/9c5ca6b0ce2fc91561708542163fae1db88c59e8
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/lib/Passes/PassBuilderPipelines.cpp
    M llvm/test/Other/new-pm-defaults.ll
    M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
    M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
    M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
    M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
    M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
    M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll

  Log Message:
  -----------
  Revert "Enable JumpTableToSwitch pass by default (#82546)"

This reverts commit 1069823ce7d154aa8ef87ae5a0fd34b527eca2a0.

This has caused second stage timeouts when building Flang on
AArch64:
https://lab.llvm.org/buildbot/#/builders/179/builds/9442


  Commit: 046682ef88a254443e8620bfd48b35bfa0a83809
      https://github.com/llvm/llvm-project/commit/046682ef88a254443e8620bfd48b35bfa0a83809
  Author: Hirofumi Nakamura <k.nakamura.hirofumi at gmail.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/docs/ClangFormatStyleOptions.rst
    M clang/include/clang/Format/Format.h
    M clang/lib/Format/Format.cpp
    M clang/lib/Format/WhitespaceManager.cpp
    M clang/lib/Format/WhitespaceManager.h
    M clang/unittests/Format/FormatTestTableGen.cpp

  Log Message:
  -----------
  [clang-format] Add AlignConsecutiveTableGenCondOperatorColons option. (#82878)

To align colons inside TableGen !cond operators.


  Commit: 440b1743ee0c8bfb7bf0c4b503bde5ab9af88dc0
      https://github.com/llvm/llvm-project/commit/440b1743ee0c8bfb7bf0c4b503bde5ab9af88dc0
  Author: Egor Zhdan <e_zhdan at apple.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/include/clang/Sema/Sema.h
    M clang/lib/Sema/CMakeLists.txt
    A clang/lib/Sema/SemaAPINotes.cpp
    M clang/lib/Sema/SemaDecl.cpp
    M clang/lib/Sema/SemaDeclAttr.cpp
    M clang/lib/Sema/SemaDeclCXX.cpp
    M clang/lib/Sema/SemaDeclObjC.cpp
    M clang/lib/Sema/SemaObjCProperty.cpp
    M clang/lib/Sema/SemaTemplate.cpp

  Log Message:
  -----------
  [APINotes] Upstream Sema logic to apply API Notes to decls

This upstreams more of the Clang API Notes functionality that is
currently implemented in the Apple fork:
https://github.com/apple/llvm-project/tree/next/clang/lib/APINotes

This was extracted from a larger PR:
https://github.com/llvm/llvm-project/pull/73017


  Commit: 285bff39fd283b3a9a27c06525111d8d4f474e6e
      https://github.com/llvm/llvm-project/commit/285bff39fd283b3a9a27c06525111d8d4f474e6e
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M lldb/test/API/functionalities/thread/state/TestThreadStates.py

  Log Message:
  -----------
  [lldb][test][Windows] Skip thread state test on Windows

This actually passes on Windows but I don't know how to convey
that with an xfail without clashing with the xfail for all
platforms.

At least this avoids a UPASS.


  Commit: 8ce81e5924935436d49e0b4e835fa107531505b5
      https://github.com/llvm/llvm-project/commit/8ce81e5924935436d49e0b4e835fa107531505b5
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M lldb/packages/Python/lldbsuite/test/lldbtest.py

  Log Message:
  -----------
  [lldb][test][Windows] Don't assert that module cache is empty

For whatever reason on Windows, it is not at this point.

The copy of unit test we used to use would ignore failures during
teardown but Python's does not.


  Commit: 668cd1ca15a8b9c60a87e5244db9c97b3ba2e624
      https://github.com/llvm/llvm-project/commit/668cd1ca15a8b9c60a87e5244db9c97b3ba2e624
  Author: Erich Keane <ekeane at nvidia.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/include/clang/Sema/Scope.h
    M clang/lib/Sema/SemaStmt.cpp
    M clang/test/SemaOpenACC/no-branch-in-out.c
    A clang/test/SemaOpenACC/no-branch-in-out.cpp

  Log Message:
  -----------
  [OpenACC] Implement 'return' branch-out of Compute Construct (#82814)

Like with 'break'/'continue', returning out of a compute construct is
ill-formed, so this implements the diagnostic. However, unlike the
OpenMP implementation of this same diagnostic, OpenACC doesn't have a
concept of 'capture region', so this is implemented as just checking the
'scope'.


  Commit: 7c52d0c98187b55d2f513122c21daf49d88169a6
      https://github.com/llvm/llvm-project/commit/7c52d0c98187b55d2f513122c21daf49d88169a6
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/test/AST/Interp/atomic.c

  Log Message:
  -----------
  [clang][Interp] Try to atomic.c on Mac

This test was broken on MacOS, see the discussion in
https://github.com/llvm/llvm-project/commit/a35599b9ae5e7ad924b78c65f6348e0b711bad5d


  Commit: ce78dfa4f0470d79979818e322e76050fb082f4e
      https://github.com/llvm/llvm-project/commit/ce78dfa4f0470d79979818e322e76050fb082f4e
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn

  Log Message:
  -----------
  [gn build] Port 28233408a2c8


  Commit: 62e88bc89a718ed557784afb2572e1e664cfd94e
      https://github.com/llvm/llvm-project/commit/62e88bc89a718ed557784afb2572e1e664cfd94e
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn

  Log Message:
  -----------
  [gn build] Port 440b1743ee0c


  Commit: f887fad547c7103c05f33be81fecc03782216ce6
      https://github.com/llvm/llvm-project/commit/f887fad547c7103c05f33be81fecc03782216ce6
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn

  Log Message:
  -----------
  [gn build] Port 8c5e9cf73713


  Commit: ac86a76ed5ac968914dd13fc6b6b76c337728098
      https://github.com/llvm/llvm-project/commit/ac86a76ed5ac968914dd13fc6b6b76c337728098
  Author: Guillaume Chatelet <gchatelet at google.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    R utils/bazel/crash-f7dbdb2b330aad91f520099159e736e91bb9ddbf

  Log Message:
  -----------
  [libc][NFC] Delete unused file (#82980)

Indentified in
https://github.com/llvm/llvm-project/pull/77741#pullrequestreview-1893531270


  Commit: 83feb846482f0100cb29d460d3d8de2690fc32ad
      https://github.com/llvm/llvm-project/commit/83feb846482f0100cb29d460d3d8de2690fc32ad
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/DSInstructions.td

  Log Message:
  -----------
  [AMDGPU] Reduce duplication in DS Real instruction definitions. NFC. (#83007)

For renamed instructions, there is no need to mention the new name twice
on every line defining a Real.


  Commit: 9cfb138eccb83b5876928b08be346fde5ca78b47
      https://github.com/llvm/llvm-project/commit/9cfb138eccb83b5876928b08be346fde5ca78b47
  Author: Krystian Stasiowski <sdkrystian at gmail.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/Sema/SemaTemplate.cpp
    M clang/lib/Sema/SemaTemplateDeduction.cpp
    A clang/test/CXX/except/except.spec/p13.cpp
    M clang/test/SemaTemplate/class-template-noexcept.cpp

  Log Message:
  -----------
  [Clang][Sema] Defer instantiation of exception specification until after partial ordering when determining primary template (#82417)

Consider the following:
```
struct A {
  static constexpr bool x = true;
};

template<typename T, typename U>
void f(T, U) noexcept(T::y); // #1, error: no member named 'y' in 'A'

template<typename T, typename U>
void f(T, U*) noexcept(T::x); // #2

template<>
void f(A, int*) noexcept; // explicit specialization of #2
```

We currently instantiate the exception specification of all candidate
function template specializations when deducting template arguments for
an explicit specialization, which results in a error despite `#1` not
being selected by partial ordering as the most specialized template.
According to [except.spec] p13:
> An exception specification is considered to be needed when: 
> - [...]
> - the exception specification is compared to that of another
declaration (e.g., an explicit specialization or an overriding virtual
function);

Assuming that "comparing declarations" means "determining whether the
declarations correspond and declare the same entity" (per [basic.scope.scope] p4 and
[basic.link] p11.1, respectively), the exception specification does _not_ need to be
instantiated until _after_ partial ordering, at which point we determine
whether the implicitly instantiated specialization and the explicit
specialization declare the same entity (the determination of whether two
functions/function templates correspond does not consider the exception
specifications).

This patch defers the instantiation of the exception specification until
a single function template specialization is selected via partial
ordering, matching the behavior of GCC, EDG, and
MSVC: see https://godbolt.org/z/Ebb6GTcWE.


  Commit: 969d7ecf0b1d51e04e774b0695ffc1d04af81bde
      https://github.com/llvm/llvm-project/commit/969d7ecf0b1d51e04e774b0695ffc1d04af81bde
  Author: Francesco Petrogalli <francesco.petrogalli at apple.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/ValueTypes.td
    M llvm/lib/CodeGen/ValueTypes.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

  Log Message:
  -----------
  [llvm][CodeGen] Add ValueType v3i1. [NFCI] (#82338)


  Commit: 1253e535bd421b955cce1c67ed4304f2ae9bcdfd
      https://github.com/llvm/llvm-project/commit/1253e535bd421b955cce1c67ed4304f2ae9bcdfd
  Author: Jeremy Morse <jeremy.morse at sony.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp

  Log Message:
  -----------
  [RemoveDIs] Use iterators for moving PHIs in loop-unroll-and-jam (#83003)

With no debug intrinsics, correctly identifying the start of a block
with iterators becomes important. We need to use the iterator-returning
methods here in loop-unroll-and-jam where we're shifting PHIs around.
Otherwise they can be inserted after debug-info records, leading to
debug-info attached to PHIs, which is ill formed.

Fixes #83000


  Commit: b5048700fc31f3bf6dd32ace7730815d4cfef411
      https://github.com/llvm/llvm-project/commit/b5048700fc31f3bf6dd32ace7730815d4cfef411
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/lib/AST/Interp/ByteCodeExprGen.cpp
    M clang/test/AST/Interp/c.c

  Log Message:
  -----------
  [clang][Interp] Fix lvalue CompoundLiteralExprs

We need to leave a pointer on the stack for them, even if their
type is primitive.


  Commit: 252f1cdebfffd846afe969d3f6e4684ed39536ad
      https://github.com/llvm/llvm-project/commit/252f1cdebfffd846afe969d3f6e4684ed39536ad
  Author: Jordan Rupprecht <rupprecht at google.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    R lldb/third_party/Python/module/progress/progress.py
    R lldb/third_party/Python/module/unittest2/unittest2/__init__.py
    R lldb/third_party/Python/module/unittest2/unittest2/__main__.py
    R lldb/third_party/Python/module/unittest2/unittest2/case.py
    R lldb/third_party/Python/module/unittest2/unittest2/collector.py
    R lldb/third_party/Python/module/unittest2/unittest2/compatibility.py
    R lldb/third_party/Python/module/unittest2/unittest2/loader.py
    R lldb/third_party/Python/module/unittest2/unittest2/main.py
    R lldb/third_party/Python/module/unittest2/unittest2/result.py
    R lldb/third_party/Python/module/unittest2/unittest2/runner.py
    R lldb/third_party/Python/module/unittest2/unittest2/signals.py
    R lldb/third_party/Python/module/unittest2/unittest2/suite.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/__init__.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/dummy.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/support.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_assertions.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_break.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_case.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_discovery.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_functiontestcase.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_loader.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_new_tests.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_program.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_result.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_runner.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_setups.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_skipping.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_suite.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_unittest2_with.py
    R lldb/third_party/Python/module/unittest2/unittest2/util.py

  Log Message:
  -----------
  [lldb][test] Remove vendored packages `unittest2` and `progress` (#82670)

The `unittest2` package is unused since
5b386158aacac4b41126983a5379d36ed413d0ea.

The `progress` package was only used internally by `unittest2`, so it
can be deleted as well.


  Commit: 264d828ea6399c31c210b67a050fbf084634da6a
      https://github.com/llvm/llvm-project/commit/264d828ea6399c31c210b67a050fbf084634da6a
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/lib/AST/Interp/InterpBuiltin.cpp
    M clang/test/CodeGen/ms-intrinsics-other.c

  Log Message:
  -----------
  [clang][Interp][NFC] Redo returning values from builtin functions

Instead of having retInt/retLong/retSizeT/etc., just add retInteger,
which takes an APSInt and returns it in form of the given QualType.
This makes the code a little neater, but is also necessary since
some builtins have a different return type with -fms-extensions.


  Commit: f54004475110bb0a4033261041594266c8296242
      https://github.com/llvm/llvm-project/commit/f54004475110bb0a4033261041594266c8296242
  Author: mmoadeli <mahmoud.moadeli at codeplay.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/lib/Basic/Targets/AMDGPU.h
    M clang/lib/CodeGen/Targets/NVPTX.cpp
    M clang/test/CodeGenSYCL/address-space-conversions.cpp
    A clang/test/CodeGenSYCL/amd-address-space-conversions.cpp
    A clang/test/CodeGenSYCL/cuda-address-space-conversions.cpp

  Log Message:
  -----------
  [NVPTX][AMDGPU][CodeGen] Fix `local_space nullptr` handling for NVPTX and local/private `nullptr` value for AMDGPU. (#78759)

- Address space cast of nullptr in local_space into a generic_space for
the CUDA backend. The reason for this cast was having invalid local
memory base address for the associated variable.
- In the context of AMD GPU, assigns a NULL value as ~0 for the address
spaces of sycl_local and sycl_private to match the ones for opencl_local
and opencl_private.


  Commit: ebb64d8370f9f425f10c4b084aa62adc2926e2dd
      https://github.com/llvm/llvm-project/commit/ebb64d8370f9f425f10c4b084aa62adc2926e2dd
  Author: Owen Anderson <resistor at mac.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/combine-select.mir
    M llvm/test/CodeGen/AArch64/cmp-chains.ll

  Log Message:
  -----------
  [GlobalISel] Make the Combiner insert G_FREEZE when converting G_SELECT to binary operations. (#82733)

This is needed because the binary operators (G_OR and G_AND) do
not have the poison-suppressing semantics of G_SELECT.

Fixes https://github.com/llvm/llvm-project/issues/72475


  Commit: c27d7085d4d5c640aba4992f5d01c0ffd1da9860
      https://github.com/llvm/llvm-project/commit/c27d7085d4d5c640aba4992f5d01c0ffd1da9860
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/test/CodeGen/ms-intrinsics-other.c

  Log Message:
  -----------
  [clang][test] Undo an accidental test change

This was introduced in 264d828ea6399c31c210b67a050fbf084634da6a.


  Commit: 2730a5c68c6986bc8f01d047f8f31bcfd9316333
      https://github.com/llvm/llvm-project/commit/2730a5c68c6986bc8f01d047f8f31bcfd9316333
  Author: Samira Bazuzi <bazuzi at google.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/lib/Analysis/FlowSensitive/Transfer.cpp
    M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp

  Log Message:
  -----------
  [clang][dataflow] Skip array types when handling InitListExprs. (#83013)

Crashes resulted from single-element InitListExprs for arrays with
elements of a record type after #80970.


  Commit: b2ebd8b89777a1c5ba6acc4ad9f195ea2ad5f0de
      https://github.com/llvm/llvm-project/commit/b2ebd8b89777a1c5ba6acc4ad9f195ea2ad5f0de
  Author: Krasimir Georgiev <krasimir at google.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/unittests/Serialization/ModuleCacheTest.cpp
    M clang/unittests/Serialization/VarDeclConstantInitTest.cpp

  Log Message:
  -----------
  clang serialization unittests: fix some leaks (#82773)

No functional changes intended.

Fixes some leaks found by running under asan with `--gtest_repeat=2`.


  Commit: 82acec15afeb2bcba534a333c89cea33da7ffa47
      https://github.com/llvm/llvm-project/commit/82acec15afeb2bcba534a333c89cea33da7ffa47
  Author: Farzon Lotfi <1802579+farzonl at users.noreply.github.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/include/clang/Basic/Builtins.td
    M clang/include/clang/Sema/Sema.h
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/lib/CodeGen/CodeGenFunction.h
    M clang/lib/Headers/hlsl/hlsl_intrinsics.h
    M clang/lib/Sema/SemaChecking.cpp
    A clang/test/CodeGenHLSL/builtins/dot-builtin.hlsl
    A clang/test/CodeGenHLSL/builtins/dot.hlsl
    A clang/test/SemaHLSL/BuiltIns/dot-errors.hlsl
    M clang/test/SemaHLSL/OverloadResolutionBugs.hlsl
    M llvm/include/llvm/IR/IntrinsicsDirectX.td

  Log Message:
  -----------
  [HLSL] Implementation of dot intrinsic (#81190)

This change implements https://github.com/llvm/llvm-project/issues/70073

HLSL has a dot intrinsic defined here:

https://learn.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-dot

The intrinsic itself is defined as a HLSL_LANG LangBuiltin in
Builtins.td.
This is used to associate all the dot product typdef defined
hlsl_intrinsics.h
with a single intrinsic check in CGBuiltin.cpp & SemaChecking.cpp.

In IntrinsicsDirectX.td we define the llvmIR for the dot product.
A few goals were in mind for this IR. First it should operate on only
vectors. Second the return type should be the vector element type. Third
the second parameter vector should be of the same size as the first
parameter. Finally `a dot b` should be the same as `b dot a`.

In CGBuiltin.cpp hlsl has built on top of existing clang intrinsics via
EmitBuiltinExpr. Dot
product though is language specific intrinsic and so is guarded behind
getLangOpts().HLSL.
The call chain looks like this: EmitBuiltinExpr -> EmitHLSLBuiltinExp

EmitHLSLBuiltinExp dot product intrinsics makes a destinction
between vectors and scalars. This is because HLSL supports dot product
on scalars which simplifies down to multiply.

Sema.h & SemaChecking.cpp saw the addition of
CheckHLSLBuiltinFunctionCall, a language specific semantic validation
that can be expanded for other hlsl specific intrinsics.

Fixes #70073


  Commit: 45732b64542e37f4908ced2477a25b7a0d703893
      https://github.com/llvm/llvm-project/commit/45732b64542e37f4908ced2477a25b7a0d703893
  Author: Matthias Springer <me at m-sp.org>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M mlir/lib/Transforms/Utils/DialectConversion.cpp

  Log Message:
  -----------
  [mlir][Transforms] Fix compile time regression in dialect conversion (#83023)

The dialect conversion does not directly erase ops that are
replaced/erased with a rewriter. Instead, the op stays in place and is
erased at the end if the dialect conversion succeeds. However, ops that
were replaced/erased are ignored from that point on.

#81757 introduced a compile time regression that made the check whether
an op is ignored or not more expensive. Whether an op is ignored or not
is queried many times throughout a dialect conversion, so the check must
be fast.

After this change, replaced ops are stored in the `ignoredOps` set. This
also simplifies the dialect conversion a bit.


  Commit: 1d2eced0067bea989e98efc9265725b3aeca0af9
      https://github.com/llvm/llvm-project/commit/1d2eced0067bea989e98efc9265725b3aeca0af9
  Author: Tom Honermann <tom.honermann at intel.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/docs/GettingStarted.rst

  Log Message:
  -----------
  [llvm][docs] Update the Python version requirement to 3.8.0 for lit testing on Windows with substitute (virtual) drives. (#81663)

Following the changes made for:
- https://reviews.llvm.org/D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations
in commit:
- 05d613ea931b6de1b46dfe04b8e55285359047f4

Python 3.8.0 or newer is now required by at least the following tests
when they are run on Windows from a substitute (virtual) drive. A
substitute drive is often used as a workaround for `MAX_PATH`
limitations on Windows. These tests are impacted because they use the
lit `%{?:real}` path expansion syntax to expand symbolic links and
substitute drives. This path expansion is implemented with Python's
`os.path.realpath()` function which changed behavior in Python 3.8.0
with regard to expansion of substitute drives. The changes mentioned
above rely on the newer Python behavior.
- `clang/test/Lexer/case-insensitive-include-absolute.c`
- `clang/test/Lexer/case-insensitive-include-win.c`

This change updates the LLVM Getting Started guide to note this newer
Python version dependency for this relatively niche case. Python 3.6.0
remains the minimum required Python version otherwise.


  Commit: 4bc3b3501ff994fb3504ed2b973342821a9c8cea
      https://github.com/llvm/llvm-project/commit/4bc3b3501ff994fb3504ed2b973342821a9c8cea
  Author: Arthur Eubanks <aeubanks at google.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    A lld/docs/ELF/large_section_layout_nopic.png
    A lld/docs/ELF/large_section_layout_pic.png
    A lld/docs/ELF/large_sections.rst
    A lld/docs/ELF/section_layout.png
    M lld/docs/index.rst

  Log Message:
  -----------
  [lld/ELF] Add documentation on large sections (#82560)

Fixes #82438


  Commit: f70d5c0bc822f8932e8aadfbed7fe9c6cd8c3758
      https://github.com/llvm/llvm-project/commit/f70d5c0bc822f8932e8aadfbed7fe9c6cd8c3758
  Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M libc/config/linux/x86_64/entrypoints.txt
    M libc/docs/stdbit.rst
    M libc/include/llvm-libc-macros/stdbit-macros.h
    M libc/spec/stdc.td
    M libc/src/stdbit/CMakeLists.txt
    A libc/src/stdbit/stdc_count_zeros_uc.cpp
    A libc/src/stdbit/stdc_count_zeros_uc.h
    A libc/src/stdbit/stdc_count_zeros_ui.cpp
    A libc/src/stdbit/stdc_count_zeros_ui.h
    A libc/src/stdbit/stdc_count_zeros_ul.cpp
    A libc/src/stdbit/stdc_count_zeros_ul.h
    A libc/src/stdbit/stdc_count_zeros_ull.cpp
    A libc/src/stdbit/stdc_count_zeros_ull.h
    A libc/src/stdbit/stdc_count_zeros_us.cpp
    A libc/src/stdbit/stdc_count_zeros_us.h
    M libc/test/include/stdbit_test.cpp
    M libc/test/src/stdbit/CMakeLists.txt
    A libc/test/src/stdbit/stdc_count_zeros_uc_test.cpp
    A libc/test/src/stdbit/stdc_count_zeros_ui_test.cpp
    A libc/test/src/stdbit/stdc_count_zeros_ul_test.cpp
    A libc/test/src/stdbit/stdc_count_zeros_ull_test.cpp
    A libc/test/src/stdbit/stdc_count_zeros_us_test.cpp

  Log Message:
  -----------
  [libc][stdbit] implement stdc_count_zeros (C23) (#82437)


  Commit: 78275ef0a33a808d30285603585300ce57d7ef26
      https://github.com/llvm/llvm-project/commit/78275ef0a33a808d30285603585300ce57d7ef26
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/lib/AST/Interp/InterpBuiltin.cpp

  Log Message:
  -----------
  [clang][Interp] Pick the right APInt constructor on Windows

The second parameter needs to be a uint64_t and nothing else.
This broke windows builders, see
https://github.com/llvm/llvm-project/commit/264d828ea6399c31c210b67a050fbf084634da6a


  Commit: be024307075c37f057fd51d4de0e9c2443b51686
      https://github.com/llvm/llvm-project/commit/be024307075c37f057fd51d4de0e9c2443b51686
  Author: Haojian Wu <hokein.wu at gmail.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/include/clang/Analysis/Analyses/ThreadSafetyCommon.h
    M clang/lib/Analysis/ThreadSafetyCommon.cpp

  Log Message:
  -----------
  Thread safety analysis: provide printSCFG definition. (#80277)

I called this function when investigating the issue
(https://github.com/llvm/llvm-project/issues/78131), and I was surprised
to see the definition is commented out.

I think it makes sense to provide the definition even though the
implementation is not stable.


  Commit: d8406d48a8c94f88613e5613a7e0d6526a520428
      https://github.com/llvm/llvm-project/commit/d8406d48a8c94f88613e5613a7e0d6526a520428
  Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M libc/config/linux/x86_64/entrypoints.txt
    M libc/docs/stdbit.rst
    M libc/include/llvm-libc-macros/stdbit-macros.h
    M libc/spec/stdc.td
    M libc/src/stdbit/CMakeLists.txt
    A libc/src/stdbit/stdc_count_ones_uc.cpp
    A libc/src/stdbit/stdc_count_ones_uc.h
    A libc/src/stdbit/stdc_count_ones_ui.cpp
    A libc/src/stdbit/stdc_count_ones_ui.h
    A libc/src/stdbit/stdc_count_ones_ul.cpp
    A libc/src/stdbit/stdc_count_ones_ul.h
    A libc/src/stdbit/stdc_count_ones_ull.cpp
    A libc/src/stdbit/stdc_count_ones_ull.h
    A libc/src/stdbit/stdc_count_ones_us.cpp
    A libc/src/stdbit/stdc_count_ones_us.h
    M libc/test/include/stdbit_test.cpp
    M libc/test/src/stdbit/CMakeLists.txt
    A libc/test/src/stdbit/stdc_count_ones_uc_test.cpp
    A libc/test/src/stdbit/stdc_count_ones_ui_test.cpp
    A libc/test/src/stdbit/stdc_count_ones_ul_test.cpp
    A libc/test/src/stdbit/stdc_count_ones_ull_test.cpp
    A libc/test/src/stdbit/stdc_count_ones_us_test.cpp

  Log Message:
  -----------
  [libc][stdbit] implement stdc_count_ones (C23) (#82444)


  Commit: e2d80a3d025875766ac879d3d0c480cd03994d35
      https://github.com/llvm/llvm-project/commit/e2d80a3d025875766ac879d3d0c480cd03994d35
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M flang/lib/Lower/ConvertVariable.cpp
    A flang/test/Lower/CUDA/cuda-mod.cuf
    A flang/test/Lower/CUDA/cuda-module-use.cuf

  Log Message:
  -----------
  [flang][cuda] Make sure CUDA attribute are imported when using module variable (#82844)

CUDA attribute are correctly propagated to the module file but were not
imported currently so they did not appear on the hlfir.declare and
fir.global operations for module variables.


  Commit: 695b630ae16a1b243d9c72cc275b00cf0c8af2df
      https://github.com/llvm/llvm-project/commit/695b630ae16a1b243d9c72cc275b00cf0c8af2df
  Author: Jan Svoboda <jan_svoboda at apple.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M llvm/include/llvm/LTO/LTO.h
    M llvm/lib/LTO/LTO.cpp
    M llvm/lib/LTO/LTOCodeGenerator.cpp
    M llvm/lib/LTO/ThinLTOCodeGenerator.cpp

  Log Message:
  -----------
  [ThinLTO] NFC: Merge duplicated functions together (#82421)


  Commit: b876596a76cdc183439b36455d26883b67f8ee51
      https://github.com/llvm/llvm-project/commit/b876596a76cdc183439b36455d26883b67f8ee51
  Author: Fangrui Song <i at maskray.me>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M clang/lib/Driver/ToolChain.cpp
    A clang/test/Driver/Inputs/resource_dir/lib/aarch64-unknown-linux/libclang_rt.hwasan.a
    A clang/test/Driver/Inputs/resource_dir/lib/aarch64-unknown-linux/libclang_rt.hwasan.a.syms
    A clang/test/Driver/Inputs/resource_dir/lib/i386-unknown-linux/libclang_rt.asan.a
    A clang/test/Driver/Inputs/resource_dir/lib/i386-unknown-linux/libclang_rt.asan.a.syms
    A clang/test/Driver/Inputs/resource_dir/lib/i686-unknown-linux/clang_rt.crtbegin.o
    A clang/test/Driver/Inputs/resource_dir/lib/i686-unknown-linux/clang_rt.crtend.o
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.asan-i386.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.asan-x86_64.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.hwasan-aarch64.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.hwasan-x86_64.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.msan-x86_64.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.msan_cxx-x86_64.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.tsan-x86_64.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.tsan_cxx-x86_64.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.ubsan-i386.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.ubsan-x86_64.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.ubsan_cxx-i386.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.ubsan_cxx-x86_64.a.syms
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/clang_rt.crtbegin.o
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/clang_rt.crtend.o
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.asan.a
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.asan.a.syms
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.hwasan.a
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.hwasan.a.syms
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.msan.a
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.msan.a.syms
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.msan_cxx.a
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.msan_cxx.a.syms
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.tsan.a
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.tsan.a.syms
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.tsan_cxx.a
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.tsan_cxx.a.syms
    M clang/test/Driver/arch-specific-libdir.c
    M clang/test/Driver/arm-compiler-rt.c
    M clang/test/Driver/baremetal-sysroot.cpp
    M clang/test/Driver/baremetal.cpp
    M clang/test/Driver/compiler-rt-unwind.c
    M clang/test/Driver/coverage-ld.c
    M clang/test/Driver/fuchsia.c
    M clang/test/Driver/instrprof-ld.c
    M clang/test/Driver/linux-ld.c
    M clang/test/Driver/print-libgcc-file-name-clangrt.c
    M clang/test/Driver/sanitizer-ld.c

  Log Message:
  -----------
  [Driver] Improve error when a compiler-rt library is not found (#81037)

BSD, Linux, and z/OS enable `LLVM_ENABLE_PER_TARGET_RUNTIME_DIR` by
default.
When a compiler-rt library is not found, we currently report an
incorrect filename `libclang_rt.XXX-$arch.a`
```
% /tmp/Debug/bin/clang++ a.cc -fsanitize=address -o a
ld.lld: error: cannot open /tmp/Debug/lib/clang/19/lib/linux/libclang_rt.asan-x86_64.a: No such file or directory
clang++: error: linker command failed with exit code 1 (use -v to see invocation)
```

With this change, we will correctly report:
```
% /tmp/Debug/bin/clang++ a.cc -fsanitize=address -o a
ld.lld: error: cannot open /tmp/Debug/lib/clang/19/lib/x86_64-unknown-linux-gnu/libclang_rt.asan.a: No such file or directory
clang++: error: linker command failed with exit code 1 (use -v to see invocation)
```

Link: https://discourse.llvm.org/t/runtime-directory-fallback/76860


  Commit: f9f331652d4f0aff9ece3570abe8c686cdfefff4
      https://github.com/llvm/llvm-project/commit/f9f331652d4f0aff9ece3570abe8c686cdfefff4
  Author: Adrian Prantl <aprantl at apple.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M lldb/include/lldb/Utility/ArchSpec.h
    M lldb/source/Target/Target.cpp
    M lldb/source/Utility/ArchSpec.cpp
    A lldb/test/API/macosx/arm64e-attach/Makefile
    A lldb/test/API/macosx/arm64e-attach/TestArm64eAttach.py
    A lldb/test/API/macosx/arm64e-attach/main.c

  Log Message:
  -----------
  Replace ArchSpec::PiecewiseCompare() with Triple::operator==()

Looking ast the definition of both functions this is *almost* an NFC
change, except that Triple also looks at the SubArch (important) and
ObjectFormat (less so).

This fixes a bug that only manifests with how Xcode uses the SBAPI to
attach to a process by name: it guesses the architecture based on the
system. If the system is arm64 and the Process is arm64e Target fails
to update the triple because it deemed the two to be equivalent.

rdar://123338218


  Commit: 01450dd1c69d1edb0d01159352a56c99988839f4
      https://github.com/llvm/llvm-project/commit/01450dd1c69d1edb0d01159352a56c99988839f4
  Author: Adrian Prantl <aprantl at apple.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M lldb/source/Target/Target.cpp
    M lldb/test/API/macosx/arm64e-attach/Makefile
    M lldb/test/API/macosx/arm64e-attach/TestArm64eAttach.py
    M lldb/tools/debugserver/source/DNB.cpp
    M lldb/tools/debugserver/source/DNB.h
    M lldb/tools/debugserver/source/MacOSX/MachProcess.h
    M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
    M lldb/tools/debugserver/source/RNBRemote.cpp

  Log Message:
  -----------
  Change debugserver to report the cpu(sub)type of process, not the host.

This way debugserver can correctly report qProcessInfo for arm64
processes on arm64e-capable hosts.

Patch implemented with help from Jason Molenda!


  Commit: e038070d4605e83b59b75fc299bbacebe17edd2f
      https://github.com/llvm/llvm-project/commit/e038070d4605e83b59b75fc299bbacebe17edd2f
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2024-02-26 (Mon, 26 Feb 2024)

  Changed paths:
    M .github/new-prs-labeler.yml
    M bolt/include/bolt/Core/DIEBuilder.h
    M bolt/include/bolt/Core/DebugData.h
    M bolt/lib/Core/DIEBuilder.cpp
    M bolt/lib/Core/DebugData.cpp
    M bolt/lib/Rewrite/DWARFRewriter.cpp
    M clang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.cpp
    M clang-tools-extra/clang-tidy/tool/run-clang-tidy.py
    M clang-tools-extra/clang-tidy/utils/DeclRefExprUtils.cpp
    M clang-tools-extra/clang-tidy/utils/DeclRefExprUtils.h
    M clang-tools-extra/clangd/refactor/Rename.cpp
    M clang-tools-extra/clangd/unittests/ClangdLSPServerTests.cpp
    M clang-tools-extra/clangd/unittests/RenameTests.cpp
    M clang-tools-extra/docs/ReleaseNotes.rst
    M clang-tools-extra/include-cleaner/lib/WalkAST.cpp
    M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
    M clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-copy-initialization.cpp
    M clang-tools-extra/unittests/clang-tidy/DeclRefExprUtilsTest.cpp
    M clang/docs/ClangFormatStyleOptions.rst
    A clang/docs/HLSL/ExpectedDifferences.rst
    M clang/docs/HLSL/HLSLDocs.rst
    M clang/docs/ReleaseNotes.rst
    M clang/docs/StandardCPlusPlusModules.rst
    M clang/docs/UndefinedBehaviorSanitizer.rst
    M clang/docs/analyzer/checkers.rst
    M clang/include/clang/Analysis/Analyses/ThreadSafetyCommon.h
    M clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h
    M clang/include/clang/Analysis/FlowSensitive/DataflowValues.h
    M clang/include/clang/Basic/Builtins.td
    M clang/include/clang/Basic/DiagnosticFrontendKinds.td
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/include/clang/Basic/DiagnosticSerializationKinds.td
    M clang/include/clang/Basic/arm_sme.td
    M clang/include/clang/Driver/ToolChain.h
    M clang/include/clang/Format/Format.h
    M clang/include/clang/Frontend/ASTUnit.h
    M clang/include/clang/Frontend/CompilerInstance.h
    M clang/include/clang/Frontend/CompilerInvocation.h
    M clang/include/clang/InstallAPI/Context.h
    M clang/include/clang/InstallAPI/HeaderFile.h
    M clang/include/clang/Sema/Scope.h
    M clang/include/clang/Sema/Sema.h
    M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SValBuilder.h
    M clang/include/clang/Tooling/DependencyScanning/DependencyScanningService.h
    M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
    M clang/lib/AST/CMakeLists.txt
    M clang/lib/AST/Interp/ByteCodeExprGen.cpp
    M clang/lib/AST/Interp/Context.cpp
    M clang/lib/AST/Interp/Descriptor.h
    M clang/lib/AST/Interp/Disasm.cpp
    M clang/lib/AST/Interp/Function.h
    M clang/lib/AST/Interp/FunctionPointer.h
    M clang/lib/AST/Interp/Interp.cpp
    M clang/lib/AST/Interp/Interp.h
    M clang/lib/AST/Interp/InterpBuiltin.cpp
    A clang/lib/AST/Interp/InterpShared.cpp
    A clang/lib/AST/Interp/InterpShared.h
    M clang/lib/AST/Interp/Opcodes.td
    M clang/lib/AST/Interp/Program.cpp
    M clang/lib/AST/Interp/Program.h
    M clang/lib/Analysis/FlowSensitive/ControlFlowContext.cpp
    M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
    M clang/lib/Analysis/FlowSensitive/Transfer.cpp
    M clang/lib/Analysis/ThreadSafetyCommon.cpp
    M clang/lib/Basic/Targets/AArch64.cpp
    M clang/lib/Basic/Targets/AArch64.h
    M clang/lib/Basic/Targets/AMDGPU.h
    M clang/lib/Basic/Targets/PPC.cpp
    M clang/lib/Basic/Targets/PPC.h
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/lib/CodeGen/CGCUDANV.cpp
    M clang/lib/CodeGen/CGExprScalar.cpp
    M clang/lib/CodeGen/CGRecordLayoutBuilder.cpp
    M clang/lib/CodeGen/CodeGenFunction.h
    M clang/lib/CodeGen/CodeGenModule.cpp
    M clang/lib/CodeGen/CodeGenPGO.cpp
    M clang/lib/CodeGen/CodeGenPGO.h
    M clang/lib/CodeGen/CoverageMappingGen.cpp
    M clang/lib/CodeGen/MCDCState.h
    M clang/lib/CodeGen/Targets/AArch64.cpp
    M clang/lib/CodeGen/Targets/NVPTX.cpp
    M clang/lib/Driver/OffloadBundler.cpp
    M clang/lib/Driver/ToolChain.cpp
    M clang/lib/Driver/ToolChains/AMDGPU.cpp
    M clang/lib/Driver/ToolChains/Arch/ARM.cpp
    M clang/lib/Driver/ToolChains/Clang.cpp
    M clang/lib/Driver/ToolChains/CommonArgs.cpp
    M clang/lib/Driver/ToolChains/Cuda.cpp
    M clang/lib/Driver/ToolChains/HIPUtility.cpp
    M clang/lib/Driver/ToolChains/RISCVToolchain.cpp
    M clang/lib/Driver/ToolChains/RISCVToolchain.h
    M clang/lib/Format/Format.cpp
    M clang/lib/Format/FormatToken.cpp
    M clang/lib/Format/MacroCallReconstructor.cpp
    M clang/lib/Format/Macros.h
    M clang/lib/Format/TokenAnnotator.cpp
    M clang/lib/Format/UnwrappedLineFormatter.cpp
    M clang/lib/Format/UnwrappedLineParser.cpp
    M clang/lib/Format/UnwrappedLineParser.h
    M clang/lib/Format/WhitespaceManager.cpp
    M clang/lib/Format/WhitespaceManager.h
    M clang/lib/Frontend/ASTUnit.cpp
    M clang/lib/Frontend/FrontendAction.cpp
    M clang/lib/Headers/arm_acle.h
    M clang/lib/Headers/cpuid.h
    M clang/lib/Headers/hlsl/hlsl_intrinsics.h
    M clang/lib/Parse/ParseExprCXX.cpp
    M clang/lib/Parse/ParseOpenACC.cpp
    M clang/lib/Sema/CMakeLists.txt
    M clang/lib/Sema/Scope.cpp
    A clang/lib/Sema/SemaAPINotes.cpp
    M clang/lib/Sema/SemaChecking.cpp
    M clang/lib/Sema/SemaDecl.cpp
    M clang/lib/Sema/SemaDeclAttr.cpp
    M clang/lib/Sema/SemaDeclCXX.cpp
    M clang/lib/Sema/SemaDeclObjC.cpp
    M clang/lib/Sema/SemaObjCProperty.cpp
    M clang/lib/Sema/SemaStmt.cpp
    M clang/lib/Sema/SemaTemplate.cpp
    M clang/lib/Sema/SemaTemplateDeduction.cpp
    M clang/lib/StaticAnalyzer/Checkers/ArrayBoundCheckerV2.cpp
    M clang/lib/StaticAnalyzer/Checkers/ErrnoChecker.cpp
    M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
    M clang/lib/StaticAnalyzer/Checkers/TaggedUnionModeling.h
    M clang/lib/StaticAnalyzer/Checkers/VLASizeChecker.cpp
    M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
    M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
    M clang/test/AST/Interp/atomic.c
    M clang/test/AST/Interp/c.c
    M clang/test/AST/Interp/complex.cpp
    M clang/test/AST/Interp/functions.cpp
    A clang/test/AST/Interp/nullable.cpp
    M clang/test/AST/ast-dump-using.cpp
    M clang/test/Analysis/out-of-bounds.c
    A clang/test/Analysis/stream-invalidate.c
    M clang/test/Analysis/taint-diagnostic-visitor.c
    M clang/test/Analysis/taint-generic.c
    M clang/test/CMakeLists.txt
    M clang/test/CXX/drs/dr27xx.cpp
    A clang/test/CXX/except/except.spec/p13.cpp
    A clang/test/ClangScanDeps/optimize-canonicalize-macros.m
    M clang/test/ClangScanDeps/optimize-vfs-pch.m
    A clang/test/CodeGen/aarch64-cpu-supports-target.c
    A clang/test/CodeGen/aarch64-cpu-supports.c
    A clang/test/CodeGen/aarch64-sme-inline-streaming-attrs.c
    M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_funs.c
    A clang/test/CodeGen/aix-builtin-cpu-is.c
    M clang/test/CodeGen/integer-overflow.c
    M clang/test/CodeGen/target-builtin-noerror.c
    M clang/test/CodeGen/tbaa-struct.cpp
    M clang/test/CodeGenCUDA/device-stub.cu
    M clang/test/CodeGenCUDA/host-used-device-var.cu
    A clang/test/CodeGenHLSL/builtins/dot-builtin.hlsl
    A clang/test/CodeGenHLSL/builtins/dot.hlsl
    M clang/test/CodeGenSYCL/address-space-conversions.cpp
    A clang/test/CodeGenSYCL/amd-address-space-conversions.cpp
    A clang/test/CodeGenSYCL/cuda-address-space-conversions.cpp
    A clang/test/Driver/Inputs/hip.h
    A clang/test/Driver/Inputs/resource_dir/lib/aarch64-unknown-linux/libclang_rt.hwasan.a
    A clang/test/Driver/Inputs/resource_dir/lib/aarch64-unknown-linux/libclang_rt.hwasan.a.syms
    A clang/test/Driver/Inputs/resource_dir/lib/i386-unknown-linux/libclang_rt.asan.a
    A clang/test/Driver/Inputs/resource_dir/lib/i386-unknown-linux/libclang_rt.asan.a.syms
    A clang/test/Driver/Inputs/resource_dir/lib/i686-unknown-linux/clang_rt.crtbegin.o
    A clang/test/Driver/Inputs/resource_dir/lib/i686-unknown-linux/clang_rt.crtend.o
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.asan-i386.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.asan-x86_64.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.hwasan-aarch64.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.hwasan-x86_64.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.msan-x86_64.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.msan_cxx-x86_64.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.tsan-x86_64.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.tsan_cxx-x86_64.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.ubsan-i386.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.ubsan-x86_64.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.ubsan_cxx-i386.a.syms
    R clang/test/Driver/Inputs/resource_dir/lib/linux/libclang_rt.ubsan_cxx-x86_64.a.syms
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/clang_rt.crtbegin.o
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/clang_rt.crtend.o
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.asan.a
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.asan.a.syms
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.hwasan.a
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.hwasan.a.syms
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.msan.a
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.msan.a.syms
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.msan_cxx.a
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.msan_cxx.a.syms
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.tsan.a
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.tsan.a.syms
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.tsan_cxx.a
    A clang/test/Driver/Inputs/resource_dir/lib/x86_64-unknown-linux/libclang_rt.tsan_cxx.a.syms
    M clang/test/Driver/arch-specific-libdir.c
    M clang/test/Driver/arm-alignment.c
    M clang/test/Driver/arm-compiler-rt.c
    M clang/test/Driver/baremetal-sysroot.cpp
    M clang/test/Driver/baremetal.cpp
    M clang/test/Driver/clang-offload-bundler.c
    M clang/test/Driver/compiler-rt-unwind.c
    M clang/test/Driver/coverage-ld.c
    M clang/test/Driver/cuda-cross-compiling.c
    M clang/test/Driver/fuchsia.c
    M clang/test/Driver/gpu-libc-headers.c
    A clang/test/Driver/hip-partial-link.hip
    M clang/test/Driver/hip-toolchain-rdc.hip
    M clang/test/Driver/instrprof-ld.c
    M clang/test/Driver/linker-wrapper.c
    M clang/test/Driver/linux-ld.c
    M clang/test/Driver/openmp-offload-gpu.c
    M clang/test/Driver/print-libgcc-file-name-clangrt.c
    M clang/test/Driver/print-multi-selection-flags.c
    M clang/test/Driver/riscv-features.c
    M clang/test/Driver/sanitizer-ld.c
    A clang/test/InstallAPI/basic.test
    A clang/test/InstallAPI/driver-invalid-options.test
    R clang/test/InstallAPI/installapi-basic.test
    R clang/test/InstallAPI/installapi-driver-invalid-options.test
    A clang/test/Modules/compile-pcm-with-pic.cppm
    M clang/test/Parser/cxx-concepts-requires-clause.cpp
    M clang/test/Preprocessor/has_builtin_cpuid.c
    M clang/test/Profile/c-mcdc-class.cpp
    M clang/test/Profile/c-mcdc-logicalop-ternary.c
    M clang/test/Profile/c-mcdc-nested-ternary.c
    M clang/test/Profile/c-mcdc-not.c
    M clang/test/Profile/c-mcdc.c
    A clang/test/Sema/aarch64-cpu-supports.c
    A clang/test/Sema/aarch64-sme-intrinsics/acle_sme_zero.c
    A clang/test/Sema/aix-builtin-cpu-unsupports.c
    M clang/test/Sema/attr-nonnull.c
    M clang/test/Sema/builtin-cpu-supports.c
    M clang/test/SemaCXX/PR20334-std_initializer_list_diagnosis_assertion.cpp
    M clang/test/SemaCXX/PR68542.cpp
    M clang/test/SemaCXX/attr-nonnull.cpp
    M clang/test/SemaCXX/compare-modules-cxx2a.cpp
    M clang/test/SemaCXX/cxx1z-lambda-star-this.cpp
    M clang/test/SemaCXX/cxx2a-ms-no-unique-address.cpp
    M clang/test/SemaCXX/type-traits.cpp
    A clang/test/SemaHLSL/BuiltIns/dot-errors.hlsl
    M clang/test/SemaHLSL/OverloadResolutionBugs.hlsl
    A clang/test/SemaOpenACC/no-branch-in-out.c
    A clang/test/SemaOpenACC/no-branch-in-out.cpp
    M clang/test/SemaTemplate/class-template-noexcept.cpp
    M clang/tools/c-index-test/core_main.cpp
    M clang/tools/clang-installapi/Options.cpp
    M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
    M clang/tools/clang-scan-deps/ClangScanDeps.cpp
    M clang/tools/libclang/CIndex.cpp
    M clang/unittests/Analysis/FlowSensitive/TestingSupport.h
    M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
    M clang/unittests/Analysis/FlowSensitive/TypeErasedDataflowAnalysisTest.cpp
    M clang/unittests/Format/FormatTest.cpp
    M clang/unittests/Format/FormatTestMacroExpansion.cpp
    M clang/unittests/Format/FormatTestTableGen.cpp
    M clang/unittests/Format/MacroCallReconstructorTest.cpp
    M clang/unittests/Serialization/ModuleCacheTest.cpp
    M clang/unittests/Serialization/VarDeclConstantInitTest.cpp
    M clang/utils/TableGen/SveEmitter.cpp
    M clang/www/cxx_dr_status.html
    M compiler-rt/include/profile/InstrProfData.inc
    M compiler-rt/lib/builtins/cpu_model/x86.c
    M compiler-rt/lib/builtins/divtc3.c
    M compiler-rt/lib/builtins/fp_lib.h
    M compiler-rt/lib/builtins/int_types.h
    M compiler-rt/lib/builtins/multc3.c
    M compiler-rt/lib/hwasan/hwasan.cpp
    M compiler-rt/lib/sanitizer_common/sanitizer_fuchsia.cpp
    M compiler-rt/lib/sanitizer_common/sanitizer_getauxval.h
    M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
    M compiler-rt/lib/scudo/standalone/combined.h
    A compiler-rt/test/builtins/Unit/aarch64_cpu_features_test.c
    M compiler-rt/test/builtins/Unit/cpu_model_test.c
    M flang/lib/Evaluate/fold-integer.cpp
    M flang/lib/Frontend/FrontendActions.cpp
    M flang/lib/Lower/ConvertVariable.cpp
    M flang/lib/Semantics/check-declarations.cpp
    M flang/lib/Semantics/definable.cpp
    M flang/lib/Semantics/resolve-directives.cpp
    M flang/lib/Semantics/resolve-names.cpp
    M flang/test/Driver/omp-driver-offload.f90
    M flang/test/Lower/CUDA/cuda-data-attribute.cuf
    A flang/test/Lower/CUDA/cuda-mod.cuf
    A flang/test/Lower/CUDA/cuda-module-use.cuf
    M flang/test/Semantics/OpenMP/device-constructs.f90
    A flang/test/Semantics/OpenMP/struct.f90
    M flang/test/Semantics/cuf03.cuf
    M flang/test/Semantics/namelist01.f90
    M flang/tools/bbc/bbc.cpp
    M libc/AOR_v20.02/string/arm/memchr.S
    M libc/CMakeLists.txt
    M libc/benchmarks/automemcpy/README.md
    M libc/cmake/modules/CheckCompilerFeatures.cmake
    M libc/cmake/modules/LLVMLibCArchitectures.cmake
    M libc/cmake/modules/LLVMLibCCheckMPFR.cmake
    M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
    M libc/cmake/modules/LLVMLibCHeaderRules.cmake
    M libc/cmake/modules/LLVMLibCLibraryRules.cmake
    M libc/cmake/modules/LLVMLibCObjectRules.cmake
    M libc/cmake/modules/LLVMLibCTestRules.cmake
    M libc/cmake/modules/prepare_libc_gpu_build.cmake
    M libc/config/darwin/x86_64/entrypoints.txt
    M libc/config/linux/x86_64/entrypoints.txt
    M libc/config/linux/x86_64/exclude.txt
    M libc/config/windows/entrypoints.txt
    M libc/docs/contributing.rst
    M libc/docs/date_and_time.rst
    M libc/docs/dev/clang_tidy_checks.rst
    M libc/docs/dev/config_options.rst
    M libc/docs/dev/printf_behavior.rst
    M libc/docs/full_cross_build.rst
    M libc/docs/gpu/motivation.rst
    M libc/docs/gpu/rpc.rst
    M libc/docs/gpu/testing.rst
    M libc/docs/gpu/using.rst
    M libc/docs/libc_search.rst
    M libc/docs/math/index.rst
    M libc/docs/math/log.rst
    M libc/docs/porting.rst
    M libc/docs/stdbit.rst
    M libc/docs/stdio.rst
    M libc/docs/strings.rst
    M libc/include/CMakeLists.txt
    M libc/include/fcntl.h.def
    M libc/include/llvm-libc-macros/stdbit-macros.h
    M libc/include/llvm-libc-macros/sys-queue-macros.h
    M libc/include/sched.h.def
    M libc/include/spawn.h.def
    M libc/lib/CMakeLists.txt
    M libc/spec/bsd_ext.td
    M libc/spec/gnu_ext.td
    M libc/spec/llvm_libc_ext.td
    M libc/spec/posix.td
    M libc/spec/stdc.td
    M libc/src/__support/File/CMakeLists.txt
    M libc/src/__support/GPU/CMakeLists.txt
    M libc/src/__support/HashTable/CMakeLists.txt
    M libc/src/__support/OSUtil/CMakeLists.txt
    M libc/src/__support/RPC/CMakeLists.txt
    M libc/src/__support/fixed_point/CMakeLists.txt
    M libc/src/__support/fixed_point/fx_bits.h
    M libc/src/math/CMakeLists.txt
    M libc/src/math/generic/CMakeLists.txt
    M libc/src/math/gpu/vendor/CMakeLists.txt
    M libc/src/search/hsearch/CMakeLists.txt
    M libc/src/stdbit/CMakeLists.txt
    A libc/src/stdbit/stdc_count_ones_uc.cpp
    A libc/src/stdbit/stdc_count_ones_uc.h
    A libc/src/stdbit/stdc_count_ones_ui.cpp
    A libc/src/stdbit/stdc_count_ones_ui.h
    A libc/src/stdbit/stdc_count_ones_ul.cpp
    A libc/src/stdbit/stdc_count_ones_ul.h
    A libc/src/stdbit/stdc_count_ones_ull.cpp
    A libc/src/stdbit/stdc_count_ones_ull.h
    A libc/src/stdbit/stdc_count_ones_us.cpp
    A libc/src/stdbit/stdc_count_ones_us.h
    A libc/src/stdbit/stdc_count_zeros_uc.cpp
    A libc/src/stdbit/stdc_count_zeros_uc.h
    A libc/src/stdbit/stdc_count_zeros_ui.cpp
    A libc/src/stdbit/stdc_count_zeros_ui.h
    A libc/src/stdbit/stdc_count_zeros_ul.cpp
    A libc/src/stdbit/stdc_count_zeros_ul.h
    A libc/src/stdbit/stdc_count_zeros_ull.cpp
    A libc/src/stdbit/stdc_count_zeros_ull.h
    A libc/src/stdbit/stdc_count_zeros_us.cpp
    A libc/src/stdbit/stdc_count_zeros_us.h
    M libc/src/stdio/CMakeLists.txt
    M libc/src/stdio/printf_core/CMakeLists.txt
    M libc/src/stdio/scanf_core/CMakeLists.txt
    M libc/src/stdlib/CMakeLists.txt
    M libc/src/stdlib/atexit.cpp
    M libc/src/string/CMakeLists.txt
    M libc/src/wchar/CMakeLists.txt
    M libc/startup/gpu/CMakeLists.txt
    M libc/startup/gpu/amdgpu/CMakeLists.txt
    M libc/startup/gpu/amdgpu/start.cpp
    M libc/startup/gpu/nvptx/CMakeLists.txt
    M libc/startup/linux/CMakeLists.txt
    M libc/test/CMakeLists.txt
    M libc/test/IntegrationTest/CMakeLists.txt
    M libc/test/UnitTest/CMakeLists.txt
    M libc/test/include/stdbit_test.cpp
    M libc/test/integration/scudo/CMakeLists.txt
    M libc/test/src/__support/CMakeLists.txt
    M libc/test/src/__support/CPP/CMakeLists.txt
    M libc/test/src/__support/FPUtil/fpbits_test.cpp
    M libc/test/src/__support/File/CMakeLists.txt
    A libc/test/src/__support/fixed_point/CMakeLists.txt
    A libc/test/src/__support/fixed_point/fx_bits_test.cpp
    M libc/test/src/errno/CMakeLists.txt
    M libc/test/src/fenv/CMakeLists.txt
    M libc/test/src/math/CMakeLists.txt
    M libc/test/src/math/differential_testing/CMakeLists.txt
    M libc/test/src/math/smoke/CMakeLists.txt
    M libc/test/src/stdbit/CMakeLists.txt
    A libc/test/src/stdbit/stdc_count_ones_uc_test.cpp
    A libc/test/src/stdbit/stdc_count_ones_ui_test.cpp
    A libc/test/src/stdbit/stdc_count_ones_ul_test.cpp
    A libc/test/src/stdbit/stdc_count_ones_ull_test.cpp
    A libc/test/src/stdbit/stdc_count_ones_us_test.cpp
    A libc/test/src/stdbit/stdc_count_zeros_uc_test.cpp
    A libc/test/src/stdbit/stdc_count_zeros_ui_test.cpp
    A libc/test/src/stdbit/stdc_count_zeros_ul_test.cpp
    A libc/test/src/stdbit/stdc_count_zeros_ull_test.cpp
    A libc/test/src/stdbit/stdc_count_zeros_us_test.cpp
    M libc/test/src/stdio/CMakeLists.txt
    M libc/test/src/stdlib/CMakeLists.txt
    M libc/test/utils/UnitTest/CMakeLists.txt
    M libc/utils/CMakeLists.txt
    M libc/utils/MPFRWrapper/CMakeLists.txt
    M libc/utils/gpu/CMakeLists.txt
    M libc/utils/gpu/loader/CMakeLists.txt
    M libc/utils/gpu/loader/Loader.h
    M libc/utils/gpu/loader/amdgpu/CMakeLists.txt
    M libc/utils/gpu/loader/nvptx/CMakeLists.txt
    M libc/utils/gpu/server/CMakeLists.txt
    A libc/utils/gpu/server/llvmlibc_rpc_server.h
    M libc/utils/gpu/server/rpc_server.cpp
    R libc/utils/gpu/server/rpc_server.h
    M libc/utils/mathtools/GenerateHPDConstants.py
    M libc/utils/mathtools/ryu_tablegen.py
    M libcxx/include/__type_traits/invoke.h
    M libcxx/test/libcxx/input.output/filesystems/class.directory_entry/directory_entry.mods/last_write_time.pass.cpp
    M libcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp
    M libcxx/test/libcxx/language.support/support.dynamic/new_faligned_allocation.pass.cpp
    M libcxx/test/libcxx/thread/thread.condition/PR30202_notify_from_pthread_created_thread.pass.cpp
    M libcxx/test/libcxx/thread/thread.threads/thread.thread.this/sleep_for.pass.cpp
    M libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.remove_all/toctou.pass.cpp
    M libcxx/test/std/language.support/cmp/cmp.alg/strong_order_long_double.verify.cpp
    M libcxx/test/std/language.support/support.dynamic/align_val_t.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/delete_align_val_t_replace.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align.replace.indirect.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align.replace.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align_nothrow.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align_nothrow.replace.indirect.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align_nothrow.replace.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/nodiscard.verify.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/delete_align_val_t_replace.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align.replace.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align_nothrow.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align_nothrow.replace.indirect.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align_nothrow.replace.pass.cpp
    M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/nodiscard.verify.cpp
    M libcxx/test/std/language.support/support.rtti/type.info/type_info.equal.pass.cpp
    M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_in.pass.cpp
    M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_length.pass.cpp
    M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_out.pass.cpp
    M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_in.pass.cpp
    M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_length.pass.cpp
    M libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_out.pass.cpp
    M libcxx/test/std/utilities/format/format.functions/escaped_output.unicode.pass.cpp
    M libcxx/test/std/utilities/format/format.range/format.range.fmtstr/format.pass.cpp
    M libcxx/test/std/utilities/format/format.range/format.range.fmtstr/parse.pass.cpp
    M libcxx/test/std/utilities/memory/temporary.buffer/overaligned.pass.cpp
    A lld/docs/ELF/large_section_layout_nopic.png
    A lld/docs/ELF/large_section_layout_pic.png
    A lld/docs/ELF/large_sections.rst
    A lld/docs/ELF/section_layout.png
    M lld/docs/WebAssembly.rst
    M lld/docs/index.rst
    M lld/test/ELF/mips-pc-relocs.s
    M lld/test/wasm/data-layout.s
    M lld/wasm/Config.h
    M lld/wasm/Driver.cpp
    M lld/wasm/Options.td
    M lld/wasm/Writer.cpp
    M lldb/docs/resources/test.rst
    M lldb/docs/testsuite/a-detailed-walkthrough.txt
    M lldb/include/lldb/Interpreter/OptionValueSInt64.h
    M lldb/include/lldb/Interpreter/OptionValueUInt64.h
    M lldb/include/lldb/Interpreter/Options.h
    M lldb/include/lldb/Target/Thread.h
    M lldb/include/lldb/Utility/ArchSpec.h
    M lldb/packages/Python/lldbsuite/test/README-TestSuite
    M lldb/packages/Python/lldbsuite/test/lldbtest.py
    M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
    M lldb/source/Commands/CommandObjectBreakpoint.cpp
    M lldb/source/Core/CoreProperties.td
    M lldb/source/Core/Debugger.cpp
    M lldb/source/Interpreter/OptionValueUInt64.cpp
    M lldb/source/Interpreter/Options.cpp
    M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
    M lldb/source/Target/Process.cpp
    M lldb/source/Target/Target.cpp
    M lldb/source/Utility/ArchSpec.cpp
    M lldb/test/API/commands/expression/call-throws/TestCallThatThrows.py
    M lldb/test/API/commands/expression/dont_allow_jit/TestAllowJIT.py
    M lldb/test/API/commands/settings/TestSettings.py
    M lldb/test/API/commands/statistics/basic/TestStats.py
    M lldb/test/API/commands/trace/TestTraceSave.py
    M lldb/test/API/functionalities/breakpoint/address_breakpoints/TestBadAddressBreakpoints.py
    M lldb/test/API/functionalities/breakpoint/breakpoint_command/TestBreakpointCommand.py
    M lldb/test/API/functionalities/breakpoint/breakpoint_names/TestBreakpointNames.py
    M lldb/test/API/functionalities/gdb_remote_client/TestJLink6Armv7RegisterDefinition.py
    M lldb/test/API/functionalities/module_cache/simple_exe/TestModuleCacheSimple.py
    M lldb/test/API/functionalities/progress_reporting/TestTrimmedProgressReporting.py
    M lldb/test/API/functionalities/stats_api/TestStatisticsAPI.py
    M lldb/test/API/functionalities/thread/backtrace_limit/TestBacktraceLimit.py
    M lldb/test/API/functionalities/thread/state/TestThreadStates.py
    M lldb/test/API/lldbtest.py
    M lldb/test/API/macosx/arm-corefile-regctx/TestArmMachoCorefileRegctx.py
    A lldb/test/API/macosx/arm64e-attach/Makefile
    A lldb/test/API/macosx/arm64e-attach/TestArm64eAttach.py
    A lldb/test/API/macosx/arm64e-attach/main.c
    M lldb/test/API/macosx/lc-note/addrable-bits/TestAddrableBitsCorefile.py
    M lldb/test/API/macosx/lc-note/firmware-corefile/TestFirmwareCorefiles.py
    M lldb/test/API/macosx/lc-note/kern-ver-str/TestKernVerStrLCNOTE.py
    M lldb/test/API/macosx/lc-note/multiple-binary-corefile/TestMultipleBinaryCorefile.py
    M lldb/test/API/macosx/queues/TestQueues.py
    M lldb/test/API/macosx/safe-to-func-call/TestSafeFuncCalls.py
    M lldb/test/API/python_api/interpreter/TestRunCommandInterpreterAPI.py
    M lldb/test/API/python_api/type/TestTypeList.py
    A lldb/test/API/tools/lldb-dap/databreakpoint/Makefile
    A lldb/test/API/tools/lldb-dap/databreakpoint/TestDAP_setDataBreakpoints.py
    A lldb/test/API/tools/lldb-dap/databreakpoint/main.cpp
    R lldb/third_party/Python/module/progress/progress.py
    R lldb/third_party/Python/module/unittest2/unittest2/__init__.py
    R lldb/third_party/Python/module/unittest2/unittest2/__main__.py
    R lldb/third_party/Python/module/unittest2/unittest2/case.py
    R lldb/third_party/Python/module/unittest2/unittest2/collector.py
    R lldb/third_party/Python/module/unittest2/unittest2/compatibility.py
    R lldb/third_party/Python/module/unittest2/unittest2/loader.py
    R lldb/third_party/Python/module/unittest2/unittest2/main.py
    R lldb/third_party/Python/module/unittest2/unittest2/result.py
    R lldb/third_party/Python/module/unittest2/unittest2/runner.py
    R lldb/third_party/Python/module/unittest2/unittest2/signals.py
    R lldb/third_party/Python/module/unittest2/unittest2/suite.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/__init__.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/dummy.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/support.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_assertions.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_break.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_case.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_discovery.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_functiontestcase.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_loader.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_new_tests.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_program.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_result.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_runner.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_setups.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_skipping.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_suite.py
    R lldb/third_party/Python/module/unittest2/unittest2/test/test_unittest2_with.py
    R lldb/third_party/Python/module/unittest2/unittest2/util.py
    M lldb/tools/debugserver/source/DNB.cpp
    M lldb/tools/debugserver/source/DNB.h
    M lldb/tools/debugserver/source/MacOSX/MachProcess.h
    M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
    M lldb/tools/debugserver/source/RNBRemote.cpp
    M lldb/tools/lldb-dap/CMakeLists.txt
    M lldb/tools/lldb-dap/DAPForward.h
    A lldb/tools/lldb-dap/Watchpoint.cpp
    A lldb/tools/lldb-dap/Watchpoint.h
    M lldb/tools/lldb-dap/lldb-dap.cpp
    M lldb/unittests/Interpreter/CMakeLists.txt
    A lldb/unittests/Interpreter/TestOptions.cpp
    M lldb/unittests/ScriptInterpreter/Python/PythonDataObjectsTests.cpp
    M llvm/CMakeLists.txt
    M llvm/cmake/modules/AddLLVM.cmake
    M llvm/cmake/modules/HandleLLVMOptions.cmake
    M llvm/docs/CommandGuide/llvm-readelf.rst
    M llvm/docs/CommandGuide/llvm-readobj.rst
    M llvm/docs/GettingStarted.rst
    M llvm/docs/LangRef.rst
    M llvm/include/llvm/ADT/StringSet.h
    M llvm/include/llvm/ADT/iterator_range.h
    M llvm/include/llvm/Analysis/TargetLibraryInfo.def
    A llvm/include/llvm/CodeGen/AtomicExpand.h
    M llvm/include/llvm/CodeGen/MachineInstr.h
    M llvm/include/llvm/CodeGen/MachinePassManager.h
    M llvm/include/llvm/CodeGen/MachineSSAUpdater.h
    M llvm/include/llvm/CodeGen/Passes.h
    A llvm/include/llvm/CodeGen/SDPatternMatch.h
    M llvm/include/llvm/CodeGen/SelectionDAG.h
    M llvm/include/llvm/CodeGen/TargetInstrInfo.h
    M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
    M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
    M llvm/include/llvm/CodeGen/ValueTypes.td
    M llvm/include/llvm/DebugInfo/DWARF/DWARFAcceleratorTable.h
    M llvm/include/llvm/Frontend/OpenMP/OMP.td
    M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
    M llvm/include/llvm/IR/Attributes.td
    M llvm/include/llvm/IR/Constants.h
    M llvm/include/llvm/IR/DebugInfo.h
    M llvm/include/llvm/IR/DebugProgramInstruction.h
    M llvm/include/llvm/IR/InstrTypes.h
    M llvm/include/llvm/IR/Instruction.h
    M llvm/include/llvm/IR/Instructions.h
    M llvm/include/llvm/IR/IntrinsicInst.h
    M llvm/include/llvm/IR/Intrinsics.td
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/include/llvm/IR/IntrinsicsDirectX.td
    M llvm/include/llvm/IR/VPIntrinsics.def
    M llvm/include/llvm/InitializePasses.h
    M llvm/include/llvm/LTO/Config.h
    M llvm/include/llvm/LTO/LTO.h
    M llvm/include/llvm/LinkAllPasses.h
    M llvm/include/llvm/Passes/CodeGenPassBuilder.h
    M llvm/include/llvm/Passes/MachinePassRegistry.def
    M llvm/include/llvm/Passes/PassBuilder.h
    M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
    M llvm/include/llvm/ProfileData/InstrProfData.inc
    M llvm/include/llvm/Target/TargetMachine.h
    M llvm/include/llvm/Target/TargetSchedule.td
    M llvm/include/llvm/TargetParser/PPCTargetParser.def
    M llvm/include/llvm/TargetParser/X86TargetParser.def
    M llvm/include/llvm/Transforms/IPO/HotColdSplitting.h
    M llvm/include/llvm/Transforms/Utils/SimplifyLibCalls.h
    M llvm/lib/Analysis/DomConditionCache.cpp
    M llvm/lib/Analysis/Loads.cpp
    M llvm/lib/Analysis/TargetLibraryInfo.cpp
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
    M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
    M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
    M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
    M llvm/lib/CodeGen/AtomicExpandPass.cpp
    M llvm/lib/CodeGen/CMakeLists.txt
    M llvm/lib/CodeGen/CodeGen.cpp
    M llvm/lib/CodeGen/CodeGenPrepare.cpp
    M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/GlobalISel/Utils.cpp
    A llvm/lib/CodeGen/InitUndef.cpp
    M llvm/lib/CodeGen/MachineFunctionSplitter.cpp
    M llvm/lib/CodeGen/MachineInstr.cpp
    M llvm/lib/CodeGen/MachinePassManager.cpp
    M llvm/lib/CodeGen/MachinePipeliner.cpp
    M llvm/lib/CodeGen/MachineSSAUpdater.cpp
    M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    A llvm/lib/CodeGen/SelectionDAG/MatchContext.h
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/lib/CodeGen/TargetPassConfig.cpp
    M llvm/lib/CodeGen/ValueTypes.cpp
    M llvm/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp
    M llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
    M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
    M llvm/lib/IR/AsmWriter.cpp
    M llvm/lib/IR/Attributes.cpp
    M llvm/lib/IR/BasicBlock.cpp
    M llvm/lib/IR/Constants.cpp
    M llvm/lib/IR/DebugInfo.cpp
    M llvm/lib/IR/DebugProgramInstruction.cpp
    M llvm/lib/IR/Instruction.cpp
    M llvm/lib/IR/Instructions.cpp
    M llvm/lib/IR/IntrinsicInst.cpp
    M llvm/lib/IR/LLVMContextImpl.cpp
    M llvm/lib/IR/LLVMContextImpl.h
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/LTO/LTO.cpp
    M llvm/lib/LTO/LTOBackend.cpp
    M llvm/lib/LTO/LTOCodeGenerator.cpp
    M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
    M llvm/lib/Object/SymbolSize.cpp
    M llvm/lib/Passes/PassBuilder.cpp
    M llvm/lib/Passes/PassRegistry.def
    M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
    M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
    M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
    M llvm/lib/Target/AArch64/AArch64SchedTSV110.td
    M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
    M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
    M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
    M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/DSInstructions.td
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
    M llvm/lib/Target/AMDGPU/MIMGInstructions.td
    M llvm/lib/Target/AMDGPU/SIDefines.h
    M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/lib/Target/AMDGPU/SIModeRegister.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/lib/Target/AMDGPU/VOP1Instructions.td
    M llvm/lib/Target/AMDGPU/VOP2Instructions.td
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
    M llvm/lib/Target/AMDGPU/VOPCInstructions.td
    M llvm/lib/Target/AMDGPU/VOPInstructions.td
    M llvm/lib/Target/ARC/ARCTargetMachine.cpp
    M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
    M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
    M llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
    M llvm/lib/Target/ARM/ARMFrameLowering.cpp
    M llvm/lib/Target/ARM/ARMFrameLowering.h
    M llvm/lib/Target/ARM/ARMInstrInfo.td
    M llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
    M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
    M llvm/lib/Target/ARM/ARMSubtarget.h
    M llvm/lib/Target/ARM/ARMTargetMachine.cpp
    M llvm/lib/Target/BPF/BPFTargetMachine.cpp
    M llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
    M llvm/lib/Target/DirectX/DXIL.td
    M llvm/lib/Target/Hexagon/CMakeLists.txt
    M llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
    A llvm/lib/Target/Hexagon/HexagonGenMemAbsolute.cpp
    M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
    M llvm/lib/Target/Hexagon/HexagonInstrInfo.h
    A llvm/lib/Target/Hexagon/HexagonPostIncOpt.cpp
    M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
    A llvm/lib/Target/Hexagon/HexagonTfrCleanup.cpp
    M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h
    M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
    M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
    M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
    M llvm/lib/Target/M68k/M68kTargetMachine.cpp
    M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
    M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
    M llvm/lib/Target/Mips/MipsTargetMachine.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
    M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
    M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
    M llvm/lib/Target/RISCV/CMakeLists.txt
    M llvm/lib/Target/RISCV/RISCV.h
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
    M llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
    R llvm/lib/Target/RISCV/RISCVRVVInitUndef.cpp
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
    M llvm/lib/Target/RISCV/RISCVScheduleV.td
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
    M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
    M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
    M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
    M llvm/lib/Target/SPIRV/SPIRVISelLowering.h
    M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
    M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
    M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
    M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
    M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
    M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
    M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
    M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
    M llvm/lib/Target/SPIRV/SPIRVUtils.h
    M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
    M llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
    M llvm/lib/Target/VE/VETargetMachine.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
    M llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
    M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
    M llvm/lib/Target/X86/X86TargetMachine.cpp
    M llvm/lib/Target/X86/X86TargetMachine.h
    M llvm/lib/Target/XCore/XCoreTargetMachine.cpp
    M llvm/lib/TargetParser/Host.cpp
    M llvm/lib/Transforms/IPO/HotColdSplitting.cpp
    M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
    M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
    M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
    M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
    M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
    M llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
    M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
    M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
    M llvm/lib/Transforms/Scalar/SpeculativeExecution.cpp
    M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
    M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
    M llvm/lib/Transforms/Utils/CodeExtractor.cpp
    M llvm/lib/Transforms/Utils/FlattenCFG.cpp
    M llvm/lib/Transforms/Utils/InlineFunction.cpp
    M llvm/lib/Transforms/Utils/Local.cpp
    M llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
    M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
    M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
    M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
    M llvm/lib/Transforms/Utils/ValueMapper.cpp
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/lib/Transforms/Vectorize/VPlan.cpp
    M llvm/lib/Transforms/Vectorize/VPlan.h
    M llvm/runtimes/CMakeLists.txt
    M llvm/test/Analysis/CostModel/AArch64/arith-fp-frem.ll
    M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
    M llvm/test/Analysis/ScalarEvolution/exit-count-select-safe.ll
    A llvm/test/Bitcode/constant-splat.ll
    A llvm/test/CodeGen/AArch64/16bit-float-promotion-with-nofp.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/combine-select.mir
    M llvm/test/CodeGen/AArch64/O3-pipeline.ll
    M llvm/test/CodeGen/AArch64/addsub.ll
    A llvm/test/CodeGen/AArch64/arm64-fpenv.ll
    M llvm/test/CodeGen/AArch64/arm64ec-entry-thunks-local-linkage.ll
    M llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll
    M llvm/test/CodeGen/AArch64/cmp-chains.ll
    M llvm/test/CodeGen/AArch64/framelayout-sve-calleesaves-fix.mir
    M llvm/test/CodeGen/AArch64/framelayout-sve.mir
    A llvm/test/CodeGen/AArch64/overflow.ll
    M llvm/test/CodeGen/AArch64/preserve.ll
    R llvm/test/CodeGen/AArch64/reverse-csr-restore-seq.mir
    M llvm/test/CodeGen/AArch64/sme-streaming-compatible-interface.ll
    M llvm/test/CodeGen/AArch64/sme-streaming-interface.ll
    M llvm/test/CodeGen/AArch64/sme2-intrinsics-ld1.ll
    M llvm/test/CodeGen/AArch64/sme2-intrinsics-ldnt1.ll
    M llvm/test/CodeGen/AArch64/stack-probing-sve.ll
    M llvm/test/CodeGen/AArch64/strictfp_f16_abi_promote.ll
    M llvm/test/CodeGen/AArch64/sve-alloca.ll
    M llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
    M llvm/test/CodeGen/AArch64/sve-tailcall.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-pmov-to-pred.ll
    M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-pmov-to-vector.ll
    M llvm/test/CodeGen/AArch64/unwind-preserved.ll
    A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-extract-vector-load.mir
    A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fdiv-sqrt-to-rsq.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
    M llvm/test/CodeGen/AMDGPU/bf16.ll
    M llvm/test/CodeGen/AMDGPU/fmed3-cast-combine.ll
    M llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll
    M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
    M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir
    M llvm/test/CodeGen/AMDGPU/local-atomics-fp.ll
    M llvm/test/CodeGen/AMDGPU/private-memory-atomics.ll
    M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
    M llvm/test/CodeGen/ARM/O3-pipeline.ll
    A llvm/test/CodeGen/ARM/ldst-opt-lr-restored.ll
    M llvm/test/CodeGen/Hexagon/atomicrmw-uinc-udec-wrap.ll
    A llvm/test/CodeGen/Hexagon/bit-store-upper-sub-hi.mir
    M llvm/test/CodeGen/Hexagon/isel/select-vec.ll
    A llvm/test/CodeGen/Hexagon/load-const-extend-opt.ll
    A llvm/test/CodeGen/Hexagon/post-inc-vec.mir
    A llvm/test/CodeGen/Hexagon/post_inc_store.mir
    A llvm/test/CodeGen/Hexagon/postincopt-crash.mir
    A llvm/test/CodeGen/Hexagon/postincopt-dcfetch.mir
    M llvm/test/CodeGen/Hexagon/reg-by-name.ll
    A llvm/test/CodeGen/Hexagon/store-const-extend-opt.ll
    A llvm/test/CodeGen/Hexagon/tfr-slotindex.ll
    A llvm/test/CodeGen/Hexagon/valid-offset-loadbsw4.mir
    A llvm/test/CodeGen/LoongArch/intrinsic-memcpy.ll
    M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
    A llvm/test/CodeGen/Mips/llvm-ir/forbidden-slot-ir.ll
    M llvm/test/CodeGen/NVPTX/param-load-store.ll
    A llvm/test/CodeGen/NVPTX/unaligned-param-load-store.ll
    M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
    M llvm/test/CodeGen/RISCV/O0-pipeline.ll
    M llvm/test/CodeGen/RISCV/O3-pipeline.ll
    A llvm/test/CodeGen/RISCV/cm_mvas_mvsa.mir
    M llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
    M llvm/test/CodeGen/RISCV/make-compressible.mir
    M llvm/test/CodeGen/RISCV/pr51206.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-concat.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsubu.ll
    M llvm/test/CodeGen/RISCV/rvv/handle-noreg-with-implicit-def.mir
    A llvm/test/CodeGen/RISCV/rvv/llrint-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/lrint-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/subregister-undef-early-clobber.mir
    M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir
    A llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
    M llvm/test/CodeGen/RISCV/select.ll
    M llvm/test/CodeGen/RISCV/sext-zext-trunc.ll
    M llvm/test/CodeGen/RISCV/split-offsets.ll
    M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
    M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
    A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_usm_storage_classes/intel-usm-addrspaces.ll
    A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_subgroup_rotate/subgroup-rotate.ll
    A llvm/test/CodeGen/SPIRV/switch-no-jump-table.ll
    M llvm/test/CodeGen/SystemZ/fp-strict-conv-17.ll
    M llvm/test/CodeGen/Thumb2/mve-intrinsics/vcaddq.ll
    M llvm/test/CodeGen/Thumb2/mve-laneinterleaving-cost.ll
    M llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
    M llvm/test/CodeGen/Thumb2/mve-vmull-splat.ll
    M llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-multi-return.ll
    M llvm/test/CodeGen/WebAssembly/multivalue-dont-move-def-past-use.mir
    M llvm/test/CodeGen/WebAssembly/multivalue-stackify.ll
    M llvm/test/CodeGen/WebAssembly/multivalue.ll
    M llvm/test/CodeGen/WebAssembly/multivalue_libcall.ll
    A llvm/test/CodeGen/X86/GlobalISel/calllowering-tailcall.ll
    M llvm/test/CodeGen/X86/opt-pipeline.ll
    M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
    M llvm/test/CodeGen/X86/tailcall-cgp-dup.ll
    M llvm/test/ExecutionEngine/JITLink/Generic/sectcreate.test
    M llvm/test/Instrumentation/InstrProfiling/mcdc.ll
    M llvm/test/MC/AArch64/SVE/cntb-diagnostics.s
    M llvm/test/MC/AArch64/SVE/ptrue-diagnostics.s
    M llvm/test/MC/AMDGPU/gfx11-promotions.s
    M llvm/test/MC/AMDGPU/gfx11_asm_vop3p_dpp16.s
    M llvm/test/MC/AMDGPU/gfx11_asm_vop3p_dpp8.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3p_dpp16.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3p_dpp8.s
    M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p_dpp16.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p_dpp8.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3p_dpp16.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3p_dpp8.txt
    M llvm/test/MC/Disassembler/X86/x86-64-err.txt
    A llvm/test/MC/Mips/forbidden-slot.s
    M llvm/test/MC/Mips/mips32r6/relocations.s
    M llvm/test/MC/Mips/mips64r6/relocations.s
    M llvm/test/MC/Mips/relocation.s
    A llvm/test/TableGen/HwModeEncodeDecode2.td
    M llvm/test/TableGen/directive1.td
    M llvm/test/TableGen/directive2.td
    M llvm/test/Transforms/AtomicExpand/AArch64/atomicrmw-fp.ll
    M llvm/test/Transforms/AtomicExpand/AArch64/expand-atomicrmw-xchg-fp.ll
    M llvm/test/Transforms/AtomicExpand/AArch64/pcsections.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16-system.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i8-system.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i8.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd-flat-specialization.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fmax.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fmin.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fsub.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-nand.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-simplify-cfg-CAS-block.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/unaligned-atomic.ll
    M llvm/test/Transforms/AtomicExpand/ARM/atomic-expansion-v7.ll
    M llvm/test/Transforms/AtomicExpand/ARM/atomic-expansion-v8.ll
    M llvm/test/Transforms/AtomicExpand/ARM/atomicrmw-fp.ll
    M llvm/test/Transforms/AtomicExpand/ARM/cmpxchg-weak.ll
    M llvm/test/Transforms/AtomicExpand/Hexagon/atomicrmw-fp.ll
    M llvm/test/Transforms/AtomicExpand/LoongArch/atomicrmw-fp.ll
    M llvm/test/Transforms/AtomicExpand/LoongArch/load-store-atomic.ll
    M llvm/test/Transforms/AtomicExpand/Mips/atomicrmw-fp.ll
    M llvm/test/Transforms/AtomicExpand/PowerPC/atomicrmw-fp.ll
    M llvm/test/Transforms/AtomicExpand/PowerPC/cfence-double.ll
    M llvm/test/Transforms/AtomicExpand/PowerPC/cfence-float.ll
    M llvm/test/Transforms/AtomicExpand/PowerPC/cmpxchg.ll
    M llvm/test/Transforms/AtomicExpand/PowerPC/issue55983.ll
    M llvm/test/Transforms/AtomicExpand/RISCV/atomicrmw-fp.ll
    M llvm/test/Transforms/AtomicExpand/SPARC/libcalls.ll
    M llvm/test/Transforms/AtomicExpand/SPARC/partword.ll
    M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-libcall.ll
    M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-non-integer.ll
    M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-rmw-fp.ll
    M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-rmw-initial-load.ll
    M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-xchg-fp.ll
    M llvm/test/Transforms/ConstraintElimination/minmax.ll
    M llvm/test/Transforms/ConstraintElimination/sext.ll
    M llvm/test/Transforms/CorrelatedValuePropagation/min-max.ll
    A llvm/test/Transforms/GVN/pr82884.ll
    M llvm/test/Transforms/HotColdSplit/assumption-cache-invalidation.ll
    M llvm/test/Transforms/HotColdSplit/eh-pads.ll
    M llvm/test/Transforms/HotColdSplit/outline-disjoint-diamonds.ll
    A llvm/test/Transforms/HotColdSplit/outline-inner-region.ll
    A llvm/test/Transforms/HotColdSplit/outline-outer-region.ll
    A llvm/test/Transforms/InferAddressSpaces/AMDGPU/multiple-uses-of-val.ll
    A llvm/test/Transforms/Inline/inline-sign-return-address.ll
    M llvm/test/Transforms/InstCombine/fpextend.ll
    M llvm/test/Transforms/InstCombine/known-bits.ll
    A llvm/test/Transforms/InstCombine/math-odd-even-parity.ll
    M llvm/test/Transforms/InstCombine/minmax-fold.ll
    M llvm/test/Transforms/InstCombine/not.ll
    M llvm/test/Transforms/InstCombine/select_meta.ll
    A llvm/test/Transforms/InstCombine/sub-xor-cmp.ll
    A llvm/test/Transforms/LoopStrengthReduce/RISCV/term-fold-crash.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
    A llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
    A llvm/test/Transforms/OpenMP/deduplication_soundness.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/extractelements-to-shuffle.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/reorder-fmuladd-crash.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
    M llvm/test/Transforms/SLPVectorizer/X86/pr35497.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reduction-transpose.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reorder-clustered-node.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reorder-vf-to-resize.ll
    M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reorder.ll
    M llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder2.ll
    M llvm/test/Transforms/SLPVectorizer/X86/vec3-reorder-reshuffle.ll
    M llvm/test/Transforms/SimplifyCFG/branch-fold-dbg.ll
    M llvm/test/Transforms/SpeculativeExecution/PR46267.ll
    M llvm/test/Transforms/Util/flatten-cfg.ll
    A llvm/test/Transforms/VectorCombine/RISCV/load-widening.ll
    M llvm/test/tools/llc/new-pm/pipeline.mir
    M llvm/test/tools/llc/new-pm/start-stop.ll
    M llvm/test/tools/llvm-cov/Inputs/mcdc-const.o
    M llvm/test/tools/llvm-cov/Inputs/mcdc-general.o
    M llvm/test/tools/llvm-cov/Inputs/mcdc-macro.o
    M llvm/test/tools/llvm-cov/Inputs/mcdc-maxbs.o
    M llvm/test/tools/llvm-cov/mcdc-macro.test
    M llvm/test/tools/llvm-cov/mcdc-maxbs.test
    A llvm/test/tools/llvm-mca/AArch64/HiSilicon/tsv110-forwarding.s
    A llvm/test/tools/llvm-readobj/ELF/decompress-zlib-unsupported.test
    A llvm/test/tools/llvm-readobj/ELF/decompress-zlib.test
    A llvm/test/tools/llvm-readobj/ELF/decompress-zstd-unsupported.test
    A llvm/test/tools/llvm-readobj/ELF/decompress-zstd.test
    M llvm/test/tools/llvm-symbolizer/wasm-basic.s
    M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
    M llvm/tools/llc/NewPMDriver.cpp
    M llvm/tools/llvm-exegesis/README.md
    M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
    M llvm/tools/llvm-gsymutil/Opts.td
    M llvm/tools/llvm-gsymutil/llvm-gsymutil.cpp
    M llvm/tools/llvm-link/llvm-link.cpp
    M llvm/tools/llvm-readobj/ObjDumper.cpp
    M llvm/tools/llvm-readobj/ObjDumper.h
    M llvm/tools/llvm-readobj/Opts.td
    M llvm/tools/llvm-readobj/llvm-readobj.cpp
    M llvm/tools/llvm-shlib/CMakeLists.txt
    M llvm/tools/opt/optdriver.cpp
    M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
    M llvm/unittests/Analysis/ValueTrackingTest.cpp
    M llvm/unittests/CodeGen/CMakeLists.txt
    M llvm/unittests/CodeGen/PassManagerTest.cpp
    A llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
    M llvm/unittests/DebugInfo/DWARF/DWARFDebugLineTest.cpp
    M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
    M llvm/unittests/IR/VPIntrinsicTest.cpp
    M llvm/unittests/MIR/CMakeLists.txt
    M llvm/unittests/MIR/PassBuilderCallbacksTest.cpp
    M llvm/unittests/ProfileData/CoverageMappingTest.cpp
    M llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.cpp
    M llvm/utils/TableGen/Attributes.cpp
    M llvm/utils/TableGen/CodeGenHwModes.h
    M llvm/utils/TableGen/DXILEmitter.cpp
    M llvm/utils/TableGen/DecoderEmitter.cpp
    M llvm/utils/TableGen/DirectiveEmitter.cpp
    M llvm/utils/TableGen/DisassemblerEmitter.cpp
    M llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn
    M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
    M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
    M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
    M llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/BUILD.gn
    M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
    M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
    M llvm/utils/release/build_llvm_release.bat
    M mlir/CMakeLists.txt
    M mlir/include/mlir/Dialect/GPU/Transforms/Passes.h
    M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
    M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
    M mlir/include/mlir/Dialect/Linalg/Passes.h
    M mlir/include/mlir/Dialect/Linalg/Passes.td
    M mlir/include/mlir/Dialect/Math/Transforms/Passes.h
    M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAttributes.td
    M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
    M mlir/include/mlir/Dialect/SparseTensor/IR/Enums.h
    M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
    M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
    M mlir/include/mlir/Dialect/Utils/IndexingUtils.h
    R mlir/include/mlir/ExecutionEngine/SparseTensor/ErrorHandling.h
    M mlir/include/mlir/ExecutionEngine/SparseTensor/File.h
    M mlir/include/mlir/ExecutionEngine/SparseTensor/Storage.h
    M mlir/include/mlir/ExecutionEngine/SparseTensorRuntime.h
    M mlir/include/mlir/Interfaces/FunctionInterfaces.td
    M mlir/include/mlir/Transforms/DialectConversion.h
    M mlir/lib/Bytecode/Reader/BytecodeReader.cpp
    M mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp
    M mlir/lib/Conversion/ControlFlowToSCF/ControlFlowToSCF.cpp
    M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
    M mlir/lib/Conversion/MathToLLVM/MathToLLVM.cpp
    M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
    M mlir/lib/Conversion/SCFToSPIRV/SCFToSPIRV.cpp
    M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
    M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
    M mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp
    M mlir/lib/Dialect/Async/IR/Async.cpp
    M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
    M mlir/lib/Dialect/GPU/CMakeLists.txt
    M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
    R mlir/lib/Dialect/GPU/Transforms/SerializeToCubin.cpp
    M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
    M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
    M mlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp
    M mlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp
    M mlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
    M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
    M mlir/lib/Dialect/Linalg/Transforms/ElementwiseToLinalg.cpp
    M mlir/lib/Dialect/Linalg/Transforms/Generalization.cpp
    M mlir/lib/Dialect/Linalg/Transforms/InlineScalarOperands.cpp
    M mlir/lib/Dialect/Linalg/Transforms/Loops.cpp
    M mlir/lib/Dialect/Linalg/Transforms/NamedOpConversions.cpp
    M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
    M mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp
    M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
    M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
    M mlir/lib/Dialect/SCF/IR/SCF.cpp
    M mlir/lib/Dialect/SPIRV/IR/AtomicOps.cpp
    M mlir/lib/Dialect/SPIRV/IR/ControlFlowOps.cpp
    M mlir/lib/Dialect/SPIRV/IR/GroupOps.cpp
    M mlir/lib/Dialect/SPIRV/IR/IntegerDotProductOps.cpp
    M mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp
    M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
    M mlir/lib/Dialect/SPIRV/IR/SPIRVParsingUtils.cpp
    M mlir/lib/Dialect/SPIRV/IR/SPIRVParsingUtils.h
    M mlir/lib/Dialect/Shape/IR/Shape.cpp
    M mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
    M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
    M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
    M mlir/lib/Dialect/Utils/IndexingUtils.cpp
    M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
    M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
    M mlir/lib/ExecutionEngine/SparseTensor/File.cpp
    M mlir/lib/ExecutionEngine/SparseTensor/Storage.cpp
    M mlir/lib/ExecutionEngine/SparseTensorRuntime.cpp
    M mlir/lib/Target/LLVMIR/DebugImporter.cpp
    M mlir/lib/Target/LLVMIR/ModuleImport.cpp
    M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
    M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
    M mlir/lib/Transforms/Utils/DialectConversion.cpp
    M mlir/test/CAPI/llvm.c
    M mlir/test/Conversion/MathToLLVM/math-to-llvm.mlir
    M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
    M mlir/test/Dialect/ArmSME/vector-legalization.mlir
    M mlir/test/Dialect/Linalg/canonicalize.mlir
    M mlir/test/Dialect/Linalg/fusion-elementwise-ops.mlir
    M mlir/test/Dialect/Linalg/invalid.mlir
    M mlir/test/Dialect/Mesh/spmdization.mlir
    M mlir/test/Dialect/SPIRV/IR/function-decorations.mlir
    M mlir/test/Dialect/SPIRV/IR/structure-ops.mlir
    M mlir/test/Dialect/Tosa/ops.mlir
    M mlir/test/Dialect/Vector/vector-rewrite-narrow-types.mlir
    M mlir/test/Dialect/Vector/vector-transfer-flatten.mlir
    M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/fill-2d.mlir
    M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul-transpose-a.mlir
    M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul.mlir
    M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul.mlir
    M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/use-too-many-tiles.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-store-128-bit-tile.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f16f16f32.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-i8i8i32.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir
    A mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-scalable-interleave.mlir
    A mlir/test/Integration/Dialect/Vector/CPU/test-interleave.mlir
    M mlir/test/Target/LLVMIR/Import/import-failure.ll
    A mlir/test/Target/LLVMIR/omptarget-constant-alloca-raise.mlir
    M mlir/test/Target/SPIRV/decorations.mlir
    M mlir/test/Target/SPIRV/function-decorations.mlir
    M mlir/test/Target/SPIRV/global-variable.mlir
    A mlir/test/lib/Dialect/ArmSME/CMakeLists.txt
    A mlir/test/lib/Dialect/ArmSME/TestLowerToArmSME.cpp
    M mlir/test/lib/Dialect/CMakeLists.txt
    M mlir/test/lib/Dialect/Test/TestAttributes.cpp
    M mlir/test/lib/Dialect/Test/TestPatterns.cpp
    M mlir/tools/mlir-opt/CMakeLists.txt
    M mlir/tools/mlir-opt/mlir-opt.cpp
    M mlir/unittests/Dialect/SPIRV/SerializationTest.cpp
    M mlir/unittests/IR/InterfaceAttachmentTest.cpp
    M mlir/unittests/IR/OperationSupportTest.cpp
    M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp
    M mlir/unittests/Target/LLVM/SerializeROCDLTarget.cpp
    M mlir/unittests/Target/LLVM/SerializeToLLVMBitcode.cpp
    M openmp/libomptarget/CMakeLists.txt
    M openmp/libomptarget/include/OpenMP/OMPT/Interface.h
    M openmp/libomptarget/include/PluginManager.h
    M openmp/libomptarget/include/Shared/PluginAPI.inc
    M openmp/libomptarget/include/Shared/SourceInfo.h
    M openmp/libomptarget/include/omptarget.h
    M openmp/libomptarget/plugins-nextgen/common/CMakeLists.txt
    M openmp/libomptarget/plugins-nextgen/common/src/RPC.cpp
    M openmp/libomptarget/src/OffloadRTL.cpp
    M openmp/libomptarget/src/OpenMP/OMPT/Callback.cpp
    M openmp/libomptarget/src/PluginManager.cpp
    M openmp/libomptarget/src/device.cpp
    M openmp/libomptarget/src/exports
    M openmp/libomptarget/src/interface.cpp
    M openmp/libomptarget/test/lit.cfg
    A openmp/libomptarget/test/offloading/runtime_init.c
    M openmp/libomptarget/test/ompt/callbacks.h
    M openmp/libomptarget/test/ompt/target_memcpy.c
    A openmp/libomptarget/test/ompt/target_memcpy_emi.c
    M openmp/runtime/cmake/LibompHandleFlags.cmake
    M openmp/runtime/src/z_Linux_util.cpp
    R utils/bazel/crash-f7dbdb2b330aad91f520099159e736e91bb9ddbf
    M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
    M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel

  Log Message:
  -----------
  Merge branch 'main' into users/fhahn/vplan-uniform-scalar-lanes


Compare: https://github.com/llvm/llvm-project/compare/8b48685159f8...e038070d4605

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