[all-commits] [llvm/llvm-project] a3a316: [libc] Remove use of BlockStore for GPU atexit (#8...
Paul Kirth via All-commits
all-commits at lists.llvm.org
Mon Feb 26 09:54:28 PST 2024
Branch: refs/heads/users/ilovepi/spr/llvmloop-rotate-allow-forcing-loop-rotation
Home: https://github.com/llvm/llvm-project
Commit: a3a316e2875258929f062fbffb81e2a9d5b4ce48
https://github.com/llvm/llvm-project/commit/a3a316e2875258929f062fbffb81e2a9d5b4ce48
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M libc/src/stdlib/atexit.cpp
Log Message:
-----------
[libc] Remove use of BlockStore for GPU atexit (#82823)
Summary:
The GPU backends have restrictions on the kinds of initializers they can
produce. The use of BlockStore here currently breaks the backends
through the use of recursive initializers. This prevents it from
actually being included in any builds. This patchs changes it to just
use a fixed size of 64 slots .The chances of someone exceeding the 64
slots in practice is very, very low.
However, this is primarily a bandaid solution as a real solution will
need to use a lock free data structure to push work in parallel.
Currently the mutexes on the GPU build do nothing, so they only work if
the user guards the use themselves.
Commit: 1a2ecbb3980a3005c2027eb5b69bbbe32c9c8294
https://github.com/llvm/llvm-project/commit/1a2ecbb3980a3005c2027eb5b69bbbe32c9c8294
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M libc/docs/gpu/rpc.rst
M libc/utils/gpu/loader/Loader.h
M libc/utils/gpu/server/CMakeLists.txt
A libc/utils/gpu/server/llvmlibc_rpc_server.h
M libc/utils/gpu/server/rpc_server.cpp
R libc/utils/gpu/server/rpc_server.h
M openmp/libomptarget/plugins-nextgen/common/src/RPC.cpp
Log Message:
-----------
[libc] Remove 'llvm-gpu-none' directory from build (#82816)
Summary:
This directory is leftover from when we handled both AMDGPU and NVPTX in
the same build and merged them into a pseudo triple. Now the only thing
it contains is the RPC server header. This gets rid of it, but now that
it's in the base install directory we should make it clear that it's an
LLVM libc header.
Commit: b43dd08aa31f37cb9517a80f394631a7d8ff6b90
https://github.com/llvm/llvm-project/commit/b43dd08aa31f37cb9517a80f394631a7d8ff6b90
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M libc/cmake/modules/LLVMLibCLibraryRules.cmake
M libc/cmake/modules/prepare_libc_gpu_build.cmake
M libc/lib/CMakeLists.txt
Log Message:
-----------
[libc] Install a single LLVM-IR version of the GPU library (#82791)
Summary:
Recent patches have allowed us to treat these libraries as direct
builds. This makes it easier to simply build them to a single LLVM-IR
file. This matches the way these files are presented by the ROCm and
CUDA toolchains and makes it easier to work with.
Commit: 99660082cb387c9bf7974fef558c5f73d8b5a198
https://github.com/llvm/llvm-project/commit/99660082cb387c9bf7974fef558c5f73d8b5a198
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/test/Driver/gpu-libc-headers.c
Log Message:
-----------
[Clang] Append target search paths for direct offloading compilation (#82699)
Summary:
Recent changes to the `libc` project caused the headers to be installed
to `include/<triple>` for the GPU and the libraries to be in
`lib/<triple>`. This means we should automatically append these search
paths so they can be found by default. This allows the following to work
targeting AMDGPU.
```shell
$ clang foo.c -flto -mcpu=native --target=amdgcn-amd-amdhsa -lc <install>/lib/amdgcn-amd-amdhsa/crt1.o
$ amdhsa-loader a.out
```
Commit: 1c2456d6593cea317a00627889b5c35766a732e0
https://github.com/llvm/llvm-project/commit/1c2456d6593cea317a00627889b5c35766a732e0
Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
R mlir/include/mlir/ExecutionEngine/SparseTensor/ErrorHandling.h
M mlir/include/mlir/ExecutionEngine/SparseTensor/File.h
M mlir/include/mlir/ExecutionEngine/SparseTensor/Storage.h
M mlir/lib/ExecutionEngine/SparseTensor/File.cpp
M mlir/lib/ExecutionEngine/SparseTensor/Storage.cpp
M mlir/lib/ExecutionEngine/SparseTensorRuntime.cpp
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][sparse] remove very thin header file from sparse runtime support (#82820)
Commit: ae91a427ac8f9fc7368ec052995cec6a6aeb8ea8
https://github.com/llvm/llvm-project/commit/ae91a427ac8f9fc7368ec052995cec6a6aeb8ea8
Author: Timothy Herchen <timothy.herchen at gmail.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
M llvm/test/MC/Disassembler/X86/x86-64-err.txt
Log Message:
-----------
[X86][MC] Reject out-of-range control and debug registers encoded with APX (#82584)
Fixes #82557. APX specification states that the high bits found in REX2
used to encode GPRs can also be used to encode control and debug
registers, although all of them will #UD. Therefore, when disassembling
we reject attempts to create control or debug registers with a value of
16 or more.
See page 22 of the
[specification](https://www.intel.com/content/www/us/en/developer/articles/technical/advanced-performance-extensions-apx.html):
> Note that the R, X and B register identifiers can also address non-GPR
register types, such as vector registers, control registers and debug
registers. When any of them does, the highest-order bits REX2.R4,
REX2.X4 or REX2.B4 are generally ignored, except when the register being
addressed is a control or debug register. [...] The exception is that
REX2.R4 and REX2.R3 [*sic*] are not ignored when the R register
identifier addresses a control or debug register. Furthermore, if any
attempt is made to access a non-existent control register (CR*) or debug
register (DR*) using the REX2 prefix and one of the following
instructions:
“MOV CR*, r64”, “MOV r64, CR*”, “MOV DR*, r64”, “MOV r64, DR*”. #UD is
raised.
The invalid encodings are 64-bit only because `0xd5` is a valid
instruction in 32-bit mode.
Commit: 99f31bab86c53ed5094f57ff8a05a6ea2c8e0c38
https://github.com/llvm/llvm-project/commit/99f31bab86c53ed5094f57ff8a05a6ea2c8e0c38
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Lower/CUDA/cuda-data-attribute.cuf
M flang/test/Semantics/cuf03.cuf
Log Message:
-----------
[flang][cuda] Fix semantic for the CONSTANT attribute (#82821)
Object with the CONSTANT attribute cannot be declared in the host
subprogram.
It can be declared in a module or a device subprogram.
Adapt the semantic check to trigger the error in host subprogram.
Commit: 5c90527b436d1c7d753c187aff1b45e6c8da1af6
https://github.com/llvm/llvm-project/commit/5c90527b436d1c7d753c187aff1b45e6c8da1af6
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M flang/lib/Semantics/definable.cpp
M flang/test/Semantics/cuf03.cuf
Log Message:
-----------
[flang][cuda] Allow object with SHARED attribute as definable (#82822)
A semantic error was raised in device subprogram like:
```
attributes(global) subroutine devsubr2()
real, shared :: rs
rs = 1
end subroutine
```
Object with the SHARED attribute can be can be read or written by all
threads in the block.
https://docs.nvidia.com/hpc-sdk/archive/24.1/compilers/cuda-fortran-prog-guide/index.html#cfpg-var-qual-attr-shared
Commit: 47aee8b56d65e2bac5c7128424ff06134e454d83
https://github.com/llvm/llvm-project/commit/47aee8b56d65e2bac5c7128424ff06134e454d83
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M flang/tools/bbc/bbc.cpp
Log Message:
-----------
[flang][OpenMP] Set OpenMP attributes in MLIR module in bbc before lo… (#82774)
…wering
Right now attributes like OpenMP version or target attributes for
offload are set after lowering in bbc. The flang frontend sets them
before lowering, making them available in the lowering process.
This change sets them before lowering in bbc as well.
Commit: dcf4ca558ce5c323ce9b0af93acc0c832024eb3c
https://github.com/llvm/llvm-project/commit/dcf4ca558ce5c323ce9b0af93acc0c832024eb3c
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
A mlir/test/Target/LLVMIR/omptarget-constant-alloca-raise.mlir
Log Message:
-----------
[OpenMP][MLIR][OMPIRBuilder] Add a small optional constant alloca raise function pass to finalize, utilised in convertTarget (#78818)
This patch seeks to add a mechanism to raise constant (not ConstantExpr
or runtime/dynamic) sized allocations into the entry block for select
functions that have been inserted into a list for processing. This
processing occurs during the finalize call, after OutlinedInfo regions
have completed. This currently has only been utilised for
createOutlinedFunction, which is triggered for TargetOp generation in
the OpenMP MLIR dialect lowering to LLVM-IR.
This currently is required for Target kernels generated by
createOutlinedFunction to avoid subsequent optimization passes doing
some unintentional malformed optimizations for AMD kernels (unsure if it
occurs for other vendors). If the allocas are generated inside of the
kernel and are not in the entry block and are subsequently passed to a
function this can lead to required instructions being erased or
manipulated in a way that causes the kernel to run into a HSA access
error.
This fix is related to a series of problems found in:
https://github.com/llvm/llvm-project/issues/74603
This problem primarily presents itself for Flang's HLFIR AssignOp
currently, when utilised with a scalar temporary constant on the RHS and
a descriptor type on the LHS. It will generate a call to a runtime
function, wrap the RHS temporary in a newly allocated descriptor (an
llvm struct), and pass both the LHS and RHS descriptor into the runtime
function call. This will currently be
embedded into the middle of the target region in the user entry block,
which means the allocas are also embedded in the middle, which seems to
pose
issues when later passes are executed. This issue may present itself in
other HLFIR operations or unrelated operations that generate allocas as
a by product, but for the moment, this one test case is the only
scenario I've found this problem.
Perhaps this is not the appropriate fix, I am very open to other
suggestions, I've tried a few others (at varying levels of the
flang/mlir compiler flow), but this one is the smallest and least
intrusive change set. The other two, that come to mind (but I've not
fully looked into, the former I tried a little with blocks but it had a
few issues I'd need to think through):
- Having a proper alloca only block (or region) generated for TargetOps
that we could merge into the entry block that's generated by
convertTarget's createOutlinedFunction.
- Or diverging a little from Clang's current target generation and using
the CodeExtractor to generate the user code as an outlined function
region invoked from the kernel we make, with our kernel arguments passed
into it. Similar to the current parallel generation. I am not sure how
well this would intermingle with the existing parallel generation though
that's layered in.
Both of these methods seem like quite a divergence from the current
status quo, which I am not entirely sure is merited for the small test
this change aims to fix.
Commit: 25940956e68ec82d841e5748565e7250580e1d36
https://github.com/llvm/llvm-project/commit/25940956e68ec82d841e5748565e7250580e1d36
Author: Adrian Prantl <adrian-prantl at users.noreply.github.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M lldb/include/lldb/Utility/ArchSpec.h
M lldb/source/Target/Target.cpp
M lldb/source/Utility/ArchSpec.cpp
A lldb/test/API/macosx/arm64e-attach/Makefile
A lldb/test/API/macosx/arm64e-attach/TestArm64eAttach.py
A lldb/test/API/macosx/arm64e-attach/main.c
Log Message:
-----------
Replace ArchSpec::PiecewiseCompare() with Triple::operator==() (#82804)
Looking ast the definition of both functions this is *almost* an NFC
change, except that Triple also looks at the SubArch (important) and
ObjectFormat (less so).
This fixes a bug that only manifests with how Xcode uses the SBAPI to
attach to a process by name: it guesses the architecture based on the
system. If the system is arm64 and the Process is arm64e Target fails to
update the triple because it deemed the two to be equivalent.
rdar://123338218
Commit: 69c0b2febe01108f50db6e8ed21cd8b2e6088caf
https://github.com/llvm/llvm-project/commit/69c0b2febe01108f50db6e8ed21cd8b2e6088caf
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M libc/AOR_v20.02/string/arm/memchr.S
M libc/CMakeLists.txt
M libc/benchmarks/automemcpy/README.md
M libc/cmake/modules/CheckCompilerFeatures.cmake
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/cmake/modules/LLVMLibCLibraryRules.cmake
M libc/cmake/modules/LLVMLibCObjectRules.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/darwin/x86_64/entrypoints.txt
M libc/config/linux/x86_64/exclude.txt
M libc/config/windows/entrypoints.txt
M libc/docs/contributing.rst
M libc/docs/date_and_time.rst
M libc/docs/dev/clang_tidy_checks.rst
M libc/docs/dev/config_options.rst
M libc/docs/dev/printf_behavior.rst
M libc/docs/full_cross_build.rst
M libc/docs/gpu/motivation.rst
M libc/docs/gpu/rpc.rst
M libc/docs/gpu/testing.rst
M libc/docs/gpu/using.rst
M libc/docs/libc_search.rst
M libc/docs/math/index.rst
M libc/docs/math/log.rst
M libc/docs/porting.rst
M libc/docs/stdio.rst
M libc/docs/strings.rst
M libc/include/fcntl.h.def
M libc/include/sched.h.def
M libc/include/spawn.h.def
M libc/spec/bsd_ext.td
M libc/spec/gnu_ext.td
M libc/spec/llvm_libc_ext.td
M libc/spec/posix.td
M libc/src/__support/HashTable/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
M libc/src/search/hsearch/CMakeLists.txt
M libc/src/stdio/printf_core/CMakeLists.txt
M libc/src/stdio/scanf_core/CMakeLists.txt
M libc/src/stdlib/CMakeLists.txt
M libc/src/wchar/CMakeLists.txt
M libc/startup/linux/CMakeLists.txt
M libc/test/integration/scudo/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/fenv/CMakeLists.txt
M libc/test/src/math/differential_testing/CMakeLists.txt
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/utils/UnitTest/CMakeLists.txt
M libc/utils/MPFRWrapper/CMakeLists.txt
M libc/utils/gpu/server/CMakeLists.txt
M libc/utils/mathtools/GenerateHPDConstants.py
M libc/utils/mathtools/ryu_tablegen.py
Log Message:
-----------
[libc][NFC] Remove all trailing spaces from libc (#82831)
Summary:
There are a lot of random training spaces on various lines. This patch
just got rid of all of them with `sed 's/\ \+$//g'.
Commit: 87fadb3929163752f650a1fc08d5fb13ee4c1a3f
https://github.com/llvm/llvm-project/commit/87fadb3929163752f650a1fc08d5fb13ee4c1a3f
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M lldb/include/lldb/Target/Thread.h
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
Log Message:
-----------
[lldb] Correctly annotate threads at a bp site as hitting it (#82709)
This is next in my series of "fix the racey tests that fail on
greendragon" addressing the failure of TestConcurrentManyBreakpoints.py
where we set a breakpoint in a function that 100 threads execute, and we
check that we hit the breakpoint 100 times. But sometimes it is only hit
99 times, and the test fails.
When we hit a software breakpoint, the pc value for the thread is the
address of the breakpoint instruction - as if it had not been hit yet.
And because a user might ADD a breakpoint for the current pc from the
commandline, when we go to resume execution, any thread that is sitting
at a breakpoint site will be silently advanced past the breakpoint
instruction (disable bp, instruction step that thread, re-enable bp)
before resuming -- whether that thread has hit its breakpoint or not.
What this test is exposing is that there is another corner case, a
thread that is sitting at a breakpoint site but has not yet executed the
breakpoint instruction. The thread will have no stop reason, no mach
exception, so it will not be recorded as having hit the breakpoint
(because it hasn't yet). But when we resume execution, because it is
sitting at a breakpoint site, we advance past it and miss the breakpoint
hit.
In 2016 Abhishek Aggarwal handled a similar issue with a patch in
`ProcessGDBRemote::SetThreadStopInfo()`, adding a breakpoint StopInfo
for a thread sitting at a breakpoint site that has no stop reason.
debugserver's `jThreadsInfo` would not correctly execute Abhishek's code
though because it would respond with `"reason":"none"` for a thread with
no stop reason, and `SetThreadStopInfo()` expected an empty reason here.
The first part of my patch is to clear the `reason` if it is `"none"` so
we flow through the code correctly.
On Darwin, though, our stop reply packet (Txx...) includes the
`threads`, `thread-pcs`, and `jstopinfo` keys, which give us the tids
for all current threads, the pc values for those threads, and
`jstopinfo` has a JSON dictionary with the mach exceptions for all
threads that have a mach exception. In
`ProcessGDBRemote::CalculateThreadStopInfo()` we set the StopInfo for
each thread for a private stop and if we have `jstopinfo` it is the
source of all the StopInfos. I have to add the same logic here, to give
the thread a breakpoint StopInfo even though it hasn't executed the
breakpoint yet. In this case we are very early in thread construction
and I only have the information in the Txx stop reply packet -- tids,
pcs, and jstopinfo, so I can't use the normal general mechanisms of
going through the RegisterContext to get the pc, it's a bit different.
If I hack debugserver to not issue `jstopinfo`,
`CalculateThreadStopInfo` will fall back to sending `qThreadStopInfo`
for each thread and going through
`ProcessGDBRemote::SetThreadStopInfo()` to set the stop infos (and with
the `reason:none` fix, use Abhishek's code).
rdar://110549165
Commit: 3f91bdfdd50aa4eaf1d3e49cf797220cfeccaf16
https://github.com/llvm/llvm-project/commit/3f91bdfdd50aa4eaf1d3e49cf797220cfeccaf16
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M lldb/include/lldb/Utility/ArchSpec.h
M lldb/source/Target/Target.cpp
M lldb/source/Utility/ArchSpec.cpp
R lldb/test/API/macosx/arm64e-attach/Makefile
R lldb/test/API/macosx/arm64e-attach/TestArm64eAttach.py
R lldb/test/API/macosx/arm64e-attach/main.c
Log Message:
-----------
Revert "Replace ArchSpec::PiecewiseCompare() with Triple::operator==()"
This reverts commit 5e6bed8c0ea2f7fe380127763c8f753adae0fc1b while investigating the bots.
Commit: 775bd60363353b78657967c80f0f109cdb65cf8f
https://github.com/llvm/llvm-project/commit/775bd60363353b78657967c80f0f109cdb65cf8f
Author: Visoiu Mistrih Francis <890283+francisvm at users.noreply.github.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
A llvm/test/CodeGen/RISCV/cm_mvas_mvsa.mir
Log Message:
-----------
[RISCV] Add scheduling info for Zcmp (#82719)
The order of the entries in the list is:
outs, ins, Defs, Uses, implicit-defs, implicit uses, where the last two
are added programatically during codegen depending on the registers
saved/restored and are not described in the TD files.
Commit: 10c48a772742b7afe665a815b7eba2047f17dc4b
https://github.com/llvm/llvm-project/commit/10c48a772742b7afe665a815b7eba2047f17dc4b
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M llvm/cmake/modules/AddLLVM.cmake
M llvm/tools/llvm-shlib/CMakeLists.txt
Log Message:
-----------
[llvm-shlib] Change libLLVM-$MAJOR.so symlink to point to versioned SO (#82660)
This symlink was added in 91a384621e5b762d9c173ffd247cfeadd5f436a2 to
maintain backwards compatibility, but it needs to point to
libLLVM.so.$MAJOR.$MINOR rather than libLLVM.so. This works better for
distros that ship libLLVM.so and libLLVM.so.$MAJOR.$MINOR in separate
packages and also prevents mistakes like
libLLVM-19.so -> libLLVM.so -> libLLVM.so.18.1
Fixes #82647
Commit: c862e612068c9c33995a2e2d289ced44b8eba810
https://github.com/llvm/llvm-project/commit/c862e612068c9c33995a2e2d289ced44b8eba810
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
Log Message:
-----------
Revert "[RemoveDIs] Enable DPLabels conversion [3b/3] (#82639)"
This reverts commit 71d47a0b00e9f48dc740556d7f452ffadf308731 because
it causes clang to crash in some cases. See repro posted at
https://github.com/llvm/llvm-project/commit/71d47a0b00e9f48dc740556d7f452ffadf308731
Commit: 8f2bd8ae68883592a333f4bdbed9798d66e68630
https://github.com/llvm/llvm-project/commit/8f2bd8ae68883592a333f4bdbed9798d66e68630
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir
Log Message:
-----------
[AMDGPU] Introduce iglp_opt(2): Generalized exp/mfma interleaving for select kernels (#81342)
This implements the basic pipelining structure of exp/mfma interleaving
for better extensibility. While it does have improved extensibility,
there are controls which only enable it for DAGs with certain
characteristics (matching the DAGs it has been designed against).
Commit: d42de86eb37b08b3007a67650b3ca73b9ae174b1
https://github.com/llvm/llvm-project/commit/d42de86eb37b08b3007a67650b3ca73b9ae174b1
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningService.h
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
A clang/test/ClangScanDeps/optimize-canonicalize-macros.m
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
Log Message:
-----------
reland: [clang][ScanDeps] Canonicalize -D and -U flags (#82568)
Canonicalize `-D` and `-U` flags by sorting them and only keeping the
last instance of a given name.
This optimization will only fire if all `-D` and `-U` flags start with a
simple identifier that we can guarantee a simple analysis of can
determine if two flags refer to the same identifier or not. See the
comment on `getSimpleMacroName()` for details of what the issues are.
Previous version of this had issues with sed differences between macOS,
Linux, and Windows. This test doesn't check paths, so just don't run
sed.
Other tests should use `sed -E 's:\\\\?:/:g'` to get portable behavior.
Windows has different command line parsing behavior than Linux for
compilation databases, so the test has been adjusted to ignore that
difference.
Commit: de3b2c293b8bf336f8e1380148cf16b54a794c0c
https://github.com/llvm/llvm-project/commit/de3b2c293b8bf336f8e1380148cf16b54a794c0c
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSerializationKinds.td
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/test/ClangScanDeps/optimize-vfs-pch.m
M llvm/include/llvm/ADT/StringSet.h
Log Message:
-----------
[clang][ScanDeps] Allow PCHs to have different VFS overlays (#82294)
It turns out it's not that uncommon for real code to pass a different
set of VFSs while building a PCH than while using the PCH. This can
cause problems as seen in `test/ClangScanDeps/optimize-vfs-pch.m`. If
you scan `compile-commands-tu-no-vfs-error.json` without -Werror and run
the resulting commands, Clang will emit a fatal error while trying to
emit a note saying that it can't find a remapped header.
This also adds textual tracking of VFSs for prebuilt modules that are
part of an included PCH, as the same issue can occur in a module we are
building if we drop VFSs. This has to be textual because we have no
guarantee the PCH had the same list of VFSs as the current TU.
This uses the `PrebuiltModuleListener` to collect `VFSOverlayFiles`
instead of trying to extract it out of a `serialization::ModuleFile`
each time it's needed. There's not a great way to just store a pointer
to the list of strings in the serialized AST.
Commit: bfcf7a0707592ccc7fd9e805aeb36c4da3f315a6
https://github.com/llvm/llvm-project/commit/bfcf7a0707592ccc7fd9e805aeb36c4da3f315a6
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
Log Message:
-----------
[AMDGPU] Remove `hasAtomicFaddRtnForTy` as it is not used anywhere (#82841)
Commit: 31ab2c4f616d686c06e9b573c8f1a4ae7ad2d8c3
https://github.com/llvm/llvm-project/commit/31ab2c4f616d686c06e9b573c8f1a4ae7ad2d8c3
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/namelist01.f90
Log Message:
-----------
[flang] Ensure USE-associated objects can be in NAMELIST (#82846)
The name resolution for NAMELIST objects didn't allow for symbols that
are not ObjectEntityDetails symbols.
Fixes https://github.com/llvm/llvm-project/issues/82574.
Commit: b0d2a52c87b36afab4734e1810fb9266aec1128f
https://github.com/llvm/llvm-project/commit/b0d2a52c87b36afab4734e1810fb9266aec1128f
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-02-23 (Fri, 23 Feb 2024)
Changed paths:
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format][NFC] Enable RemoveSemicolon for clang-format style (#82735)
Also insert separators for decimal integers longer than 4 digits.
Commit: 330af6ed6194ca5365bc576517c247f545aee1f4
https://github.com/llvm/llvm-project/commit/330af6ed6194ca5365bc576517c247f545aee1f4
Author: MalaySanghiIntel <148750629+MalaySanghiIntel at users.noreply.github.com>
Date: 2024-02-24 (Sat, 24 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
Log Message:
-----------
Convert argument to reference. (#82741)
Avoid copy of large object
Commit: 96abee5eef31274415681018553e1d4a16dc16c9
https://github.com/llvm/llvm-project/commit/96abee5eef31274415681018553e1d4a16dc16c9
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2024-02-24 (Sat, 24 Feb 2024)
Changed paths:
M lld/test/ELF/mips-pc-relocs.s
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
A llvm/test/CodeGen/Mips/llvm-ir/forbidden-slot-ir.ll
A llvm/test/MC/Mips/forbidden-slot.s
M llvm/test/MC/Mips/mips32r6/relocations.s
M llvm/test/MC/Mips/mips64r6/relocations.s
M llvm/test/MC/Mips/relocation.s
Log Message:
-----------
[Mips] Fix unable to handle inline assembly ends with compat-branch o… (#77291)
…n MIPS
Modify:
Add a global variable 'CurForbiddenSlotAttr' to save current
instruction's forbidden slot and whether set reorder. This is the
judgment condition for whether to add nop. We would add a couple of
'.set noreorder' and '.set reorder' to wrap the current instruction and
the next instruction.
Then we can get previous instruction`s forbidden slot attribute and
whether set reorder by 'CurForbiddenSlotAttr'.
If previous instruction has forbidden slot and .set reorder is active
and current instruction is CTI. Then emit a NOP after it.
Fix https://github.com/llvm/llvm-project/issues/61045.
Because https://reviews.llvm.org/D158589 was 'Needs Review' state, not
ending, so we commit pull request again.
Commit: 91d5653e3ae9742f7fb847f809b534ee128501b0
https://github.com/llvm/llvm-project/commit/91d5653e3ae9742f7fb847f809b534ee128501b0
Author: Matthias Springer <me at m-sp.org>
Date: 2024-02-24 (Sat, 24 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
M mlir/include/mlir/Interfaces/FunctionInterfaces.td
M mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp
M mlir/lib/Conversion/ControlFlowToSCF/ControlFlowToSCF.cpp
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/lib/Conversion/SCFToSPIRV/SCFToSPIRV.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Async/IR/Async.cpp
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/SPIRV/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/Shape/IR/Shape.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
Log Message:
-----------
[mlir] Use `OpBuilder::createBlock` in op builders and patterns (#82770)
When creating a new block in (conversion) rewrite patterns,
`OpBuilder::createBlock` must be used. Otherwise, no
`notifyBlockInserted` notification is sent to the listener.
Note: The dialect conversion relies on listener notifications to keep
track of IR modifications. Creating blocks without the builder API can
lead to memory leaks during rollback.
Commit: 60a904b2ad9842b93cc5fa0ad5bda5e22c550b7e
https://github.com/llvm/llvm-project/commit/60a904b2ad9842b93cc5fa0ad5bda5e22c550b7e
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-02-24 (Sat, 24 Feb 2024)
Changed paths:
M llvm/tools/llvm-exegesis/README.md
Log Message:
-----------
[llvm-exegesis] Fix typos in README
Commit: 00c0638b5613912a7d1b65c8789bbb8ad1003115
https://github.com/llvm/llvm-project/commit/00c0638b5613912a7d1b65c8789bbb8ad1003115
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2024-02-24 (Sat, 24 Feb 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
A llvm/test/CodeGen/AArch64/arm64-fpenv.ll
M llvm/test/CodeGen/AArch64/preserve.ll
Log Message:
-----------
[AArch64] Intrinsics aarch64_{get,set}_fpsr (#81867)
Two new intrinsics are introduced to read/write FPSR. They are similar
to the existing intrinsics aarch64_{get,set}_fpcr.
Commit: 1901f442ca6374787e6810adb573d138f80893dd
https://github.com/llvm/llvm-project/commit/1901f442ca6374787e6810adb573d138f80893dd
Author: Artem Tyurin <artem.tyurin at gmail.com>
Date: 2024-02-24 (Sat, 24 Feb 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/include/llvm/Transforms/Utils/SimplifyLibCalls.h
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
A llvm/test/Transforms/InstCombine/math-odd-even-parity.ll
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
Log Message:
-----------
[InstCombine] Handle more even/odd math functions (#81324)
At the moment this PR adds support only for `erf` function.
Fixes #77220.
Commit: d877ab1b99496feb48db1158963abd130e2aee5c
https://github.com/llvm/llvm-project/commit/d877ab1b99496feb48db1158963abd130e2aee5c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-24 (Sat, 24 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineInstr.h
Log Message:
-----------
MachineInstr - update TargetRegisterInfo arguments comments. NFC.
"TargetRegisterInfo is passed" -> "TargetRegisterInfo is non-null" - matches the term in the rest of the header.
Commit: cf9201cfdbc10f4606fc4ca22bf1ccaf5ee841b3
https://github.com/llvm/llvm-project/commit/cf9201cfdbc10f4606fc4ca22bf1ccaf5ee841b3
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-02-24 (Sat, 24 Feb 2024)
Changed paths:
M llvm/include/llvm/Object/Archive.h
M llvm/lib/Object/Archive.cpp
M llvm/lib/Object/ArchiveWriter.cpp
A llvm/test/tools/llvm-ar/coff-symtab.test
M llvm/tools/llvm-ar/llvm-ar.cpp
Log Message:
-----------
[llvm-ar] Use COFF archive format for COFF targets. (#82642)
Detect COFF files by default and allow specifying it with --format
argument.
This is important for ARM64EC, which uses a separated symbol map for EC
symbols. Since K_COFF is mostly compatible with K_GNU, this shouldn't
really make a difference for other targets.
Commit: 8a5aa103c52265337b43330e55e05567046f3ede
https://github.com/llvm/llvm-project/commit/8a5aa103c52265337b43330e55e05567046f3ede
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-02-24 (Sat, 24 Feb 2024)
Changed paths:
M llvm/include/llvm/Object/Archive.h
M llvm/lib/Object/Archive.cpp
M llvm/lib/Object/ArchiveWriter.cpp
R llvm/test/tools/llvm-ar/coff-symtab.test
M llvm/tools/llvm-ar/llvm-ar.cpp
Log Message:
-----------
Revert "[llvm-ar] Use COFF archive format for COFF targets." (#82889)
Reverts llvm/llvm-project#82642 for
lld/test/ELF/invalid/Output/data-encoding.test.tmp.a failures on
Windows.
Commit: 8e22fffc85b36784146041499b716cec74285660
https://github.com/llvm/llvm-project/commit/8e22fffc85b36784146041499b716cec74285660
Author: Nathan Sidwell <nathan at acm.org>
Date: 2024-02-24 (Sat, 24 Feb 2024)
Changed paths:
M clang/docs/HLSL/ExpectedDifferences.rst
Log Message:
-----------
[clang] Remove trailing whitespace
Fix commit 66f6929fec3ae
Commit: 1e98d4883d78ac2c65b87e24694e8b2f1dc9f02d
https://github.com/llvm/llvm-project/commit/1e98d4883d78ac2c65b87e24694e8b2f1dc9f02d
Author: Quinn Dawkins <quinn.dawkins at gmail.com>
Date: 2024-02-24 (Sat, 24 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Passes.h
M mlir/include/mlir/Dialect/Linalg/Passes.td
M mlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp
M mlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp
M mlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseToLinalg.cpp
M mlir/lib/Dialect/Linalg/Transforms/Generalization.cpp
M mlir/lib/Dialect/Linalg/Transforms/InlineScalarOperands.cpp
M mlir/lib/Dialect/Linalg/Transforms/Loops.cpp
M mlir/lib/Dialect/Linalg/Transforms/NamedOpConversions.cpp
M mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
Log Message:
-----------
[mlir][linalg] NFC: Use tablegen macro for pass constructors (#82892)
This uses the tablegen macros for generating pass constructors, exposing
pass options for fold-unit-extent-dims and linalg-detensorize.
Additionally aligns some of the pass namings to their text counterpart.
This includes an API change:
createLinalgGeneralizationPass -> createLinalgGeneralizeNamedOpsPass
Commit: 7b9504fc012e8b96c2bca9d641e16f719696d723
https://github.com/llvm/llvm-project/commit/7b9504fc012e8b96c2bca9d641e16f719696d723
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M llvm/test/Instrumentation/InstrProfiling/mcdc.ll
Log Message:
-----------
test: Refine InstrProfiling/mcdc.ll
Commit: cc53707a5c104eb7789829ecdb2e3ae2be1a42da
https://github.com/llvm/llvm-project/commit/cc53707a5c104eb7789829ecdb2e3ae2be1a42da
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M clang/test/Profile/c-mcdc-class.cpp
M clang/test/Profile/c-mcdc-logicalop-ternary.c
M clang/test/Profile/c-mcdc-nested-ternary.c
M clang/test/Profile/c-mcdc-not.c
M clang/test/Profile/c-mcdc.c
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/test/Instrumentation/InstrProfiling/mcdc.ll
Log Message:
-----------
LLVMInstrumentation: Simplify mcdc.tvbitmap.update with GEP.
Commit: a4096eaeb63e7086a2e0a32bd69523c1fa72db3e
https://github.com/llvm/llvm-project/commit/a4096eaeb63e7086a2e0a32bd69523c1fa72db3e
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
Log Message:
-----------
[AArch64] Add FPSR to reserved registers (#82907)
This is follow-up of #81867. FPSR was not added to reserved registers,
this resulted in machine verifier fails.
Commit: a8c3b3e20db01d2947dbe87d0c557150ed777865
https://github.com/llvm/llvm-project/commit/a8c3b3e20db01d2947dbe87d0c557150ed777865
Author: Mingming Liu <mingmingl at google.com>
Date: 2024-02-24 (Sat, 24 Feb 2024)
Changed paths:
M compiler-rt/include/profile/InstrProfData.inc
M llvm/include/llvm/ProfileData/InstrProfData.inc
Log Message:
-----------
[nfc][compiler-rt]Replace Type::getInt8PtrTy with PointerType::getUnqual as a clean-up (#82434)
This is a follow up of
https://github.com/llvm/llvm-project/commit/7b9d73c2f90c0ed8497339a16fc39785349d9610
and
https://github.com/llvm/llvm-project/commit/5ef9ba74120dcc2da70ec25571d459f81ab8a705
* The definition of `Type::getInt8PtrTy` is deleted. This doesn't cause
a compile error because the `Initializer` part of the macro doesn't run.
Commit: 3b27cc2ceec265d751c909c431ed62c0d7ed9b51
https://github.com/llvm/llvm-project/commit/3b27cc2ceec265d751c909c431ed62c0d7ed9b51
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M llvm/test/tools/llvm-cov/Inputs/mcdc-const.o
M llvm/test/tools/llvm-cov/Inputs/mcdc-general.o
M llvm/test/tools/llvm-cov/Inputs/mcdc-macro.o
M llvm/test/tools/llvm-cov/Inputs/mcdc-maxbs.o
M llvm/test/tools/llvm-cov/mcdc-macro.test
M llvm/test/tools/llvm-cov/mcdc-maxbs.test
Log Message:
-----------
Regenerate llvm-cov tests
Commit: 1f6a347c8abf8868fb4630c404480226c2efc2c2
https://github.com/llvm/llvm-project/commit/1f6a347c8abf8868fb4630c404480226c2efc2c2
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/CodeGen/CodeGenPGO.h
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/MCDCState.h
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
Log Message:
-----------
Refactor: Let MCDC::State have DecisionByStmt and BranchByStmt
- Prune `RegionMCDCBitmapMap` and `RegionCondIDMap`. They are handled
by `MCDCState`.
- Rename `s/BitmapMap/DecisionByStmt/`. It can handle Decision stuff.
- Rename `s/CondIDMap/BranchByStmt/`. It can be handle Branch stuff.
- `MCDCRecordProcessor`: Use `DecisionParams.BitmapIdx` directly.
Commit: 12d29cd171fdf20ab8a516998ad6be0d24a9c050
https://github.com/llvm/llvm-project/commit/12d29cd171fdf20ab8a516998ad6be0d24a9c050
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/overflow.ll
Log Message:
-----------
test overflow intrinsics
Commit: 85da9f80b89be7b96bc1b22909062286fab9dc31
https://github.com/llvm/llvm-project/commit/85da9f80b89be7b96bc1b22909062286fab9dc31
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Remove unused VPTransformState::VPValue2Value (NFCI).
Clean up unused member variable.
Commit: 4bf06c16fcddcfcea332069bdde5cbf1401513cf
https://github.com/llvm/llvm-project/commit/4bf06c16fcddcfcea332069bdde5cbf1401513cf
Author: Martin Wehking <martin.wehking at codeplay.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
Log Message:
-----------
Initialize unsigned integer when declared (#81894)
Initialize ModOpcode directly before the loop execution to silence
static analyzer warnings about the usage of an uninitialized variable.
This leads to a redundant assignment of ElV2F16 inside the first loop
execution, but also avoids superfluous emptiness checks of EltsV2F16
after the first execution of the loop.
Commit: fe42e72db29e48aa81eac2aa922afd90a7f01517
https://github.com/llvm/llvm-project/commit/fe42e72db29e48aa81eac2aa922afd90a7f01517
Author: Rishabh Bali <rishabhsbali at gmail.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
A llvm/include/llvm/CodeGen/AtomicExpand.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/ARC/ARCTargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/M68k/M68kTargetMachine.cpp
M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
M llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
M llvm/lib/Target/VE/VETargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/XCore/XCoreTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/private-memory-atomics.ll
M llvm/test/Transforms/AtomicExpand/AArch64/atomicrmw-fp.ll
M llvm/test/Transforms/AtomicExpand/AArch64/expand-atomicrmw-xchg-fp.ll
M llvm/test/Transforms/AtomicExpand/AArch64/pcsections.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i8-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i8.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd-flat-specialization.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fmax.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fmin.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fsub.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-nand.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-simplify-cfg-CAS-block.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/unaligned-atomic.ll
M llvm/test/Transforms/AtomicExpand/ARM/atomic-expansion-v7.ll
M llvm/test/Transforms/AtomicExpand/ARM/atomic-expansion-v8.ll
M llvm/test/Transforms/AtomicExpand/ARM/atomicrmw-fp.ll
M llvm/test/Transforms/AtomicExpand/ARM/cmpxchg-weak.ll
M llvm/test/Transforms/AtomicExpand/Hexagon/atomicrmw-fp.ll
M llvm/test/Transforms/AtomicExpand/LoongArch/atomicrmw-fp.ll
M llvm/test/Transforms/AtomicExpand/LoongArch/load-store-atomic.ll
M llvm/test/Transforms/AtomicExpand/Mips/atomicrmw-fp.ll
M llvm/test/Transforms/AtomicExpand/PowerPC/atomicrmw-fp.ll
M llvm/test/Transforms/AtomicExpand/PowerPC/cfence-double.ll
M llvm/test/Transforms/AtomicExpand/PowerPC/cfence-float.ll
M llvm/test/Transforms/AtomicExpand/PowerPC/cmpxchg.ll
M llvm/test/Transforms/AtomicExpand/PowerPC/issue55983.ll
M llvm/test/Transforms/AtomicExpand/RISCV/atomicrmw-fp.ll
M llvm/test/Transforms/AtomicExpand/SPARC/libcalls.ll
M llvm/test/Transforms/AtomicExpand/SPARC/partword.ll
M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-libcall.ll
M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-non-integer.ll
M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-rmw-fp.ll
M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-rmw-initial-load.ll
M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-xchg-fp.ll
M llvm/tools/opt/optdriver.cpp
Log Message:
-----------
[CodeGen] Port AtomicExpand to new Pass Manager (#71220)
Port the `atomicexpand` pass to the new Pass Manager.
Fixes #64559
Commit: 711014714716753f791291ed6a152e00899469a3
https://github.com/llvm/llvm-project/commit/711014714716753f791291ed6a152e00899469a3
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M clang/test/CodeGen/tbaa-struct.cpp
Log Message:
-----------
[TBAA] Test for tbaa.struct creation for struct with named bitfields.
Add test for tbaa.struct metadata creation for copies of a struct with
named bitfields.
Test for https://github.com/llvm/llvm-project/issues/82586.
Commit: f920b746ea818f1d21f317116cbb105e3e85979a
https://github.com/llvm/llvm-project/commit/f920b746ea818f1d21f317116cbb105e3e85979a
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Utils/FlattenCFG.cpp
M llvm/test/Transforms/Util/flatten-cfg.ll
Log Message:
-----------
[FlattenCFG] Fix the miscompilation where phi nodes exist in the merge point (#81987)
When there are phi nodes in the merge point of the if-region, we cannot
do the merge.
Alive2: https://alive2.llvm.org/ce/z/DbgEan
Fixes #70900.
Commit: 9e7c0b1385baa1acffb62e0589ff100dd972cc0d
https://github.com/llvm/llvm-project/commit/9e7c0b1385baa1acffb62e0589ff100dd972cc0d
Author: David CARLIER <devnexen at gmail.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M openmp/runtime/cmake/LibompHandleFlags.cmake
M openmp/runtime/src/z_Linux_util.cpp
Log Message:
-----------
[OpenMP] Implement __kmp_is_address_mapped on DragonFlyBSD. (#82895)
implement internal __kmp_is_address_mapped.
Commit: 8eb6757564ccea8f9fc3bb75480f1c1d1784415a
https://github.com/llvm/llvm-project/commit/8eb6757564ccea8f9fc3bb75480f1c1d1784415a
Author: Dani <daniel.kiss at arm.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M llvm/include/llvm/IR/Attributes.td
M llvm/lib/IR/Attributes.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
Log Message:
-----------
[NFC] Turn the StrictFP attribute check to a CompatRule. (#82600)
Commit: 2c5a68858b046c8a2ca3ba07ecd82771a5a9b884
https://github.com/llvm/llvm-project/commit/2c5a68858b046c8a2ca3ba07ecd82771a5a9b884
Author: Owen Anderson <resistor at mac.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
Log Message:
-----------
Fix non-splat vector SREM expansion when one of the divisors is a power of two. (#82706)
The expansion previously used, derived from Hacker's Delight,
does not work correctly when the dividend is INT_MIN and the
divisor is a power of two. We now use an alternate derivation
of the A and Q constants specifically for the power-of-two divisor
case to avoid this problem. Credit to Fabian Giesen for the
new derivation.
Fixes https://github.com/llvm/llvm-project/issues/77169
Commit: d6ded91121fa02837ef6c8c7f06d98ccf4a0fe16
https://github.com/llvm/llvm-project/commit/d6ded91121fa02837ef6c8c7f06d98ccf4a0fe16
Author: David Green <david.green at arm.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
Log Message:
-----------
[Codegen] Change getSpillSize/getReloadSize to LocationSize. NFC (#82636)
This is a small part of #70452, attempting to take a small simpler part
of it in isolation to simplify what remains. It changes the getSpillSize,
getFoldedSpillSize, getRestoreSize and getFoldedRestoreSize methods to return
optional<LocationSize> instead of unsigned. The code is intended to be the
same, keeping the optional<> to specify when there was no size found, with some
minor adjustments to make sure that unknown (~UINT64_C(0)) sizes are handled
sensibly. Hopefully as more unsigned's are converted to LocationSize's the use
of ~UINT64_C(0) can be cleaned up too.
Commit: 411c5dde59fa4c427941143ca0ec8cd8fdaee407
https://github.com/llvm/llvm-project/commit/411c5dde59fa4c427941143ca0ec8cd8fdaee407
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/FunctionPointer.h
M clang/lib/AST/Interp/Interp.h
M clang/test/AST/Interp/functions.cpp
Log Message:
-----------
[clang][Interp] Handle null function pointers
We were instead asserting that they are non-null before.
Commit: 8dfc023e80c35aded33b3e5e4739d3a487b95a7a
https://github.com/llvm/llvm-project/commit/8dfc023e80c35aded33b3e5e4739d3a487b95a7a
Author: Alexander Scholz <duddel at users.noreply.github.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M clang-tools-extra/clang-tidy/tool/run-clang-tidy.py
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[run-clang-tidy.py] Add option to ignore source files from compilation database (#82416)
I added the option -source-filter to the
`run-clang-tidy.py` script in the clang-tools-extra.
This option allows for handing over a regex, to filter out source files
from the compilation database (not run `clang-tidy` on them).
Commit: cb4f94db83d9c4373b485493ef079e318f63bf13
https://github.com/llvm/llvm-project/commit/cb4f94db83d9c4373b485493ef079e318f63bf13
Author: SingleAccretion <62474226+SingleAccretion at users.noreply.github.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M lld/docs/WebAssembly.rst
M lld/test/wasm/data-layout.s
M lld/wasm/Config.h
M lld/wasm/Driver.cpp
M lld/wasm/Options.td
M lld/wasm/Writer.cpp
Log Message:
-----------
[lld][WebAssembly] Add `--no-growable-memory` (#82890)
We recently added `--initial-heap` - an option that allows one to up the
initial memory size without the burden of having to know exactly how
much is needed.
However, in the process of implementing support for this in Emscripten
(https://github.com/emscripten-core/emscripten/pull/21071), we have
realized that `--initial-heap` cannot support the use-case of
non-growable memories by itself, since with it we don't know what to set
`--max-memory` to.
We have thus agreed to move the above work forward by introducing
another option to the linker (see
https://github.com/emscripten-core/emscripten/pull/21071#discussion_r1491755616),
one that would allow users to explicitly specify they want a
non-growable memory.
This change does this by introducing `--no-growable-memory`: an option
that is mutally exclusive with `--max-memory` (for simplicity - we can
also decide that it should override or be overridable by `--max-memory`.
In Emscripten a similar mix of options results in `--no-growable-memory`
taking precedence). The option specifies that the maximum memory size
should be set to the initial memory size, effectively disallowing memory
growth.
Closes #81932.
Commit: d99b1481770e4f8454c7f238dcd40c8e977e6b70
https://github.com/llvm/llvm-project/commit/d99b1481770e4f8454c7f238dcd40c8e977e6b70
Author: FruitClover <m.kashkarov at samsung.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M llvm/test/TableGen/directive1.td
M llvm/test/TableGen/directive2.td
M llvm/utils/TableGen/DirectiveEmitter.cpp
Log Message:
-----------
[TableGen] Fix __CLAUSE_NO_CLASS macro leak in directive emitter (#82912)
`__CLAUSE_NO_CLASS` was not undefined inside the
`GEN_CLANG_CLAUSE_CLASS` block, resulting in macro redifinition warnings
when several generated directives are used simultaneously.
Commit: ac9e67756e0157793d565c2cceaf82e4403f58ba
https://github.com/llvm/llvm-project/commit/ac9e67756e0157793d565c2cceaf82e4403f58ba
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
[ValueTracking][NFC] Early exit when enumerating guaranteed well-defined/non-poison operands. (#82812)
According to the [coverage
result](https://dtcxzyw.github.io/llvm-opt-benchmark/coverage/home/dtcxzyw/llvm-project/llvm/lib/Analysis/ValueTracking.cpp.html#L7193)
on my benchmark, `llvm::mustTriggerUB` returns true with an average of
35.0M/12.3M=2.85 matches. I think we can stop enumerating when one of
the matches succeeds to avoid filling the temporary buffer
`NonPoisonOps`.
This patch introduces two template functions
`handleGuaranteedWellDefinedOps/handleGuaranteedNonPoisonOps`. They will
pass well-defined/non-poison operands to inlinable callbacks `Handle`.
If the callback returns true, stop processing and return true.
Otherwise, return false.
Compile-time improvement:
https://llvm-compile-time-tracker.com/compare.php?from=13acb3af5ad48e850cf37dcf02270ede3f267bd4&to=2b55f513c1b6dd2732cb79a25f3eaf6c5e4d6619&stat=instructions:u
|stage1-O3|stage1-ReleaseThinLTO|stage1-ReleaseLTO-g|stage1-O0-g|stage2-O3|stage2-O0-g|stage2-clang|
|--|--|--|--|--|--|--|
|-0.03%|-0.04%|-0.06%|-0.03%|-0.05%|+0.03%|-0.02%|
Commit: eca0bd171e6ab0f1c60e3950f5fa5fa1eaf1fa32
https://github.com/llvm/llvm-project/commit/eca0bd171e6ab0f1c60e3950f5fa5fa1eaf1fa32
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/known-bits.ll
Log Message:
-----------
[ValueTracking] Add tests for tracking `(and/or cond0, cond1)` on both sides of branch; NFC
Commit: 6f9b0a7095cbb7781e1f387f99d5725c950ce79b
https://github.com/llvm/llvm-project/commit/6f9b0a7095cbb7781e1f387f99d5725c950ce79b
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M llvm/lib/Analysis/DomConditionCache.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/known-bits.ll
Log Message:
-----------
[ValueTracking] Compute knownbits for `(and/or cond0, cond1)` on both sides of branch
The false branch for `and` and true branch for `or` provide less
information (intersection as opposed to union), but still can give
some useful information.
Closes #82818
Commit: 641d160ad236fb7a472a9eedbda2d62541e7dd0c
https://github.com/llvm/llvm-project/commit/641d160ad236fb7a472a9eedbda2d62541e7dd0c
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/minmax-fold.ll
M llvm/test/Transforms/InstCombine/select_meta.ll
Log Message:
-----------
[InstCombine] Fold umax(smax)/smin(umin) with non-negative constants (#82929)
This patch extends `reassociateMinMaxWithConstants` to fold the
following patterns:
```
umax (smax X, nneg C0), nneg C1 --> smax X, (umax C0, C1)
smin (umin X, nneg C0), nneg C1 --> umin X, (smin/umin C0, C1)
```
Alive2: https://alive2.llvm.org/ce/z/wfEj-e
Address the comment
https://github.com/llvm/llvm-project/pull/82472#pullrequestreview-1896922897.
Commit: 529b5705db2ccefeee2c9b8cb5144e1f5a6420de
https://github.com/llvm/llvm-project/commit/529b5705db2ccefeee2c9b8cb5144e1f5a6420de
Author: David CARLIER <devnexen at gmail.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_getauxval.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
Log Message:
-----------
Revert "[compiler-rt] simplifying ::ReExec for freebsd. (#79711)" (#82933)
This reverts commit 691b12a2dcc12fa43517d23f2a9b6039616eebc8.
Commit: 085f9b0d146fc99bbb0e193593aad696fc50a056
https://github.com/llvm/llvm-project/commit/085f9b0d146fc99bbb0e193593aad696fc50a056
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/include/clang/Format/Format.h
Log Message:
-----------
[clang-format][doc] Update documentation for RemoveSemicolon
Commit: da092e8808319b572fa9fea7eb74e55e7434a8b2
https://github.com/llvm/llvm-project/commit/da092e8808319b572fa9fea7eb74e55e7434a8b2
Author: Matteo Franciolini <mfranciolini at tesla.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M mlir/lib/Bytecode/Reader/BytecodeReader.cpp
Log Message:
-----------
Fix bytecode roundtrip of unregistered ops (#82932)
When roundtripping to bytecode an unregistered operation name that does
not contain any '.' separator, the bytecode writer will emit an op
encoding without a proper opName. In this case, the string just becomes
a possibly unknown dialect name. At parsing, this dialect name is
used as a proper operation name.
However, when the unregistered operation name coincidentally matches
that of a dialect, the parser would fail. That means we can't roundtrip
an unregistered op with a name that matches one of the registered
dialect names. For example,
```
"index"() : () -> ()
```
can be emitted but cannot be parsed, because its name is coincidentally
the same as that of the Index dialect. The patch removes such
inconsistency.
This patch specifically fixes the bytecode roundtrip of
`mlir/test/IR/parser.mlir`.
Commit: bc6b5be6a298ab094d1bb41f393ca422feddd298
https://github.com/llvm/llvm-project/commit/bc6b5be6a298ab094d1bb41f393ca422feddd298
Author: Matteo Franciolini <mfranciolini at tesla.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M mlir/test/lib/Dialect/Test/TestAttributes.cpp
Log Message:
-----------
Fix TestI64ElementsAttr printer (#82931)
This enables to correctly roundtrip the attribute to text or bytecode.
Commit: 1d5e3b2d6559a853c544099e4cf1d46f44f83368
https://github.com/llvm/llvm-project/commit/1d5e3b2d6559a853c544099e4cf1d46f44f83368
Author: tw-ilson <63574793+tw-ilson at users.noreply.github.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/AtomicOps.cpp
M mlir/lib/Dialect/SPIRV/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/SPIRV/IR/GroupOps.cpp
M mlir/lib/Dialect/SPIRV/IR/IntegerDotProductOps.cpp
M mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVParsingUtils.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVParsingUtils.h
Log Message:
-----------
[mlir][spirv] Use ODS generated attribute names for op definitions (#81552)
Since ODS generates getters functions for SPIRV operations' attribute
names, we replace instances of these hardcoded strings in the SPIR-V
dialect's op parser/printer with function calls for consistency.
Fixes https://github.com/llvm/llvm-project/issues/77627
---------
Co-authored-by: Lei Zhang <antiagainst at gmail.com>
Commit: 44b096682791518a36a4b59bd0f3538b1aa0f666
https://github.com/llvm/llvm-project/commit/44b096682791518a36a4b59bd0f3538b1aa0f666
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M mlir/unittests/Target/LLVM/SerializeROCDLTarget.cpp
Log Message:
-----------
Apply clang-tidy fixes for modernize-use-override in SerializeROCDLTarget.cpp (NFC)
Commit: 97678078442adbd6c12cc54f7a36152f8873afb4
https://github.com/llvm/llvm-project/commit/97678078442adbd6c12cc54f7a36152f8873afb4
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M mlir/unittests/Target/LLVM/SerializeROCDLTarget.cpp
Log Message:
-----------
Apply clang-tidy fixes for readability-container-size-empty in SerializeROCDLTarget.cpp (NFC)
Commit: b1d1f5786fc24fa538b064e7b27f07a1765fce35
https://github.com/llvm/llvm-project/commit/b1d1f5786fc24fa538b064e7b27f07a1765fce35
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M mlir/unittests/Target/LLVM/SerializeToLLVMBitcode.cpp
Log Message:
-----------
Apply clang-tidy fixes for modernize-use-override in SerializeToLLVMBitcode.cpp (NFC)
Commit: c67a4ae47c86f1f390db7ba0ea9c021abff130f8
https://github.com/llvm/llvm-project/commit/c67a4ae47c86f1f390db7ba0ea9c021abff130f8
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M mlir/unittests/Target/LLVM/SerializeToLLVMBitcode.cpp
Log Message:
-----------
Apply clang-tidy fixes for readability-container-size-empty in SerializeToLLVMBitcode.cpp (NFC)
Commit: 0f02431273faa2cd001c59fd5de767659bc0c976
https://github.com/llvm/llvm-project/commit/0f02431273faa2cd001c59fd5de767659bc0c976
Author: Kai Luo <lkail at cn.ibm.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
A llvm/test/Transforms/InstCombine/sub-xor-cmp.ll
Log Message:
-----------
[InstCombine] Fold (sub (xor X, (sext C)), (sext C)) => (select C (neg X), X) (#79417)
This is useful when computing absdiff.
Correctness prove: https://alive2.llvm.org/ce/z/eMbxps,
https://alive2.llvm.org/ce/z/SNCWJe.
---------
Co-authored-by: Yingwei Zheng <dtcxzyw at qq.com>
Commit: 8be39b3901e3326ceebeaf0381f8cc57fdc0d464
https://github.com/llvm/llvm-project/commit/8be39b3901e3326ceebeaf0381f8cc57fdc0d464
Author: hev <wangrui at loongson.cn>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/test/CodeGen/LoongArch/intrinsic-memcpy.ll
Log Message:
-----------
[LoongArch] Improve pattern matching for AddLike predicate (#82767)
This commit updates the pattern matching logic for the `AddLike`
predicate in `LoongArchInstrInfo.td` to use the
`isBaseWithConstantOffset` function provided by `CurDAG`. This
optimization aims to improve the efficiency of pattern matching by
identifying cases where the operation can be represented as a base
address plus a constant offset, which can lead to more efficient code
generation.
Commit: c087bebb02ef35021547c6ddf0a3fdf1cbc8ad17
https://github.com/llvm/llvm-project/commit/c087bebb02ef35021547c6ddf0a3fdf1cbc8ad17
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
M llvm/unittests/ProfileData/CoverageMappingTest.cpp
Log Message:
-----------
Introduce mcdc::TVIdxBuilder (LLVM side, NFC) (#80676)
This is a preparation of incoming Clang changes (#82448) and just checks
`TVIdx` is calculated correctly. NFC.
`TVIdxBuilder` calculates deterministic Indices for each Condition Node.
It is used for `clang` to emit `TestVector` indices (aka ID) and for
`llvm-cov` to reconstruct `TestVectors`.
This includes the unittest `CoverageMappingTest.TVIdxBuilder`.
See also
https://discourse.llvm.org/t/rfc-coverage-new-algorithm-and-file-format-for-mc-dc/76798
Commit: ce4da0c4ee6e414ddb771d45b68bc7e31b12970e
https://github.com/llvm/llvm-project/commit/ce4da0c4ee6e414ddb771d45b68bc7e31b12970e
Author: Matteo Franciolini <mfranciolini at tesla.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
Log Message:
-----------
Enables textual IR roundtripping through `--verifyRoundtrip` (#82946)
The patch enables roundtrip to textual file when running
`--verifyRoundtrip`. The verification is successful if both textual and
bytecode formats can roundtrip successfully.
Commit: e5332482c6009699d7b66393617a389d8ae62710
https://github.com/llvm/llvm-project/commit/e5332482c6009699d7b66393617a389d8ae62710
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAttributes.td
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/test/Dialect/SPIRV/IR/function-decorations.mlir
M mlir/test/Dialect/SPIRV/IR/structure-ops.mlir
M mlir/test/Target/SPIRV/decorations.mlir
M mlir/test/Target/SPIRV/function-decorations.mlir
M mlir/test/Target/SPIRV/global-variable.mlir
Log Message:
-----------
[MLIR][Spirv] Use StringAttr for linkage_name (NFC) (#82953)
std::string was used here, likely by mistake. The usual convention for
attributes is to use StringAttr.
Commit: f75c6ed93e785c09884a317ce2bfd440e7f8f573
https://github.com/llvm/llvm-project/commit/f75c6ed93e785c09884a317ce2bfd440e7f8f573
Author: Jason Eckhardt <jeckhardt at nvidia.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/utils/TableGen/CodeGenHwModes.h
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen] Efficiency improvements for encoding HwMode collection. (#82902)
Currently the DecoderEmitter spends a fair amount of cycles performing
repeated linear walks over the entire instruction list. This patch
eliminates one such walk during HwMode collection for EncodingInfos.
The eliminated traversal visits every instruction and then every
EncodingInfos entry for that instruction merely to collect all
referenced HwModes. That information already happens to be present in
the HwModeSelects created during the one-time construction of
CodeGenHwModes. We instead traverse the HwModeSelects, collecting each
one referenced as an encoding select. This set is a small constant in
size and does not generally grow with the size of the instruction set.
Commit: 8c5e9cf737138aba22a4a8f64ef2c5efc80dd7f9
https://github.com/llvm/llvm-project/commit/8c5e9cf737138aba22a4a8f64ef2c5efc80dd7f9
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/lib/AST/CMakeLists.txt
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/Function.h
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/Interp.h
A clang/lib/AST/Interp/InterpShared.cpp
A clang/lib/AST/Interp/InterpShared.h
M clang/lib/AST/Interp/Opcodes.td
A clang/test/AST/Interp/nullable.cpp
M clang/test/Sema/attr-nonnull.c
M clang/test/SemaCXX/attr-nonnull.cpp
Log Message:
-----------
[clang][Interp] Implement nullability argument checking
Implement constexpr checking for null pointers being passed to
arguments annotated as nonnull.
Commit: 16d0592dda89495afdbefa5c57eb006559a59465
https://github.com/llvm/llvm-project/commit/16d0592dda89495afdbefa5c57eb006559a59465
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-02-25 (Sun, 25 Feb 2024)
Changed paths:
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
Log Message:
-----------
[llvm-exegesis] Remove exegesis prefix in exegesis namespace (#82871)
This patch removes the exegesis:: prefix within the exegesis namespace
in llvm-exegesis.cpp as it isn't necessary due to the code already being
wrapped in the namespace.
Commit: cace477c0b6c3d9494ead66eb725c6e72f27b767
https://github.com/llvm/llvm-project/commit/cace477c0b6c3d9494ead66eb725c6e72f27b767
Author: Dominik Wójt <dominik.wojt at arm.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
M clang/test/Driver/print-multi-selection-flags.c
Log Message:
-----------
[clang][AArch64] multilib: fix deduction of "-march=" option (#81474)
The deduced "-march=" option always started with aarch64, which is not a
valid value. There was also no way to distinguish between armv8-r and
armv8-a. After this commit, the deduced "-march=" option will start with
greatest available "armv*-a" value or "armv8-r".
Commit: 0c7a605ada6cb392e6e8c16dbccf2b7e59017399
https://github.com/llvm/llvm-project/commit/0c7a605ada6cb392e6e8c16dbccf2b7e59017399
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/lib/CodeGen/CoverageMappingGen.cpp
Log Message:
-----------
clangCodeGen: [MC/DC] Refactor CoverageGen.
- Introduce `createDecision(E)` for the root node of `VisitBin`.
- Handle `mcdc::DecisionParameters` for each Decision method.
Commit: 892b4beeac50920e630f10905b2916295e2eb6d8
https://github.com/llvm/llvm-project/commit/892b4beeac50920e630f10905b2916295e2eb6d8
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
A llvm/test/Transforms/GVN/pr82884.ll
Log Message:
-----------
[GVN] Drop nsw/nuw flags when replacing the result of a with.overflow intrinsic with a overflowing binary operator (#82935)
Alive2: https://alive2.llvm.org/ce/z/gyL7mn
Fixes https://github.com/llvm/llvm-project/issues/82884.
Commit: 15426017bda54fb8d9a62cb887edae754e8b7733
https://github.com/llvm/llvm-project/commit/15426017bda54fb8d9a62cb887edae754e8b7733
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/complex.cpp
Log Message:
-----------
[clang][Interp] Handle non-complex operands in complex bin ops
Either LHS or RHS might be non-complex, but not both.
Commit: 4216a300e324d58bb6f0efcc8b2490e6c6983ae8
https://github.com/llvm/llvm-project/commit/4216a300e324d58bb6f0efcc8b2490e6c6983ae8
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV][NFC] Use sub to construct RVV registers without V0 (#82962)
This reduces some lines.
Commit: e510fc77539022c195cc83b5dceb1c0b493dafcb
https://github.com/llvm/llvm-project/commit/e510fc77539022c195cc83b5dceb1c0b493dafcb
Author: Yeting Kuo <46629943+yetingk at users.noreply.github.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/VPIntrinsics.def
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/IR/IntrinsicInst.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint-vp.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint-vp.ll
A llvm/test/CodeGen/RISCV/rvv/llrint-vp.ll
A llvm/test/CodeGen/RISCV/rvv/lrint-vp.ll
M llvm/unittests/IR/VPIntrinsicTest.cpp
Log Message:
-----------
[VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (#82627)
RISC-V implements vector lrint/llrint by vfcvt.x.f.v.
Commit: 56b63e0886ba369a53df5e1d429cde2e4a2d4a34
https://github.com/llvm/llvm-project/commit/56b63e0886ba369a53df5e1d429cde2e4a2d4a34
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.h
M clang/test/SemaCXX/compare-modules-cxx2a.cpp
Log Message:
-----------
[clang][Interp] Get <=> value info from weak result
This is also what the current interpreter does and a couple of
test cases expect that.
Commit: 94ca854d3c874322b1d4b5606c5762adcd3b8e05
https://github.com/llvm/llvm-project/commit/94ca854d3c874322b1d4b5606c5762adcd3b8e05
Author: Clement Courbet <courbet at google.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.cpp
M clang-tools-extra/clang-tidy/utils/DeclRefExprUtils.cpp
M clang-tools-extra/clang-tidy/utils/DeclRefExprUtils.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-copy-initialization.cpp
M clang-tools-extra/unittests/clang-tidy/DeclRefExprUtilsTest.cpp
Log Message:
-----------
[clang-tidy] Add support for determining constness of more expressions. (#82617)
This uses a more systematic approach for determining whcich
`DeclRefExpr`s mutate the underlying object: Instead of using a few
matchers, we walk up the AST until we find a parent that we can prove
cannot change the underlying object.
This allows us to handle most address taking and dereference, bindings
to value and const& variables, and track constness of pointee (see
changes in DeclRefExprUtilsTest.cpp).
This allows supporting more patterns in
`performance-unnecessary-copy-initialization`.
Those two patterns are relatively common:
```
const auto e = (*vector_ptr)[i]
```
and
```
const auto e = vector_ptr->at(i);
```
In our codebase, we have around 25% additional findings from
`performance-unnecessary-copy-initialization` with this change. I did
not see any additional false positives.
Commit: 60677110a2e0b7ba9f5bf2fcfc1b3f8888eb7f58
https://github.com/llvm/llvm-project/commit/60677110a2e0b7ba9f5bf2fcfc1b3f8888eb7f58
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/include/llvm/IR/DebugInfo.h
M llvm/lib/IR/DebugInfo.cpp
Log Message:
-----------
[RemoveDIs] Fix DPLabel crash reported in #82854
Commit: 3356818eed3224c50012f8ed2bfa046f2bc8e154
https://github.com/llvm/llvm-project/commit/3356818eed3224c50012f8ed2bfa046f2bc8e154
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
Log Message:
-----------
Reapply [RemoveDIs] Enable DPLabels conversion [3b/3] (#82639)
Enables conversion between llvm.dbg.label and DPLabel.
Commit: cb2dd0282cf2f5dfc58d5a060dd2aa73c3b4c08e
https://github.com/llvm/llvm-project/commit/cb2dd0282cf2f5dfc58d5a060dd2aa73c3b4c08e
Author: Nathan Sidwell <nathan at acm.org>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/lib/CodeGen/CGRecordLayoutBuilder.cpp
Log Message:
-----------
[clang][NFC] constify or staticify some CGRecordLowering fns (#82874)
Some CGRecordLowering functions either do not need the object or do not mutate it. Thus marking static or const as appropriate.
Commit: 8cfb71613c452dd45a84a74affe8464bfd33de02
https://github.com/llvm/llvm-project/commit/8cfb71613c452dd45a84a74affe8464bfd33de02
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp
M mlir/test/Dialect/ArmSME/vector-legalization.mlir
Log Message:
-----------
[mlir][ArmSME] Replace use of `isa` with `isa_and_present` (#82798)
`op` can be null here, in which case this should just return a null
value back.
Commit: e521752c04a479e3751003645a728667f3199d24
https://github.com/llvm/llvm-project/commit/e521752c04a479e3751003645a728667f3199d24
Author: Michael Halkenhäuser <MichaelGerald.Halkenhauser at amd.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M openmp/libomptarget/include/OpenMP/OMPT/Interface.h
M openmp/libomptarget/src/OpenMP/OMPT/Callback.cpp
M openmp/libomptarget/src/device.cpp
M openmp/libomptarget/test/ompt/callbacks.h
M openmp/libomptarget/test/ompt/target_memcpy.c
A openmp/libomptarget/test/ompt/target_memcpy_emi.c
Log Message:
-----------
[OpenMP][OMPT] Add OMPT callback for device data exchange 'Device-to-Device' (#81991)
Since there's no `ompt_target_data_transfer_tofrom_device` (within
ompt_target_data_op_t enum) or something other that conveys the meaning
of inter-device data exchange we decided to indicate a Device-to-Device
transfer by using: optype == ompt_target_data_transfer_from_device (=3)
Hence, a device transfer may be identified e.g. by checking for: (optype
== 3) &&
(src_device_num < omp_get_num_devices()) &&
(dest_device_num < omp_get_num_devices())
Fixes: #66478
Commit: a5ccf8522b96c56fc6bda54cf68a64c5d65b75cb
https://github.com/llvm/llvm-project/commit/a5ccf8522b96c56fc6bda54cf68a64c5d65b75cb
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/complex.cpp
Log Message:
-----------
[clang][Interp] Not all RVO call expressions are initializing
We do not necessarily prepare storage for the return value when
we are returning a complex value.
Commit: 73f11f9579a3206608ad9a07b5793ba451676087
https://github.com/llvm/llvm-project/commit/73f11f9579a3206608ad9a07b5793ba451676087
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M lldb/test/API/lldbtest.py
Log Message:
-----------
[lldb][test] Correct results regex for Windows
On Windows the line has \r\n at the end.
Commit: 53697a5dcdc4d83cbe0cb6d88e33c3f1bb3ea487
https://github.com/llvm/llvm-project/commit/53697a5dcdc4d83cbe0cb6d88e33c3f1bb3ea487
Author: Diana Picus <Diana-Magda.Picus at amd.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.cpp
Log Message:
-----------
[AMDGPU] Refactor unit test. NFC (#82976)
I'm about to add more tests here (downstream for now).
Change-Id: Ibd5edb398f544c90e6e8b5e49b1777a407f0594a
Commit: d0c99f4b1ddc55f3af2ee2d084bc8c97a2ab1acf
https://github.com/llvm/llvm-project/commit/d0c99f4b1ddc55f3af2ee2d084bc8c97a2ab1acf
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M libcxx/include/__type_traits/invoke.h
Log Message:
-----------
[libc++] Remove __member_pointer_traits_imp (#82081)
They aren't ever used, so they can be removed.
Commit: d0b1fec9e1510d01dad2c9c429573eaa75f0963c
https://github.com/llvm/llvm-project/commit/d0b1fec9e1510d01dad2c9c429573eaa75f0963c
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M lldb/test/API/functionalities/thread/state/TestThreadStates.py
Log Message:
-----------
[lldb][test][Windows] Remove expected fail for a thread state test
No idea why but this is now passing (though if it randomly fails
I won't be surprised).
See https://github.com/llvm/llvm-project/issues/25034 for background
on the original expected fail.
Commit: bb87c914fec6526fbda81991ce0d35e60040ab9f
https://github.com/llvm/llvm-project/commit/bb87c914fec6526fbda81991ce0d35e60040ab9f
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/test/MC/AArch64/SVE/cntb-diagnostics.s
M llvm/test/MC/AArch64/SVE/ptrue-diagnostics.s
Log Message:
-----------
[AArch64][SVE]Add error message in the AsmParser for SVEPattern (#82668)
All assembly instructions that have an operand using sve_pred_enum and
mistakenly use '#' in front of it would fail without an error message.
Commit: b4b490496ab8994fee41005471d075812bdb3a65
https://github.com/llvm/llvm-project/commit/b4b490496ab8994fee41005471d075812bdb3a65
Author: Luke Lau <luke at igalia.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Log Message:
-----------
[RISCV] Fix insert_subvector with fixed vector type creating invalid node (#82975)
If the vector type is a fixed vector type, we convert it to a container
scalable vector type to compute its reg class. But we need to keep the
old
fixed type so we create a result node with the same type.
This code path is currently dead so I haven't been able to create a test
case
for it. But I have an upcoming patch for insert_subvector lowering that
will
exercise this.
Commit: 954a048d0d03d874d214cbe9ce0da456a0da35d3
https://github.com/llvm/llvm-project/commit/954a048d0d03d874d214cbe9ce0da456a0da35d3
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/branch-fold-dbg.ll
Log Message:
-----------
[RemoveDIs] Fix SimplifyCFG behaviour to match existing behaviour (#82981)
llvm.dbg.labels are deleted in SpeculativelyExecuteBB so DPLabels should
be too.
Modify existing test to check this (NB I couldn't find a dedicated
debug-info test that checks this behaviour).
Commit: 3d084e37ab038200df5f5ef371fdea2fcda05680
https://github.com/llvm/llvm-project/commit/3d084e37ab038200df5f5ef371fdea2fcda05680
Author: Luke Lau <luke at igalia.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-concat.ll
Log Message:
-----------
[RISCV] Add tests for fixed length concat_vector. NFC
These shufflevector chains will get combined into a n-ary concat_vectors node.
Commit: 28233408a2c8670d7d94ae1bf18a2bb5f7194c32
https://github.com/llvm/llvm-project/commit/28233408a2c8670d7d94ae1bf18a2bb5f7194c32
Author: Jack Styles <99514724+Stylie777 at users.noreply.github.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGen.cpp
A llvm/lib/CodeGen/InitUndef.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMSubtarget.h
M llvm/lib/Target/RISCV/CMakeLists.txt
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
R llvm/lib/Target/RISCV/RISCVRVVInitUndef.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/ARM/O3-pipeline.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/O0-pipeline.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/rvv/handle-noreg-with-implicit-def.mir
M llvm/test/CodeGen/RISCV/rvv/subregister-undef-early-clobber.mir
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir
M llvm/test/CodeGen/Thumb2/mve-intrinsics/vcaddq.ll
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving-cost.ll
M llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
M llvm/test/CodeGen/Thumb2/mve-vmull-splat.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
Log Message:
-----------
[CodeGen] [ARM] Make RISC-V Init Undef Pass Target Independent and add support for the ARM Architecture. (#77770)
When using Greedy Register Allocation, there are times where
early-clobber values are ignored, and assigned the same register. This
is illeagal behaviour for these intructions. To get around this, using
Pseudo instructions for early-clobber registers gives them a definition
and allows Greedy to assign them to a different register. This then
meets the ARM Architecture Reference Manual and matches the defined
behaviour.
This patch takes the existing RISC-V patch and makes it target
independent, then adds support for the ARM Architecture. Doing this will
ensure early-clobber restraints are followed when using the ARM
Architecture. Making the pass target independent will also open up
possibility that support other architectures can be added in the future.
Commit: af971396a9c77a57eb66fcb7eac3f671a7084680
https://github.com/llvm/llvm-project/commit/af971396a9c77a57eb66fcb7eac3f671a7084680
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/SemaCXX/cxx1z-lambda-star-this.cpp
Log Message:
-----------
[clang][Interp] Handle missing Lambda field initializer
Commit: 8779cf68e80dcc0b15e8034f39e6ce18b08352b6
https://github.com/llvm/llvm-project/commit/8779cf68e80dcc0b15e8034f39e6ce18b08352b6
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
A llvm/test/CodeGen/ARM/ldst-opt-lr-restored.ll
Log Message:
-----------
Pre-commit test showing bug #80287
This test shows the bug where LR is used as a general-purpose register
on a code path where it is not spilled to the stack.
Commit: 749384c08e042739342c88b521c8ba5dac1b9276
https://github.com/llvm/llvm-project/commit/749384c08e042739342c88b521c8ba5dac1b9276
Author: ostannard <oliver.stannard at arm.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.h
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/test/CodeGen/ARM/ldst-opt-lr-restored.ll
Log Message:
-----------
[ARM] Update IsRestored for LR based on all returns (#82745)
PR #75527 fixed ARMFrameLowering to set the IsRestored flag for LR based
on all of the return instructions in the function, not just one.
However, there is also code in ARMLoadStoreOptimizer which changes
return instructions, but it set IsRestored based on the one instruction
it changed, not the whole function.
The fix is to factor out the code added in #75527, and also call it from
ARMLoadStoreOptimizer if it made a change to return instructions.
Fixes #80287.
Commit: 76dd4bc036f4709f7c28e38e5ae12ade8f07e8c5
https://github.com/llvm/llvm-project/commit/76dd4bc036f4709f7c28e38e5ae12ade8f07e8c5
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/Instructions.h
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Instructions.cpp
Log Message:
-----------
[RemoveDIs] Add iterator-taking constructors and Create methods (#82778)
Part of removing debug-intrinsics from LLVM requires using iterators
whenever we insert an instruction into a block. That means we need all
instruction constructors and factory functions to have an iterator
taking option, which this patch adds.
The whole of this patch should be NFC: it's adding new flavours of
existing constructors, and plumbing those through to the Instruction
constructor that takes iterators. It's almost entirely boilerplate
copy-and-paste too.
Commit: f290c000d87bfc72a31b151dffa2d190596ebe91
https://github.com/llvm/llvm-project/commit/f290c000d87bfc72a31b151dffa2d190596ebe91
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/test/CodeGen/tbaa-struct.cpp
Log Message:
-----------
[TBAA] Add additional bitfield tests.
Additional test for https://github.com/llvm/llvm-project/pull/82922/.
Commit: 433f8e741e7d4a5b7dad3e078dd847efa6afee5e
https://github.com/llvm/llvm-project/commit/433f8e741e7d4a5b7dad3e078dd847efa6afee5e
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineSSAUpdater.h
M llvm/lib/CodeGen/MachineSSAUpdater.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
Log Message:
-----------
MachineSSAUpdater: use all vreg attributes instead of reg class only (#78431)
When initializing MachineSSAUpdater save all attributes of current
virtual register and create new virtual registers with same attributes.
Now new virtual registers have same both register class or bank and LLT.
Previously new virtual registers had same register class but LLT was not
set (LLT was set to default/empty LLT).
Required by GlobalISel for AMDGPU, new 'lane mask' virtual registers
created by MachineSSAUpdater need to have both register class and LLT.
patch 4 from: https://github.com/llvm/llvm-project/pull/73337
Commit: 58aa995baf66fffb1284ecb289dc9f02c70de4fa
https://github.com/llvm/llvm-project/commit/58aa995baf66fffb1284ecb289dc9f02c70de4fa
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.h
Log Message:
-----------
[clang][Interp][NFC] Fix comment typo
Commit: a35599b9ae5e7ad924b78c65f6348e0b711bad5d
https://github.com/llvm/llvm-project/commit/a35599b9ae5e7ad924b78c65f6348e0b711bad5d
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/Context.cpp
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/test/AST/Interp/atomic.c
Log Message:
-----------
[clang][Interp] Implement a few _is_lock_free builtins
Implementation looks similar to the one in the current interpreter.
Except for three static assertions, test/Sema/atomic-ops.c works.
Commit: 60e7ae3f30e99423cf779c9d05513d2ae18df5aa
https://github.com/llvm/llvm-project/commit/60e7ae3f30e99423cf779c9d05513d2ae18df5aa
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
Log Message:
-----------
[AMDGPU] Only try DecoderTables for the current subtarget. NFCI. (#82992)
Speed up disassembly by only calling tryDecodeInst for DecoderTables
that make sense for the current subtarget.
This gives a 1.3x speed-up on check-llvm-mc-disassembler-amdgpu in my
Release+Asserts build.
Commit: 96e536ecf5e6202089ee10ca81c38fbce70851d7
https://github.com/llvm/llvm-project/commit/96e536ecf5e6202089ee10ca81c38fbce70851d7
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/DataflowValues.h
Log Message:
-----------
[clang][NFC] Prefer usings over typedefs (#82920)
Commit: c4e94633e8a48ee33115d5d3161ee142fc1c9700
https://github.com/llvm/llvm-project/commit/c4e94633e8a48ee33115d5d3161ee142fc1c9700
Author: Samira Bazuzi <bazuzi at google.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/unittests/Analysis/FlowSensitive/TestingSupport.h
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
Revert "[clang][dataflow] Correctly handle `InitListExpr` of union type." (#82856)
Reverts llvm/llvm-project#82348, which caused crashes when analyzing
empty InitListExprs for unions, e.g.
```cc
union U {
double double_value;
int int_value;
};
void target() {
U value;
value = {};
}
```
Co-authored-by: Samira Bazuzi <bazuzi at users.noreply.github.com>
Commit: d41615e91a108bd1ae41361be97c569691ab9ebb
https://github.com/llvm/llvm-project/commit/d41615e91a108bd1ae41361be97c569691ab9ebb
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/DSInstructions.td
Log Message:
-----------
[AMDGPU] Rename a DS class template argument. NFC.
The name hasGDS better reflects what it is used for.
Commit: 9c5ca6b0ce2fc91561708542163fae1db88c59e8
https://github.com/llvm/llvm-project/commit/9c5ca6b0ce2fc91561708542163fae1db88c59e8
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
Log Message:
-----------
Revert "Enable JumpTableToSwitch pass by default (#82546)"
This reverts commit 1069823ce7d154aa8ef87ae5a0fd34b527eca2a0.
This has caused second stage timeouts when building Flang on
AArch64:
https://lab.llvm.org/buildbot/#/builders/179/builds/9442
Commit: 046682ef88a254443e8620bfd48b35bfa0a83809
https://github.com/llvm/llvm-project/commit/046682ef88a254443e8620bfd48b35bfa0a83809
Author: Hirofumi Nakamura <k.nakamura.hirofumi at gmail.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/include/clang/Format/Format.h
M clang/lib/Format/Format.cpp
M clang/lib/Format/WhitespaceManager.cpp
M clang/lib/Format/WhitespaceManager.h
M clang/unittests/Format/FormatTestTableGen.cpp
Log Message:
-----------
[clang-format] Add AlignConsecutiveTableGenCondOperatorColons option. (#82878)
To align colons inside TableGen !cond operators.
Commit: 440b1743ee0c8bfb7bf0c4b503bde5ab9af88dc0
https://github.com/llvm/llvm-project/commit/440b1743ee0c8bfb7bf0c4b503bde5ab9af88dc0
Author: Egor Zhdan <e_zhdan at apple.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/CMakeLists.txt
A clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/SemaTemplate.cpp
Log Message:
-----------
[APINotes] Upstream Sema logic to apply API Notes to decls
This upstreams more of the Clang API Notes functionality that is
currently implemented in the Apple fork:
https://github.com/apple/llvm-project/tree/next/clang/lib/APINotes
This was extracted from a larger PR:
https://github.com/llvm/llvm-project/pull/73017
Commit: 285bff39fd283b3a9a27c06525111d8d4f474e6e
https://github.com/llvm/llvm-project/commit/285bff39fd283b3a9a27c06525111d8d4f474e6e
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M lldb/test/API/functionalities/thread/state/TestThreadStates.py
Log Message:
-----------
[lldb][test][Windows] Skip thread state test on Windows
This actually passes on Windows but I don't know how to convey
that with an xfail without clashing with the xfail for all
platforms.
At least this avoids a UPASS.
Commit: 8ce81e5924935436d49e0b4e835fa107531505b5
https://github.com/llvm/llvm-project/commit/8ce81e5924935436d49e0b4e835fa107531505b5
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
Log Message:
-----------
[lldb][test][Windows] Don't assert that module cache is empty
For whatever reason on Windows, it is not at this point.
The copy of unit test we used to use would ignore failures during
teardown but Python's does not.
Commit: 668cd1ca15a8b9c60a87e5244db9c97b3ba2e624
https://github.com/llvm/llvm-project/commit/668cd1ca15a8b9c60a87e5244db9c97b3ba2e624
Author: Erich Keane <ekeane at nvidia.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Scope.h
M clang/lib/Sema/SemaStmt.cpp
M clang/test/SemaOpenACC/no-branch-in-out.c
A clang/test/SemaOpenACC/no-branch-in-out.cpp
Log Message:
-----------
[OpenACC] Implement 'return' branch-out of Compute Construct (#82814)
Like with 'break'/'continue', returning out of a compute construct is
ill-formed, so this implements the diagnostic. However, unlike the
OpenMP implementation of this same diagnostic, OpenACC doesn't have a
concept of 'capture region', so this is implemented as just checking the
'scope'.
Commit: 7c52d0c98187b55d2f513122c21daf49d88169a6
https://github.com/llvm/llvm-project/commit/7c52d0c98187b55d2f513122c21daf49d88169a6
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/test/AST/Interp/atomic.c
Log Message:
-----------
[clang][Interp] Try to atomic.c on Mac
This test was broken on MacOS, see the discussion in
https://github.com/llvm/llvm-project/commit/a35599b9ae5e7ad924b78c65f6348e0b711bad5d
Commit: ce78dfa4f0470d79979818e322e76050fb082f4e
https://github.com/llvm/llvm-project/commit/ce78dfa4f0470d79979818e322e76050fb082f4e
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port 28233408a2c8
Commit: 62e88bc89a718ed557784afb2572e1e664cfd94e
https://github.com/llvm/llvm-project/commit/62e88bc89a718ed557784afb2572e1e664cfd94e
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
Log Message:
-----------
[gn build] Port 440b1743ee0c
Commit: f887fad547c7103c05f33be81fecc03782216ce6
https://github.com/llvm/llvm-project/commit/f887fad547c7103c05f33be81fecc03782216ce6
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn
Log Message:
-----------
[gn build] Port 8c5e9cf73713
Commit: ac86a76ed5ac968914dd13fc6b6b76c337728098
https://github.com/llvm/llvm-project/commit/ac86a76ed5ac968914dd13fc6b6b76c337728098
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
R utils/bazel/crash-f7dbdb2b330aad91f520099159e736e91bb9ddbf
Log Message:
-----------
[libc][NFC] Delete unused file (#82980)
Indentified in
https://github.com/llvm/llvm-project/pull/77741#pullrequestreview-1893531270
Commit: 83feb846482f0100cb29d460d3d8de2690fc32ad
https://github.com/llvm/llvm-project/commit/83feb846482f0100cb29d460d3d8de2690fc32ad
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/DSInstructions.td
Log Message:
-----------
[AMDGPU] Reduce duplication in DS Real instruction definitions. NFC. (#83007)
For renamed instructions, there is no need to mention the new name twice
on every line defining a Real.
Commit: 9cfb138eccb83b5876928b08be346fde5ca78b47
https://github.com/llvm/llvm-project/commit/9cfb138eccb83b5876928b08be346fde5ca78b47
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
A clang/test/CXX/except/except.spec/p13.cpp
M clang/test/SemaTemplate/class-template-noexcept.cpp
Log Message:
-----------
[Clang][Sema] Defer instantiation of exception specification until after partial ordering when determining primary template (#82417)
Consider the following:
```
struct A {
static constexpr bool x = true;
};
template<typename T, typename U>
void f(T, U) noexcept(T::y); // #1, error: no member named 'y' in 'A'
template<typename T, typename U>
void f(T, U*) noexcept(T::x); // #2
template<>
void f(A, int*) noexcept; // explicit specialization of #2
```
We currently instantiate the exception specification of all candidate
function template specializations when deducting template arguments for
an explicit specialization, which results in a error despite `#1` not
being selected by partial ordering as the most specialized template.
According to [except.spec] p13:
> An exception specification is considered to be needed when:
> - [...]
> - the exception specification is compared to that of another
declaration (e.g., an explicit specialization or an overriding virtual
function);
Assuming that "comparing declarations" means "determining whether the
declarations correspond and declare the same entity" (per [basic.scope.scope] p4 and
[basic.link] p11.1, respectively), the exception specification does _not_ need to be
instantiated until _after_ partial ordering, at which point we determine
whether the implicitly instantiated specialization and the explicit
specialization declare the same entity (the determination of whether two
functions/function templates correspond does not consider the exception
specifications).
This patch defers the instantiation of the exception specification until
a single function template specialization is selected via partial
ordering, matching the behavior of GCC, EDG, and
MSVC: see https://godbolt.org/z/Ebb6GTcWE.
Commit: 969d7ecf0b1d51e04e774b0695ffc1d04af81bde
https://github.com/llvm/llvm-project/commit/969d7ecf0b1d51e04e774b0695ffc1d04af81bde
Author: Francesco Petrogalli <francesco.petrogalli at apple.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
Log Message:
-----------
[llvm][CodeGen] Add ValueType v3i1. [NFCI] (#82338)
Commit: 1253e535bd421b955cce1c67ed4304f2ae9bcdfd
https://github.com/llvm/llvm-project/commit/1253e535bd421b955cce1c67ed4304f2ae9bcdfd
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
Log Message:
-----------
[RemoveDIs] Use iterators for moving PHIs in loop-unroll-and-jam (#83003)
With no debug intrinsics, correctly identifying the start of a block
with iterators becomes important. We need to use the iterator-returning
methods here in loop-unroll-and-jam where we're shifting PHIs around.
Otherwise they can be inserted after debug-info records, leading to
debug-info attached to PHIs, which is ill formed.
Fixes #83000
Commit: b5048700fc31f3bf6dd32ace7730815d4cfef411
https://github.com/llvm/llvm-project/commit/b5048700fc31f3bf6dd32ace7730815d4cfef411
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/c.c
Log Message:
-----------
[clang][Interp] Fix lvalue CompoundLiteralExprs
We need to leave a pointer on the stack for them, even if their
type is primitive.
Commit: 252f1cdebfffd846afe969d3f6e4684ed39536ad
https://github.com/llvm/llvm-project/commit/252f1cdebfffd846afe969d3f6e4684ed39536ad
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
R lldb/third_party/Python/module/progress/progress.py
R lldb/third_party/Python/module/unittest2/unittest2/__init__.py
R lldb/third_party/Python/module/unittest2/unittest2/__main__.py
R lldb/third_party/Python/module/unittest2/unittest2/case.py
R lldb/third_party/Python/module/unittest2/unittest2/collector.py
R lldb/third_party/Python/module/unittest2/unittest2/compatibility.py
R lldb/third_party/Python/module/unittest2/unittest2/loader.py
R lldb/third_party/Python/module/unittest2/unittest2/main.py
R lldb/third_party/Python/module/unittest2/unittest2/result.py
R lldb/third_party/Python/module/unittest2/unittest2/runner.py
R lldb/third_party/Python/module/unittest2/unittest2/signals.py
R lldb/third_party/Python/module/unittest2/unittest2/suite.py
R lldb/third_party/Python/module/unittest2/unittest2/test/__init__.py
R lldb/third_party/Python/module/unittest2/unittest2/test/dummy.py
R lldb/third_party/Python/module/unittest2/unittest2/test/support.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_assertions.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_break.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_case.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_discovery.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_functiontestcase.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_loader.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_new_tests.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_program.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_result.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_runner.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_setups.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_skipping.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_suite.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_unittest2_with.py
R lldb/third_party/Python/module/unittest2/unittest2/util.py
Log Message:
-----------
[lldb][test] Remove vendored packages `unittest2` and `progress` (#82670)
The `unittest2` package is unused since
5b386158aacac4b41126983a5379d36ed413d0ea.
The `progress` package was only used internally by `unittest2`, so it
can be deleted as well.
Commit: 264d828ea6399c31c210b67a050fbf084634da6a
https://github.com/llvm/llvm-project/commit/264d828ea6399c31c210b67a050fbf084634da6a
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/test/CodeGen/ms-intrinsics-other.c
Log Message:
-----------
[clang][Interp][NFC] Redo returning values from builtin functions
Instead of having retInt/retLong/retSizeT/etc., just add retInteger,
which takes an APSInt and returns it in form of the given QualType.
This makes the code a little neater, but is also necessary since
some builtins have a different return type with -fms-extensions.
Commit: f54004475110bb0a4033261041594266c8296242
https://github.com/llvm/llvm-project/commit/f54004475110bb0a4033261041594266c8296242
Author: mmoadeli <mahmoud.moadeli at codeplay.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/test/CodeGenSYCL/address-space-conversions.cpp
A clang/test/CodeGenSYCL/amd-address-space-conversions.cpp
A clang/test/CodeGenSYCL/cuda-address-space-conversions.cpp
Log Message:
-----------
[NVPTX][AMDGPU][CodeGen] Fix `local_space nullptr` handling for NVPTX and local/private `nullptr` value for AMDGPU. (#78759)
- Address space cast of nullptr in local_space into a generic_space for
the CUDA backend. The reason for this cast was having invalid local
memory base address for the associated variable.
- In the context of AMD GPU, assigns a NULL value as ~0 for the address
spaces of sycl_local and sycl_private to match the ones for opencl_local
and opencl_private.
Commit: ebb64d8370f9f425f10c4b084aa62adc2926e2dd
https://github.com/llvm/llvm-project/commit/ebb64d8370f9f425f10c4b084aa62adc2926e2dd
Author: Owen Anderson <resistor at mac.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-select.mir
M llvm/test/CodeGen/AArch64/cmp-chains.ll
Log Message:
-----------
[GlobalISel] Make the Combiner insert G_FREEZE when converting G_SELECT to binary operations. (#82733)
This is needed because the binary operators (G_OR and G_AND) do
not have the poison-suppressing semantics of G_SELECT.
Fixes https://github.com/llvm/llvm-project/issues/72475
Commit: c27d7085d4d5c640aba4992f5d01c0ffd1da9860
https://github.com/llvm/llvm-project/commit/c27d7085d4d5c640aba4992f5d01c0ffd1da9860
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/test/CodeGen/ms-intrinsics-other.c
Log Message:
-----------
[clang][test] Undo an accidental test change
This was introduced in 264d828ea6399c31c210b67a050fbf084634da6a.
Commit: 2730a5c68c6986bc8f01d047f8f31bcfd9316333
https://github.com/llvm/llvm-project/commit/2730a5c68c6986bc8f01d047f8f31bcfd9316333
Author: Samira Bazuzi <bazuzi at google.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
[clang][dataflow] Skip array types when handling InitListExprs. (#83013)
Crashes resulted from single-element InitListExprs for arrays with
elements of a record type after #80970.
Commit: b2ebd8b89777a1c5ba6acc4ad9f195ea2ad5f0de
https://github.com/llvm/llvm-project/commit/b2ebd8b89777a1c5ba6acc4ad9f195ea2ad5f0de
Author: Krasimir Georgiev <krasimir at google.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/unittests/Serialization/ModuleCacheTest.cpp
M clang/unittests/Serialization/VarDeclConstantInitTest.cpp
Log Message:
-----------
clang serialization unittests: fix some leaks (#82773)
No functional changes intended.
Fixes some leaks found by running under asan with `--gtest_repeat=2`.
Commit: 82acec15afeb2bcba534a333c89cea33da7ffa47
https://github.com/llvm/llvm-project/commit/82acec15afeb2bcba534a333c89cea33da7ffa47
Author: Farzon Lotfi <1802579+farzonl at users.noreply.github.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Sema/Sema.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGenHLSL/builtins/dot-builtin.hlsl
A clang/test/CodeGenHLSL/builtins/dot.hlsl
A clang/test/SemaHLSL/BuiltIns/dot-errors.hlsl
M clang/test/SemaHLSL/OverloadResolutionBugs.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
Log Message:
-----------
[HLSL] Implementation of dot intrinsic (#81190)
This change implements https://github.com/llvm/llvm-project/issues/70073
HLSL has a dot intrinsic defined here:
https://learn.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-dot
The intrinsic itself is defined as a HLSL_LANG LangBuiltin in
Builtins.td.
This is used to associate all the dot product typdef defined
hlsl_intrinsics.h
with a single intrinsic check in CGBuiltin.cpp & SemaChecking.cpp.
In IntrinsicsDirectX.td we define the llvmIR for the dot product.
A few goals were in mind for this IR. First it should operate on only
vectors. Second the return type should be the vector element type. Third
the second parameter vector should be of the same size as the first
parameter. Finally `a dot b` should be the same as `b dot a`.
In CGBuiltin.cpp hlsl has built on top of existing clang intrinsics via
EmitBuiltinExpr. Dot
product though is language specific intrinsic and so is guarded behind
getLangOpts().HLSL.
The call chain looks like this: EmitBuiltinExpr -> EmitHLSLBuiltinExp
EmitHLSLBuiltinExp dot product intrinsics makes a destinction
between vectors and scalars. This is because HLSL supports dot product
on scalars which simplifies down to multiply.
Sema.h & SemaChecking.cpp saw the addition of
CheckHLSLBuiltinFunctionCall, a language specific semantic validation
that can be expanded for other hlsl specific intrinsics.
Fixes #70073
Commit: 45732b64542e37f4908ced2477a25b7a0d703893
https://github.com/llvm/llvm-project/commit/45732b64542e37f4908ced2477a25b7a0d703893
Author: Matthias Springer <me at m-sp.org>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms] Fix compile time regression in dialect conversion (#83023)
The dialect conversion does not directly erase ops that are
replaced/erased with a rewriter. Instead, the op stays in place and is
erased at the end if the dialect conversion succeeds. However, ops that
were replaced/erased are ignored from that point on.
#81757 introduced a compile time regression that made the check whether
an op is ignored or not more expensive. Whether an op is ignored or not
is queried many times throughout a dialect conversion, so the check must
be fast.
After this change, replaced ops are stored in the `ignoredOps` set. This
also simplifies the dialect conversion a bit.
Commit: 1d2eced0067bea989e98efc9265725b3aeca0af9
https://github.com/llvm/llvm-project/commit/1d2eced0067bea989e98efc9265725b3aeca0af9
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M llvm/docs/GettingStarted.rst
Log Message:
-----------
[llvm][docs] Update the Python version requirement to 3.8.0 for lit testing on Windows with substitute (virtual) drives. (#81663)
Following the changes made for:
- https://reviews.llvm.org/D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations
in commit:
- 05d613ea931b6de1b46dfe04b8e55285359047f4
Python 3.8.0 or newer is now required by at least the following tests
when they are run on Windows from a substitute (virtual) drive. A
substitute drive is often used as a workaround for `MAX_PATH`
limitations on Windows. These tests are impacted because they use the
lit `%{?:real}` path expansion syntax to expand symbolic links and
substitute drives. This path expansion is implemented with Python's
`os.path.realpath()` function which changed behavior in Python 3.8.0
with regard to expansion of substitute drives. The changes mentioned
above rely on the newer Python behavior.
- `clang/test/Lexer/case-insensitive-include-absolute.c`
- `clang/test/Lexer/case-insensitive-include-win.c`
This change updates the LLVM Getting Started guide to note this newer
Python version dependency for this relatively niche case. Python 3.6.0
remains the minimum required Python version otherwise.
Commit: 4bc3b3501ff994fb3504ed2b973342821a9c8cea
https://github.com/llvm/llvm-project/commit/4bc3b3501ff994fb3504ed2b973342821a9c8cea
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
A lld/docs/ELF/large_section_layout_nopic.png
A lld/docs/ELF/large_section_layout_pic.png
A lld/docs/ELF/large_sections.rst
A lld/docs/ELF/section_layout.png
M lld/docs/index.rst
Log Message:
-----------
[lld/ELF] Add documentation on large sections (#82560)
Fixes #82438
Commit: 312592a03a25198cbe72d43175e80c66f7e81336
https://github.com/llvm/llvm-project/commit/312592a03a25198cbe72d43175e80c66f7e81336
Author: Paul Kirth <paulkirth at google.com>
Date: 2024-02-26 (Mon, 26 Feb 2024)
Changed paths:
M clang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.cpp
M clang-tools-extra/clang-tidy/tool/run-clang-tidy.py
M clang-tools-extra/clang-tidy/utils/DeclRefExprUtils.cpp
M clang-tools-extra/clang-tidy/utils/DeclRefExprUtils.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-copy-initialization.cpp
M clang-tools-extra/unittests/clang-tidy/DeclRefExprUtilsTest.cpp
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/HLSL/ExpectedDifferences.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h
M clang/include/clang/Analysis/FlowSensitive/DataflowValues.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/DiagnosticSerializationKinds.td
M clang/include/clang/Format/Format.h
M clang/include/clang/Sema/Scope.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningService.h
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/AST/CMakeLists.txt
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/Context.cpp
M clang/lib/AST/Interp/Function.h
M clang/lib/AST/Interp/FunctionPointer.h
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/InterpBuiltin.cpp
A clang/lib/AST/Interp/InterpShared.cpp
A clang/lib/AST/Interp/InterpShared.h
M clang/lib/AST/Interp/Opcodes.td
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGRecordLayoutBuilder.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/CodeGen/CodeGenPGO.h
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/MCDCState.h
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/WhitespaceManager.cpp
M clang/lib/Format/WhitespaceManager.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/CMakeLists.txt
A clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/test/AST/Interp/atomic.c
M clang/test/AST/Interp/c.c
M clang/test/AST/Interp/complex.cpp
M clang/test/AST/Interp/functions.cpp
A clang/test/AST/Interp/nullable.cpp
A clang/test/CXX/except/except.spec/p13.cpp
A clang/test/ClangScanDeps/optimize-canonicalize-macros.m
M clang/test/ClangScanDeps/optimize-vfs-pch.m
M clang/test/CodeGen/tbaa-struct.cpp
A clang/test/CodeGenHLSL/builtins/dot-builtin.hlsl
A clang/test/CodeGenHLSL/builtins/dot.hlsl
M clang/test/CodeGenSYCL/address-space-conversions.cpp
A clang/test/CodeGenSYCL/amd-address-space-conversions.cpp
A clang/test/CodeGenSYCL/cuda-address-space-conversions.cpp
M clang/test/Driver/gpu-libc-headers.c
M clang/test/Driver/print-multi-selection-flags.c
M clang/test/Profile/c-mcdc-class.cpp
M clang/test/Profile/c-mcdc-logicalop-ternary.c
M clang/test/Profile/c-mcdc-nested-ternary.c
M clang/test/Profile/c-mcdc-not.c
M clang/test/Profile/c-mcdc.c
M clang/test/Sema/attr-nonnull.c
M clang/test/SemaCXX/attr-nonnull.cpp
M clang/test/SemaCXX/compare-modules-cxx2a.cpp
M clang/test/SemaCXX/cxx1z-lambda-star-this.cpp
A clang/test/SemaHLSL/BuiltIns/dot-errors.hlsl
M clang/test/SemaHLSL/OverloadResolutionBugs.hlsl
M clang/test/SemaOpenACC/no-branch-in-out.c
A clang/test/SemaOpenACC/no-branch-in-out.cpp
M clang/test/SemaTemplate/class-template-noexcept.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/unittests/Analysis/FlowSensitive/TestingSupport.h
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestTableGen.cpp
M clang/unittests/Serialization/ModuleCacheTest.cpp
M clang/unittests/Serialization/VarDeclConstantInitTest.cpp
M compiler-rt/include/profile/InstrProfData.inc
M compiler-rt/lib/sanitizer_common/sanitizer_getauxval.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/definable.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Lower/CUDA/cuda-data-attribute.cuf
M flang/test/Semantics/cuf03.cuf
M flang/test/Semantics/namelist01.f90
M flang/tools/bbc/bbc.cpp
M libc/AOR_v20.02/string/arm/memchr.S
M libc/CMakeLists.txt
M libc/benchmarks/automemcpy/README.md
M libc/cmake/modules/CheckCompilerFeatures.cmake
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/cmake/modules/LLVMLibCLibraryRules.cmake
M libc/cmake/modules/LLVMLibCObjectRules.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/cmake/modules/prepare_libc_gpu_build.cmake
M libc/config/darwin/x86_64/entrypoints.txt
M libc/config/linux/x86_64/exclude.txt
M libc/config/windows/entrypoints.txt
M libc/docs/contributing.rst
M libc/docs/date_and_time.rst
M libc/docs/dev/clang_tidy_checks.rst
M libc/docs/dev/config_options.rst
M libc/docs/dev/printf_behavior.rst
M libc/docs/full_cross_build.rst
M libc/docs/gpu/motivation.rst
M libc/docs/gpu/rpc.rst
M libc/docs/gpu/testing.rst
M libc/docs/gpu/using.rst
M libc/docs/libc_search.rst
M libc/docs/math/index.rst
M libc/docs/math/log.rst
M libc/docs/porting.rst
M libc/docs/stdio.rst
M libc/docs/strings.rst
M libc/include/fcntl.h.def
M libc/include/sched.h.def
M libc/include/spawn.h.def
M libc/lib/CMakeLists.txt
M libc/spec/bsd_ext.td
M libc/spec/gnu_ext.td
M libc/spec/llvm_libc_ext.td
M libc/spec/posix.td
M libc/src/__support/HashTable/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
M libc/src/search/hsearch/CMakeLists.txt
M libc/src/stdio/printf_core/CMakeLists.txt
M libc/src/stdio/scanf_core/CMakeLists.txt
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/atexit.cpp
M libc/src/wchar/CMakeLists.txt
M libc/startup/linux/CMakeLists.txt
M libc/test/integration/scudo/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/fenv/CMakeLists.txt
M libc/test/src/math/differential_testing/CMakeLists.txt
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/utils/UnitTest/CMakeLists.txt
M libc/utils/MPFRWrapper/CMakeLists.txt
M libc/utils/gpu/loader/Loader.h
M libc/utils/gpu/server/CMakeLists.txt
A libc/utils/gpu/server/llvmlibc_rpc_server.h
M libc/utils/gpu/server/rpc_server.cpp
R libc/utils/gpu/server/rpc_server.h
M libc/utils/mathtools/GenerateHPDConstants.py
M libc/utils/mathtools/ryu_tablegen.py
M libcxx/include/__type_traits/invoke.h
A lld/docs/ELF/large_section_layout_nopic.png
A lld/docs/ELF/large_section_layout_pic.png
A lld/docs/ELF/large_sections.rst
A lld/docs/ELF/section_layout.png
M lld/docs/WebAssembly.rst
M lld/docs/index.rst
M lld/test/ELF/mips-pc-relocs.s
M lld/test/wasm/data-layout.s
M lld/wasm/Config.h
M lld/wasm/Driver.cpp
M lld/wasm/Options.td
M lld/wasm/Writer.cpp
M lldb/include/lldb/Target/Thread.h
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/test/API/functionalities/thread/state/TestThreadStates.py
M lldb/test/API/lldbtest.py
R lldb/third_party/Python/module/progress/progress.py
R lldb/third_party/Python/module/unittest2/unittest2/__init__.py
R lldb/third_party/Python/module/unittest2/unittest2/__main__.py
R lldb/third_party/Python/module/unittest2/unittest2/case.py
R lldb/third_party/Python/module/unittest2/unittest2/collector.py
R lldb/third_party/Python/module/unittest2/unittest2/compatibility.py
R lldb/third_party/Python/module/unittest2/unittest2/loader.py
R lldb/third_party/Python/module/unittest2/unittest2/main.py
R lldb/third_party/Python/module/unittest2/unittest2/result.py
R lldb/third_party/Python/module/unittest2/unittest2/runner.py
R lldb/third_party/Python/module/unittest2/unittest2/signals.py
R lldb/third_party/Python/module/unittest2/unittest2/suite.py
R lldb/third_party/Python/module/unittest2/unittest2/test/__init__.py
R lldb/third_party/Python/module/unittest2/unittest2/test/dummy.py
R lldb/third_party/Python/module/unittest2/unittest2/test/support.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_assertions.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_break.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_case.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_discovery.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_functiontestcase.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_loader.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_new_tests.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_program.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_result.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_runner.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_setups.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_skipping.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_suite.py
R lldb/third_party/Python/module/unittest2/unittest2/test/test_unittest2_with.py
R lldb/third_party/Python/module/unittest2/unittest2/util.py
M llvm/cmake/modules/AddLLVM.cmake
M llvm/docs/GettingStarted.rst
M llvm/docs/LangRef.rst
M llvm/include/llvm/ADT/StringSet.h
M llvm/include/llvm/Analysis/TargetLibraryInfo.def
A llvm/include/llvm/CodeGen/AtomicExpand.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/MachineSSAUpdater.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/Attributes.td
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/VPIntrinsics.def
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
M llvm/include/llvm/ProfileData/InstrProfData.inc
M llvm/include/llvm/Transforms/Utils/SimplifyLibCalls.h
M llvm/lib/Analysis/DomConditionCache.cpp
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
A llvm/lib/CodeGen/InitUndef.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineSSAUpdater.cpp
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/Attributes.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/IntrinsicInst.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/ARC/ARCTargetMachine.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.h
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/ARM/ARMSubtarget.h
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/M68k/M68kTargetMachine.cpp
M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/RISCV/CMakeLists.txt
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
R llvm/lib/Target/RISCV/RISCVRVVInitUndef.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
M llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
M llvm/lib/Target/VE/VETargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/XCore/XCoreTargetMachine.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/lib/Transforms/Utils/FlattenCFG.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/test/CodeGen/AArch64/GlobalISel/combine-select.mir
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
A llvm/test/CodeGen/AArch64/arm64-fpenv.ll
M llvm/test/CodeGen/AArch64/cmp-chains.ll
A llvm/test/CodeGen/AArch64/overflow.ll
M llvm/test/CodeGen/AArch64/preserve.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir
M llvm/test/CodeGen/AMDGPU/private-memory-atomics.ll
M llvm/test/CodeGen/ARM/O3-pipeline.ll
A llvm/test/CodeGen/ARM/ldst-opt-lr-restored.ll
M llvm/test/CodeGen/LoongArch/intrinsic-memcpy.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
A llvm/test/CodeGen/Mips/llvm-ir/forbidden-slot-ir.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/O0-pipeline.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
A llvm/test/CodeGen/RISCV/cm_mvas_mvsa.mir
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint-vp.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint-vp.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-concat.ll
M llvm/test/CodeGen/RISCV/rvv/handle-noreg-with-implicit-def.mir
A llvm/test/CodeGen/RISCV/rvv/llrint-vp.ll
A llvm/test/CodeGen/RISCV/rvv/lrint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/subregister-undef-early-clobber.mir
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir
M llvm/test/CodeGen/Thumb2/mve-intrinsics/vcaddq.ll
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving-cost.ll
M llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
M llvm/test/CodeGen/Thumb2/mve-vmull-splat.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
M llvm/test/Instrumentation/InstrProfiling/mcdc.ll
M llvm/test/MC/AArch64/SVE/cntb-diagnostics.s
M llvm/test/MC/AArch64/SVE/ptrue-diagnostics.s
M llvm/test/MC/Disassembler/X86/x86-64-err.txt
A llvm/test/MC/Mips/forbidden-slot.s
M llvm/test/MC/Mips/mips32r6/relocations.s
M llvm/test/MC/Mips/mips64r6/relocations.s
M llvm/test/MC/Mips/relocation.s
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
M llvm/test/TableGen/directive1.td
M llvm/test/TableGen/directive2.td
M llvm/test/Transforms/AtomicExpand/AArch64/atomicrmw-fp.ll
M llvm/test/Transforms/AtomicExpand/AArch64/expand-atomicrmw-xchg-fp.ll
M llvm/test/Transforms/AtomicExpand/AArch64/pcsections.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i8-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i8.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd-flat-specialization.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fmax.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fmin.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fsub.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-nand.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-simplify-cfg-CAS-block.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/unaligned-atomic.ll
M llvm/test/Transforms/AtomicExpand/ARM/atomic-expansion-v7.ll
M llvm/test/Transforms/AtomicExpand/ARM/atomic-expansion-v8.ll
M llvm/test/Transforms/AtomicExpand/ARM/atomicrmw-fp.ll
M llvm/test/Transforms/AtomicExpand/ARM/cmpxchg-weak.ll
M llvm/test/Transforms/AtomicExpand/Hexagon/atomicrmw-fp.ll
M llvm/test/Transforms/AtomicExpand/LoongArch/atomicrmw-fp.ll
M llvm/test/Transforms/AtomicExpand/LoongArch/load-store-atomic.ll
M llvm/test/Transforms/AtomicExpand/Mips/atomicrmw-fp.ll
M llvm/test/Transforms/AtomicExpand/PowerPC/atomicrmw-fp.ll
M llvm/test/Transforms/AtomicExpand/PowerPC/cfence-double.ll
M llvm/test/Transforms/AtomicExpand/PowerPC/cfence-float.ll
M llvm/test/Transforms/AtomicExpand/PowerPC/cmpxchg.ll
M llvm/test/Transforms/AtomicExpand/PowerPC/issue55983.ll
M llvm/test/Transforms/AtomicExpand/RISCV/atomicrmw-fp.ll
M llvm/test/Transforms/AtomicExpand/SPARC/libcalls.ll
M llvm/test/Transforms/AtomicExpand/SPARC/partword.ll
M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-libcall.ll
M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-non-integer.ll
M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-rmw-fp.ll
M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-rmw-initial-load.ll
M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-xchg-fp.ll
A llvm/test/Transforms/GVN/pr82884.ll
M llvm/test/Transforms/InstCombine/known-bits.ll
A llvm/test/Transforms/InstCombine/math-odd-even-parity.ll
M llvm/test/Transforms/InstCombine/minmax-fold.ll
M llvm/test/Transforms/InstCombine/select_meta.ll
A llvm/test/Transforms/InstCombine/sub-xor-cmp.ll
A llvm/test/Transforms/PhaseOrdering/enable-loop-header-duplication-oz.ll
M llvm/test/Transforms/SimplifyCFG/branch-fold-dbg.ll
M llvm/test/Transforms/Util/flatten-cfg.ll
M llvm/test/tools/llvm-cov/Inputs/mcdc-const.o
M llvm/test/tools/llvm-cov/Inputs/mcdc-general.o
M llvm/test/tools/llvm-cov/Inputs/mcdc-macro.o
M llvm/test/tools/llvm-cov/Inputs/mcdc-maxbs.o
M llvm/test/tools/llvm-cov/mcdc-macro.test
M llvm/test/tools/llvm-cov/mcdc-maxbs.test
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
M llvm/tools/llvm-exegesis/README.md
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
M llvm/tools/llvm-shlib/CMakeLists.txt
M llvm/tools/opt/optdriver.cpp
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/VPIntrinsicTest.cpp
M llvm/unittests/ProfileData/CoverageMappingTest.cpp
M llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.cpp
M llvm/utils/TableGen/CodeGenHwModes.h
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/DirectiveEmitter.cpp
M llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/Linalg/Passes.h
M mlir/include/mlir/Dialect/Linalg/Passes.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAttributes.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
R mlir/include/mlir/ExecutionEngine/SparseTensor/ErrorHandling.h
M mlir/include/mlir/ExecutionEngine/SparseTensor/File.h
M mlir/include/mlir/ExecutionEngine/SparseTensor/Storage.h
M mlir/include/mlir/Interfaces/FunctionInterfaces.td
M mlir/lib/Bytecode/Reader/BytecodeReader.cpp
M mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp
M mlir/lib/Conversion/ControlFlowToSCF/ControlFlowToSCF.cpp
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/lib/Conversion/SCFToSPIRV/SCFToSPIRV.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp
M mlir/lib/Dialect/Async/IR/Async.cpp
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp
M mlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp
M mlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseToLinalg.cpp
M mlir/lib/Dialect/Linalg/Transforms/Generalization.cpp
M mlir/lib/Dialect/Linalg/Transforms/InlineScalarOperands.cpp
M mlir/lib/Dialect/Linalg/Transforms/Loops.cpp
M mlir/lib/Dialect/Linalg/Transforms/NamedOpConversions.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/SPIRV/IR/AtomicOps.cpp
M mlir/lib/Dialect/SPIRV/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/SPIRV/IR/GroupOps.cpp
M mlir/lib/Dialect/SPIRV/IR/IntegerDotProductOps.cpp
M mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVParsingUtils.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVParsingUtils.h
M mlir/lib/Dialect/Shape/IR/Shape.cpp
M mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
M mlir/lib/ExecutionEngine/SparseTensor/File.cpp
M mlir/lib/ExecutionEngine/SparseTensor/Storage.cpp
M mlir/lib/ExecutionEngine/SparseTensorRuntime.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Dialect/ArmSME/vector-legalization.mlir
M mlir/test/Dialect/SPIRV/IR/function-decorations.mlir
M mlir/test/Dialect/SPIRV/IR/structure-ops.mlir
A mlir/test/Target/LLVMIR/omptarget-constant-alloca-raise.mlir
M mlir/test/Target/SPIRV/decorations.mlir
M mlir/test/Target/SPIRV/function-decorations.mlir
M mlir/test/Target/SPIRV/global-variable.mlir
M mlir/test/lib/Dialect/Test/TestAttributes.cpp
M mlir/unittests/Target/LLVM/SerializeROCDLTarget.cpp
M mlir/unittests/Target/LLVM/SerializeToLLVMBitcode.cpp
M openmp/libomptarget/include/OpenMP/OMPT/Interface.h
M openmp/libomptarget/plugins-nextgen/common/src/RPC.cpp
M openmp/libomptarget/src/OpenMP/OMPT/Callback.cpp
M openmp/libomptarget/src/device.cpp
M openmp/libomptarget/test/ompt/callbacks.h
M openmp/libomptarget/test/ompt/target_memcpy.c
A openmp/libomptarget/test/ompt/target_memcpy_emi.c
M openmp/runtime/cmake/LibompHandleFlags.cmake
M openmp/runtime/src/z_Linux_util.cpp
R utils/bazel/crash-f7dbdb2b330aad91f520099159e736e91bb9ddbf
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Add phase ordering test and address nits
Created using spr 1.3.4
Compare: https://github.com/llvm/llvm-project/compare/23a2789c3c3c...312592a03a25
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list