[all-commits] [llvm/llvm-project] ded3ca: [AMDGPU] Set predicates more consistently for BUF ...

[Jay Foad via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ded3ca224f7c2b1df769d625985ab20bb60dfba4
      https://github.com/llvm/llvm-project/commit/ded3ca224f7c2b1df769d625985ab20bb60dfba4
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2024-02-17 (Sat, 17 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/BUFInstructions.td
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp

  Log Message:
  -----------
  [AMDGPU] Set predicates more consistently for BUF instructions (#81865)

Set DecoderNamespace and AssemblerPredicate in the base class for Real
instructions for each subtarget. This avoids some ad hoc "let" around
groups of instructions definitions, and fixes some missed cases like
BUFFER_GL0_INV_gfx10 which was missing DecoderNamespace.



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