[all-commits] [llvm/llvm-project] 4265ad: [RISCV] Adjust sdloc when creating an extend for w...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4265ad12154caa92d47e8ff839ed3f3876922fd6
      https://github.com/llvm/llvm-project/commit/4265ad12154caa92d47e8ff839ed3f3876922fd6
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-02-16 (Fri, 16 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwadd.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwaddu.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsub.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsubu.ll

  Log Message:
  -----------
  [RISCV] Adjust sdloc when creating an extend for widening instructions (#82040)

We were using the SDLoc corresponding to the original arithmetic
instruction, but here using the SDLoc corresponding to the original
extend if we need to introduce a new narrower extend seems cleaner.

As can be seen in the test diffs, this very minorly impacts scheduling
and register allocation by given the scheduler a hint from original
program order.



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