[all-commits] [llvm/llvm-project] 55b5ac: [RISCV] Remove X0 handling from RISCVInstrInfo::op...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 55b5ac8917b4a1e0ceb79bee4c4c6f7d35b95526
      https://github.com/llvm/llvm-project/commit/55b5ac8917b4a1e0ceb79bee4c4c6f7d35b95526
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-02-15 (Thu, 15 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

  Log Message:
  -----------
  [RISCV] Remove X0 handling from RISCVInstrInfo::optimizeCondBranch. (#81931)

This was trying to rewrite a branch that uses X0 to a branch that uses a
register produced by LI of 1 or -1. Using X0 is free so there is no
reason to rewrite it. Doing so would just extend the live range of the
LI register increasing register pressure.

In practice this might not have triggered often because we were calling
MRI.hasOneUse on X0. I'm not sure what the returns for a physical
reigster.