[all-commits] [llvm/llvm-project] dc3258: [mlir][mesh] Add all-slice operation (#81218)
Boian Petkantchin via All-commits
all-commits at lists.llvm.org
Thu Feb 15 13:04:10 PST 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: dc3258c617420e83caff63c93d548e0923b10791
https://github.com/llvm/llvm-project/commit/dc3258c617420e83caff63c93d548e0923b10791
Author: Boian Petkantchin <boian.petkantchin at amd.com>
Date: 2024-02-15 (Thu, 15 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/Utils.h
M mlir/include/mlir/Dialect/Arith/Utils/Utils.h
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
M mlir/include/mlir/Dialect/Mesh/Transforms/Transforms.h
M mlir/include/mlir/IR/Builders.h
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/Arith/Utils/Utils.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Mesh/Transforms/Simplifications.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/lib/Dialect/Mesh/Transforms/Transforms.cpp
A mlir/lib/Dialect/Mesh/Transforms/TransformsDetail.h
M mlir/lib/IR/Builders.cpp
A mlir/test/Dialect/Mesh/all-scatter-op-lowering.mlir
M mlir/test/Dialect/Mesh/canonicalization.mlir
M mlir/test/Dialect/Mesh/invalid.mlir
M mlir/test/Dialect/Mesh/ops.mlir
M mlir/test/Dialect/Mesh/resharding-spmdization.mlir
M mlir/test/Dialect/Mesh/spmdization.mlir
M mlir/test/lib/Dialect/Mesh/CMakeLists.txt
A mlir/test/lib/Dialect/Mesh/TestOpLowering.cpp
R mlir/test/lib/Dialect/Mesh/TestProcessMultiIndexOpLowering.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][mesh] Add all-slice operation (#81218)
This op is the inverse of all-gather. It is useful to have an explicit
concise representation instead of having a blob of slicing logic.
Add lowering for the op that slices from the tensor based on the
in-group process index.
Make resharding generate an all-slice instead of inserting the slicing
logic directly.
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