[all-commits] [llvm/llvm-project] 267d6b: [AArch64][SVE] Instcombine uzp1/reinterpret svbool...

Usman Nadeem via All-commits all-commits at lists.llvm.org
Thu Feb 15 10:40:20 PST 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 267d6b5ed2f0a4b1fcf7ac0138427905e431a3e1
      https://github.com/llvm/llvm-project/commit/267d6b5ed2f0a4b1fcf7ac0138427905e431a3e1
  Author: Usman Nadeem <mnadeem at quicinc.com>
  Date:   2024-02-15 (Thu, 15 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-uzp1.ll

  Log Message:
  -----------
  [AArch64][SVE] Instcombine uzp1/reinterpret svbool to use vector.insert (#81069)

Concatenating two predictes using uzp1 after converting to double length
using sve.convert.to/from.svbool is optimized poorly in the backend,
resulting in additional `and` instructions to zero the lanes. See
https://github.com/llvm/llvm-project/pull/78623/

Combine this pattern to use `llvm.vector.insert` to concatenate and get
rid of convert to/from svbools.




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