[all-commits] [llvm/llvm-project] 2df652: [CodeGen] Simplify updateLiveIn in MachineSink (#7...

[Jay Foad via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2df652a69159b76c97cfd94e32ad6bb71dde716c
      https://github.com/llvm/llvm-project/commit/2df652a69159b76c97cfd94e32ad6bb71dde716c
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2024-02-15 (Thu, 15 Feb 2024)

  Changed paths:
    M llvm/lib/CodeGen/MachineSink.cpp
    M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
    M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
    M llvm/test/CodeGen/AMDGPU/postra-machine-sink.mir

  Log Message:
  -----------
  [CodeGen] Simplify updateLiveIn in MachineSink (#79831)

When a whole register is added a basic block's liveins, use
LaneBitmask::getAll for the live lanes instead of trying to calculate an
accurate mask of the lanes that comprise the register.

This simplifies the code and matches other places where a whole register
is marked as livein.

This also avoids problems when regunits that are synthesized by TableGen
to represent ad hoc aliasing have a lane mask of 0.

Fixes #78942