[all-commits] [llvm/llvm-project] 2400f7: [mlir][sparse] add assemble test for Batched-CSR a...

[Aart Bik via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2400f704af18fd4b58ded158c3debe3b295accc6
      https://github.com/llvm/llvm-project/commit/2400f704af18fd4b58ded158c3debe3b295accc6
  Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
  Date:   2024-02-13 (Tue, 13 Feb 2024)

  Changed paths:
    A mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack_d.mlir

  Log Message:
  -----------
  [mlir][sparse] add assemble test for Batched-CSR and CSR-Dense (#81660)

These are formats supported by PyTorch sparse, so good to make sure that
our assemble instructions work on these.