[all-commits] [llvm/llvm-project] c1a99b: [Sparc] limit MaxAtomicSizeInBitsSupported to 32 f...

[James Y Knight via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c1a99b2c77499176362f24f09a39850867122ea4
      https://github.com/llvm/llvm-project/commit/c1a99b2c77499176362f24f09a39850867122ea4
  Author: James Y Knight <jyknight at google.com>
  Date:   2024-02-13 (Tue, 13 Feb 2024)

  Changed paths:
    M llvm/lib/Target/Sparc/SparcISelLowering.cpp
    M llvm/test/CodeGen/SPARC/64atomics.ll
    M llvm/test/CodeGen/SPARC/atomicrmw-uinc-udec-wrap.ll

  Log Message:
  -----------
  [Sparc] limit MaxAtomicSizeInBitsSupported to 32 for 32-bit Sparc. (#81655)

When in 32-bit mode, the backend doesn't currently implement 64-bit
atomics, even though the hardware is capable if you have specified a V9
CPU. Thus, limit the width to 32-bit, for now, leaving behind a TODO.

This fixes a regression triggered by PR #73176.