[all-commits] [llvm/llvm-project] 79ce2c: [mlir][VectorOps] Add conversion of 1-D vector.int...

[Benjamin Maxwell via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 79ce2c93aeb4686ef687b19867dbfe0e8cf40673
      https://github.com/llvm/llvm-project/commit/79ce2c93aeb4686ef687b19867dbfe0e8cf40673
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2024-02-13 (Tue, 13 Feb 2024)

  Changed paths:
    M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
    M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir

  Log Message:
  -----------
  [mlir][VectorOps] Add conversion of 1-D vector.interleave ops to LLVM (#80966)

The 1-D case directly maps to LLVM intrinsics. The n-D case will be
handled by unrolling to 1-D first (in a later patch).

Depends on: #80965